阅读说明：本技术 气相成长装置及用于该气相成长装置的载具 (Vapor phase growth apparatus and carrier for the same ) 是由 和田直之 南出由生 于 2019-11-05 设计创作，主要内容包括：本发明提供能够使晶圆周边缘部的CVD膜厚均匀的气相成长装置。载具(C)形成为具有载置于基座(112)的上表面的底面(C11)、与晶圆(WF)的背面的外边缘部接触来支承的上表面(C12)、外周侧壁面(C13)、内周侧壁面(C14)的无端的环状,并且前述上表面(C12)的圆周方向上的构造或形状为具有与前述晶圆(WF)的圆周方向上的晶体方位对应的关系的构造或形状,处理前的晶圆以处理前的晶圆的圆周方向上的晶体方位和圆周方向上的构造或形状呈前述对应的关系的方式搭载于载具。(The invention provides a vapor phase growth apparatus capable of making CVD film thickness of peripheral edge part of wafer uniform. The carrier (C) is formed into an endless ring shape having a bottom surface (C11) placed on the upper surface of a susceptor (112), an upper surface (C12) supported in contact with the outer edge portion of the back surface of a Wafer (WF), an outer peripheral side wall surface (C13), and an inner peripheral side wall surface (C14), wherein the structure or shape of the upper surface (C12) in the circumferential direction is a structure or shape having a relationship corresponding to the crystal orientation of the Wafer (WF) in the circumferential direction, and the wafer before processing is mounted on the carrier so that the crystal orientation of the wafer before processing in the circumferential direction and the structure or shape in the circumferential direction are in the aforementioned relationship.)

1. A vapor phase growth apparatus comprising a plurality of annular carriers for supporting outer edges of wafers, wherein a plurality of wafers before processing are sequentially transferred from a wafer storage container to a reaction chamber through a factory interface, a load lock chamber, and a wafer transfer chamber, and a plurality of wafers after processing are sequentially transferred from the reaction chamber to the wafer storage container through the wafer transfer chamber, the load lock chamber, and the factory interface,

the load lock chamber is connected to the factory interface through the 1 st door and connected to the wafer transfer chamber through the 2 nd door,

the wafer transfer chamber is connected to the reaction chamber for forming a CVD film on the wafer through a gate valve,

a 1 st robot is provided in the wafer transfer chamber, the 1 st robot loads a wafer before processing, which has been transported to the load lock chamber, into the reaction chamber while being mounted on the carrier, and takes out a processed wafer, which has finished processing in the reaction chamber, from the reaction chamber while being mounted on the carrier, and transports the wafer to the load lock chamber,

a 2 nd robot is provided in the factory interface, the 2 nd robot takes out a wafer before processing from the wafer storage container, mounts the wafer on a carrier standing by in the load lock chamber, and stores a processed wafer carried on the carrier and transported to the load lock chamber in the wafer storage container,

the load lock chamber is provided with a rack for supporting a carrier,

the reaction chamber is provided with a base for supporting the carrier,

in the vapor phase growth apparatus, the carrier is formed in an endless ring shape having a bottom surface placed on the upper surface of the susceptor, an upper surface supported in contact with the outer edge portion of the back surface of the wafer, an outer peripheral side wall surface, and an inner peripheral side wall surface,

the carrier, or the carrier and the base have a structure or a shape having a relationship in which a structure or a shape in a circumferential direction of the upper surface corresponds to a crystal orientation in a circumferential direction of the wafer,

the wafer before processing is mounted on the carrier so that the crystal orientation of the wafer before processing in the circumferential direction and the structures or shapes of the carrier or the carrier and the base in the circumferential direction are in the corresponding relationship.

2. A vapor growth apparatus according to claim 1,

the depth of the counterbore in the circumferential direction of the upper surface of the carrier, or the carrier and the susceptor is a depth corresponding to the crystal orientation in the circumferential direction of the wafer.

3. A vapor growth apparatus according to claim 2,

the depth of the counter bore in the crystal orientation in which the CVD film is likely to grow is larger than the depth of the counter bore in the crystal orientation in which the CVD film is less likely to grow.

4. A vapor-phase growth apparatus according to claim 2 or 3,

the aforementioned counterbore depth varies continuously and periodically in the circumferential direction.

5. A vapor growth apparatus according to claim 4,

the aforementioned counterbore depth varies periodically every 90 degrees in the circumferential direction.

6. A vapor growth apparatus according to claim 1,

the pocket width in the circumferential direction of the upper surface of the carrier, or the carrier and the susceptor is a pocket width corresponding to the crystal orientation in the circumferential direction of the wafer.

7. A vapor growth apparatus according to claim 6,

the pocket width in the crystal orientation in which the CVD film is likely to grow is smaller than the pocket width in the crystal orientation in which the CVD film is less likely to grow.

8. A vapor-phase growth apparatus according to claim 6 or 7,

the width of the pockets varies continuously and periodically in the circumferential direction.

9. The vapor growth apparatus of claim 8,

the aforementioned pocket width periodically changes every 90 degrees in the circumferential direction.

10. A vapor growth apparatus according to any one of claims 1 to 9,

the carrier is placed on the upper surface of the base and constitutes the upper surface of the carrier together with the outer peripheral bulge of the base.

11. A carrier for a vapor phase growth apparatus, the carrier being an annular carrier for supporting an outer edge of a wafer, the carrier being used to sequentially transfer a plurality of wafers before processing from a wafer storage container to a reaction chamber through a factory interface, a load lock chamber, and a wafer transfer chamber, and to sequentially transfer a plurality of wafers after processing from the reaction chamber to the wafer storage container through the wafer transfer chamber, the load lock chamber, and the factory interface,

an endless ring-shaped susceptor having a bottom surface mounted on the upper surface of the susceptor in the reaction chamber, an upper surface supported in contact with the outer edge portion of the back surface of the wafer, an outer peripheral side wall surface, and an inner peripheral side wall surface,

and the structure or shape in the circumferential direction of the upper surface is set to have a relationship corresponding to the crystal orientation in the circumferential direction of the wafer.

12. The carrier for a vapor phase growth apparatus according to claim 11,

the depth of the counterbore in the circumferential direction of the upper surface of the carrier is a depth corresponding to the crystal orientation in the circumferential direction of the wafer.

13. The carrier for a vapor phase growth apparatus according to claim 12,

the depth of the counter bore in the crystal orientation in which the CVD film is likely to grow is larger than the depth of the counter bore in the crystal orientation in which the CVD film is less likely to grow.

14. The carrier for a vapor phase growth apparatus according to claim 12 or 13,

the aforementioned counterbore depth varies continuously and periodically in the circumferential direction.

15. The carrier for a vapor phase growth apparatus according to claim 14,

the aforementioned counterbore depth varies periodically every 90 degrees in the circumferential direction.

16. The carrier for a vapor phase growth apparatus according to claim 11,

the pocket width in the circumferential direction of the upper surface of the carrier is a pocket width corresponding to the crystal orientation in the circumferential direction of the wafer.

17. The carrier for a vapor phase growth apparatus according to claim 16,

the pocket width in the crystal orientation in which the CVD film is likely to grow is smaller than the pocket width in the crystal orientation in which the CVD film is less likely to grow.

18. The carrier for a vapor phase growth apparatus according to claim 16 or 17,

the width of the pockets varies continuously and periodically in the circumferential direction.

19. The carrier for a vapor phase growth apparatus according to claim 18,

the aforementioned pocket width periodically changes every 90 degrees in the circumferential direction.

20. The carrier for a vapor phase growth apparatus according to any one of claims 11 to 19,

the carrier is placed on the upper surface of the base and constitutes the upper surface of the carrier together with the outer peripheral bulge of the base.

Technical Field

The present invention relates to a vapor phase growth apparatus used for manufacturing an epitaxial wafer and the like, and a carrier used for the vapor phase growth apparatus.

Background

In a vapor phase growth apparatus used for manufacturing an epitaxial wafer or the like, in order to minimize damage to the back surface of a silicon wafer, it is proposed that the silicon wafer be transported in a process from a load lock chamber to a reaction chamber in a state where the silicon wafer is mounted on a ring-shaped carrier (patent document 1).

In such a vapor phase growth apparatus, a ring-shaped carrier standing by in a load lock chamber mounts a wafer before processing, and a processed wafer is carried from a reaction chamber to the load lock chamber while being mounted on the ring-shaped carrier.

Patent document 1 U.S. patent application publication No. 2017/0110352.

Patent document 2, Japanese patent laid-open No. 2007-Asaha 294942.

However, the above-described ring-shaped carrier of the conventional art has a problem that it is difficult to planarize the peripheral edge portion in particular because it is not possible to suppress a rapid change in the thickness of the epitaxial film formed on the peripheral edge portion of the single crystal silicon wafer.

Disclosure of Invention

The present invention has been made to solve the problem of providing a vapor phase growth apparatus capable of minimizing damage to the back surface of a silicon wafer and making the CVD film thickness at the peripheral edge portion of the wafer uniform.

The vapor phase growth apparatus of the present invention comprises a ring-shaped carrier for supporting the outer edge of a wafer, and a plurality of wafers before processing are sequentially transferred from a wafer storage container to a reaction chamber through a factory interface, a load lock chamber and a wafer transfer chamber, and a plurality of wafers after processing are sequentially transferred from the reaction chamber to the wafer storage container through the wafer transfer chamber, the load lock chamber and the factory interface, wherein the load lock chamber is communicated with the factory interface through a 1 st door and communicated with the wafer transfer chamber through a 2 nd door, the wafer transfer chamber is communicated with the reaction chamber for forming a CVD film on the wafer through a gate valve, a 1 st robot is provided in the wafer transfer chamber, the 1 st robot transfers the wafers before processing transferred to the load lock chamber into the reaction chamber in a state of being mounted on the carrier, and a second robot is provided at the factory interface, the second robot takes out wafers before processing from a wafer storage container, the wafers are loaded on a carrier standing by in the loadlock chamber, and the wafers after processing loaded on the carrier and transported to the loadlock chamber are stored in the wafer storage container, a frame for supporting the carrier is provided in the loadlock chamber, a base for supporting the carrier is provided in the reaction chamber, and the carrier is formed into an endless ring shape having a bottom surface placed on the top surface of the base, a top surface supported in contact with an outer edge portion of the back surface of the wafers, an outer peripheral side wall surface, and an inner peripheral surface, the carrier, or the carrier and the base have a structure or a shape having a relationship in which a structure or a shape in a circumferential direction of the upper surface corresponds to a crystal orientation in a circumferential direction of the wafer, and the wafer before processing is mounted on the carrier such that the crystal orientation in the circumferential direction of the wafer before processing and the structures or the shapes in the circumferential direction of the carrier or the carrier and the base have the corresponding relationship.

In the present invention, the depth of the counterbore in the circumferential direction of the upper surfaces of the carrier, or the carrier and the susceptor is a depth corresponding to the crystal orientation in the circumferential direction of the wafer, but as an example thereof, the depth of the counterbore in the circumferential direction of the upper surfaces of the carrier, or the carrier and the susceptor is a depth corresponding to the crystal orientation in the circumferential direction of the wafer.

In the present invention, it is more preferable that the depth of the counter bore in the crystal orientation in which the CVD film is likely to grow is larger than the depth of the counter bore in the crystal orientation in which the CVD film is less likely to grow.

In the present invention, it is more preferable that the depth of the counterbore is continuously and periodically changed in the circumferential direction.

In the present invention, it is more preferable that the depth of the counterbore is periodically changed every 90 degrees in the circumferential direction.

In another example of the present invention, a pocket width in a circumferential direction of the upper surface of the carrier or the carrier and the susceptor is set to a pocket width corresponding to a crystal orientation in a circumferential direction of the wafer.

In the present invention, it is more preferable that the pocket width in the crystal orientation in which the CVD film is likely to grow is smaller than the pocket width in the crystal orientation in which the CVD film is less likely to grow.

In the present invention, it is more preferable that the pocket width continuously and periodically changes in the circumferential direction.

In the present invention, it is more preferable that the pocket width periodically changes every 90 degrees in the circumferential direction.

The present invention is a carrier for a vapor phase growth apparatus, which is an annular carrier for supporting the outer edge of a wafer, and by which a plurality of wafers before processing are sequentially transferred from a wafer storage container to a reaction chamber through a factory interface, a load lock chamber, and a wafer transfer chamber, and sequentially transferring a plurality of processed wafers from the reaction chamber to the wafer storage container through the wafer transfer chamber, the load lock chamber, and the factory interface, characterized in that the wafer processing apparatus is formed into an endless ring shape having a bottom surface on which the upper surface of a susceptor placed in the reaction chamber is placed, an upper surface which is supported in contact with the outer edge portion of the back surface of the wafer, an outer peripheral side wall surface, and an inner peripheral side wall surface, and the structure or shape in the circumferential direction of the upper surface is set to have a relationship corresponding to the crystal orientation in the circumferential direction of the wafer.

In the present invention, it is preferable that a depth of the counterbore in the circumferential direction of the upper surface of the carrier is a depth corresponding to a crystal orientation in the circumferential direction of the wafer.

In the present invention, it is more preferable that the depth of the counter bore in the crystal orientation in which the CVD film is likely to grow is larger than the depth of the counter bore in the crystal orientation in which the CVD film is less likely to grow.

In the present invention, it is more preferable that the depth of the counterbore is continuously and periodically changed in the circumferential direction.

In the present invention, it is more preferable that the depth of the counterbore is periodically changed every 90 degrees in the circumferential direction.

In addition, in the present invention, a pocket width in a circumferential direction of the upper surface of the carrier is a pocket width corresponding to a crystal orientation in a circumferential direction of the wafer.

In the present invention, it is more preferable that the pocket width in the crystal orientation in which the CVD film is likely to grow is smaller than the pocket width in the crystal orientation in which the CVD film is less likely to grow.

In the present invention, it is more preferable that the pocket width continuously and periodically changes in the circumferential direction.

In the present invention, it is more preferable that the pocket width periodically changes every 90 degrees in the circumferential direction.

In the present invention, it is more preferable that the carrier is placed on the upper surface of the base, and constitutes the upper surface of the carrier together with the outer circumferential ridge portion of the base.

Effects of the invention

According to the present invention, the structure or shape in the circumferential direction of the upper surface of the carrier or carrier and susceptor has a relationship with the crystal orientation in the circumferential direction of the wafer, and therefore, the variation in the film thickness of CVD due to the crystal orientation is suppressed. As a result, the CVD film thickness at the peripheral edge portion of the wafer can be made uniform.

Drawings

FIG. 1 is a block diagram showing a vapor phase growth apparatus according to an embodiment of the present invention.

Fig. 2A is a plan view of a carrier according to an embodiment of the present invention.

Fig. 2B is a cross-sectional view of a carrier including a wafer and a susceptor of a reaction furnace.

Fig. 3A is a plan view showing a rack provided in the load lock chamber.

Fig. 3B is a cross-sectional view of a rack including a wafer and a carrier.

Fig. 4 is a plan view and a sectional view showing a transfer flow of the wafer and the carrier in the load lock chamber.

Fig. 5 is a plan view and a sectional view showing a transfer flow of the wafer and the carrier in the reaction chamber.

Fig. 6 is a plan view showing a crystal orientation of a single crystal silicon wafer having a (100) plane as a main surface.

Fig. 7A is a main sectional view showing a vehicle 1 according to an embodiment of the present invention.

Fig. 7B is a plan view showing the carrier of fig. 7A.

Fig. 7C is a view of the upper surface of the carrier of fig. 7A developed in the direction of the arrow of fig. 7B.

Fig. 7D is a main sectional view showing another example of the vehicle 1 according to the present invention.

Fig. 8A is a main part sectional view showing a carrier 2 example of the present invention.

Fig. 8B is a plan view showing the carrier of fig. 8A.

Fig. 8C is a view of the pocket width of the vehicle of fig. 8A expanded in the direction of the arrow of fig. 8B.

Fig. 8D is a main part sectional view showing another example of the carrier 2 according to the present invention.

Fig. 9 is a diagram (1) showing a flow of handling a wafer and a carrier in the vapor phase growth apparatus according to the present embodiment.

Fig. 10 is a diagram (2) showing a flow of handling the wafer and the carrier in the vapor phase growth apparatus according to the present embodiment.

Fig. 11 is a diagram (3) showing a flow of handling wafers and carriers in the vapor phase growth apparatus according to the present embodiment.

Fig. 12 is a diagram (4) showing a flow of handling wafers and carriers in the vapor phase growth apparatus according to the present embodiment.

Detailed Description

Hereinafter, embodiments of the present invention will be described with reference to the drawings. Fig. 1 is a block diagram showing a vapor phase growth apparatus 1 according to an embodiment of the present invention, and a main body of the vapor phase growth apparatus 1 shown at the center is shown in a plan view. The vapor phase growth apparatus 1 of the present embodiment is a so-called CVD apparatus, and includes a pair of reaction furnaces 11 and 11, a wafer transfer chamber 12 in which a 1 st robot 121 for processing a wafer WF such as a single crystal silicon wafer is disposed, a pair of load lock chambers 13, a factory interface 14 in which a 2 nd robot 141 for processing the wafer WF is disposed, and a load port in which a wafer storage container 15 (cassette) for storing a plurality of wafers WF is disposed.

The factory interface 14 is an area similar to the clean room atmosphere on which the wafer container 15 is placed. The factory interface 14 is provided with a 2 nd robot 141, and the 2 nd robot 141 takes out the wafers WF before processing stored in the wafer storage container 15 and puts them into the load lock chamber 13, while storing the wafers WF after processing transported to the load lock chamber 13 into the wafer storage container 15. The 2 nd robot 141 is controlled by the 2 nd robot controller 142, and the 2 nd blade 143 attached to the tip of the robot hand moves along a predetermined trajectory learned in advance.

An airtight openable and closable 1 st door 131 is provided between the load lock chamber 13 and the factory interface 14, and an airtight openable and closable 2 nd door 132 is similarly provided between the load lock chamber 13 and the wafer transfer chamber 12. The load lock chamber 13 functions as a space for replacing an atmosphere gas between the wafer transfer chamber 12 in an inert gas atmosphere and the factory interface 14 in an atmospheric atmosphere. Therefore, an exhaust device for vacuum-exhausting the inside of the load lock chamber 13 and a supply device for supplying an inert gas to the load lock chamber 13 are provided.

For example, when the wafer WF before processing is transferred from the wafer storage container 15 to the wafer transfer chamber 12, the 1 st door 131 on the factory interface 14 side is closed, the 2 nd door 132 on the wafer transfer chamber 12 side is closed, the wafer WF in the wafer storage container 15 is taken out by the 2 nd robot 141 in a state where the load lock chamber 13 is made to be an inert gas atmosphere, the 1 st door 131 on the factory interface 14 side is opened, and the wafer WF is transferred to the load lock chamber 13. Next, after the 1 st door 131 on the factory interface 14 side is closed and the load lock chamber 13 is again made to be an inert gas atmosphere, the 2 nd door 132 on the wafer transfer chamber 12 side is opened, and the wafer WF is transferred to the wafer transfer chamber 12 by the 1 st robot 121.

On the other hand, when the processed wafer WF is transferred from the wafer transfer chamber 12 to the wafer storage container 15, the 1 st door 131 on the factory interface 14 side is closed, the 2 nd door 132 on the wafer transfer chamber 12 side is opened in a state where the load lock chamber 13 is made to be an inert gas atmosphere, and the wafer WF in the wafer transfer chamber 12 is transferred to the load lock chamber 13 by the 1 st robot 121. Next, after the 2 nd door 132 on the wafer transfer chamber 12 side is closed and the load lock chamber 13 is again made to be an inert gas atmosphere, the 1 st door 131 on the factory interface 14 side is opened and the wafer WF is transferred to the wafer storage container 15 by the 2 nd robot 141.

The wafer transfer chamber 12 is a closed chamber, one of which is connected to the load lock chamber 13 via an airtight 2 nd door 132 that can be opened and closed, and the other of which is connected via an airtight gate valve 114 that can be opened and closed. The wafer transfer chamber 12 is provided with a 1 st robot 121, and the 1 st robot 121 transfers the wafer WF before processing from the load lock chamber 13 to the reaction chamber 111 and transfers the wafer WF after processing from the reaction chamber 111 to the load lock chamber 13. The 1 st robot 121 is controlled by the 1 st robot controller 122, and the 1 st blade 123 attached to the tip of the robot hand moves along a previously learned motion trajectory.

The manifold controller 16, the 1 st robot controller 122, and the 2 nd robot controller 142, which control the entire manifold vapor phase growth apparatus 1, receive and transmit control signals from each other. When the operation command signal from the bus controller 16 is transmitted to the 1 st robot controller 122, the 1 st robot controller 122 controls the operation of the 1 st robot 121, and the operation result of the 1 st robot 121 is transmitted from the 1 st robot controller 122 to the bus controller 16. Thereby, the manifold controller 16 recognizes the operation state of the 1 st robot 121. Similarly, when the motion command signal from the bus controller 16 is transmitted to the 2 nd robot controller 142, the 2 nd robot controller 142 controls the motion of the 2 nd robot 141, and the motion result of the 2 nd robot 141 is transmitted from the 2 nd robot controller 142 to the bus controller 16. Thereby, the bus controller 16 recognizes the operation state of the 2 nd robot 141.

The inactive gas is supplied from an inactive gas supply device (not shown) to the wafer transfer chamber 12, and the gas in the wafer transfer chamber 12 is purged by a scrubber (scrubbing dust collector) connected to an exhaust port and then discharged to the outside of the system. Such a scrubber is not shown in detail, and a conventionally known pressurized water type scrubber can be used, for example.

The reaction furnace 11 is an apparatus for forming an epitaxial film on the surface of the wafer WF by CVD, and includes a reaction chamber 111, a susceptor 112 for placing and rotating the wafer WF is provided in the reaction chamber 111, and a source gas for supplying hydrogen gas and forming a CVD film (for example, silicon tetrachloride SiCl in the case where the CVD film is a silicon epitaxial film) is provided in the reaction chamber 111₄Trichlorosilane SiHCl₃Etc.) of the gas supply device 113. Although not shown, a heating lamp for raising the temperature of the wafer WF to a predetermined temperature is provided around the reaction chamber 111. Further, a gate valve 114 is provided between the reaction chamber 111 and the wafer transfer chamber 12, and the gate valve 114 is closed, whereby airtightness between the reaction chamber 111 and the wafer transfer chamber 12 is ensured. The driving of the susceptor 112 of the reaction furnace 11, the supply of gas by the gas supply device 113, the seeding, the opening/closing of the heating lamp, and the control of the opening/closing operation of the gate valve 114 are controlled by command signals from the master controller 16. Further, the vapor phase growth apparatus 1 shown in fig. 1 is an example in which a pair of reaction furnaces 11, 11 are provided, but one reaction furnace 1 may be provided1, three or more reaction furnaces may be used.

The reactor 11 is also provided with a scrubber (scrubbing dust collector) having the same structure as the wafer transfer chamber 12. That is, the hydrogen gas or the raw material gas supplied from the gas supply device 113 is purged by a scrubber connected to an exhaust port provided in the reaction chamber 111, and then discharged to the outside of the system. As the scrubber, for example, a conventionally known pressurized water type scrubber can be used.

In the vapor phase growth apparatus 1 of the present embodiment, the wafer WF is transported between the load lock chamber 13 and the reaction chamber 111 by the annular carrier C supporting the entire outer peripheral edge of the wafer WF. Fig. 2A is a plan view showing the carrier C, fig. 2B is a sectional view showing the carrier C including the wafer WF and the susceptor 112 of the reaction furnace 11, and fig. 5 is a plan view and a sectional view showing a transfer flow of the wafer WF and the carrier C in the reaction chamber 111.

The carrier C of the present embodiment is made of a material such as SiC, is formed in an endless ring shape, and has a bottom surface C11 placed on the upper surface of the susceptor 112 shown in fig. 2B, an upper surface C12 that contacts and supports the entire outer periphery of the back surface of the wafer WF, an outer peripheral side wall surface C13, and an inner peripheral side wall surface C14. When the wafer WF supported by the carrier C is carried into the reaction chamber 111, as shown in the plan view of fig. 5(a), the wafer WF is carried to the upper portion of the base 112 as shown in fig. B in a state where the carrier C is placed on the 1 st blade 123 of the 1 st robot 121, the carrier C is temporarily lifted up by three or more carrier lift pins 115 provided to be vertically movable with respect to the base 112 as shown in fig. C, the 1 st blade 123 is retreated as shown in fig. D, and the base 112 is raised as shown in fig. E, thereby placing the carrier C on the upper surface of the base 112.

On the contrary, when the wafer WF whose processing has been completed in the reaction chamber 111 is taken out in a state of being mounted on the carrier C, the base 112 is lowered as shown in fig. D from the state shown in fig. 5E, the carrier C is supported only by the carrier lift pins 115, the 1 st blade 123 is advanced between the carrier C and the base 112 as shown in fig. C, then the three carrier lift pins 115 are lowered as shown in fig. B, the 1 st blade 123 is mounted on the carrier C, and the hand of the 1 st robot 121 is operated. This enables the wafer WF after the completion of the processing to be taken out in a state of being mounted on the carrier C.

In the vapor phase growth apparatus 1 of the present embodiment, in order to transfer the carrier C between the steps from the load lock chamber 13 to the reaction chamber 111, the wafer WF before processing is placed on the carrier C in the load lock chamber 13, and the wafer WF after processing is taken out from the carrier C. Therefore, the load lock chamber 13 is provided with a rack 17 for supporting the carriers C on the upper and lower 2 levels. Fig. 3A is a plan view showing the rack 17 provided in the load lock chamber 13, and fig. 3B is a sectional view of the rack 17 including the wafer WF. The rack 17 of the present embodiment is provided with a fixed rack base 171, a 1 st rack 172 and a 2 nd rack 173 vertically and vertically provided on the rack base 171 and supporting two carriers C in two stages, and three wafer lift pins 174 vertically and vertically provided on the rack base 171.

The 1 st shelf 172 and the 2 nd shelf 173 (in the plan view of fig. 3A, the 2 nd shelf 173 is hidden by the 1 st shelf 172, and only the 1 st shelf 172 is shown) have protrusions for supporting the carriers C at 4 points, and one carrier C is placed on the 1 st shelf 172 and one carrier C is also placed on the 2 nd shelf 173. Further, the carrier C placed on the 2 nd rack 173 is inserted into the gap between the 1 st rack 172 and the 2 nd rack 173.

Fig. 4 is a plan view and a sectional view showing a transfer flow of the wafer WF and the carrier C in the load lock chamber 13, and also shows a flow of mounting the wafer WF before processing on the carrier C in a state where the carrier C is supported by the 1 st shelf 172 as shown in fig. (B). That is, the 2 nd robot 141 provided in the factory interface 14 places one wafer WF stored in the wafer storage container 15 on the 2 nd blade 143, and conveys the wafer WF to the upper portion of the rack 17 through the 1 st door 131 of the load lock chamber 13 as shown in fig. B. Next, as shown in fig. C, the three wafer lift pins 174 are raised with respect to the frame base 171, the wafer WF is temporarily lifted, and the 2 nd blade 143 is retreated as shown in fig. D. As shown in the plan view of fig. (a), the three wafer lift pins 174 are provided at positions not interfering with the 2 nd blade 143. Next, as shown in fig. D and E, the wafer WF is mounted on the carrier C by lowering the three wafer lift pins 174 and raising the 1 st shelf 172 and the 2 nd shelf 173. In this case, the 2 nd robot 141 is stored in the wafer storage container 15 by aligning the direction of the wafer WF in advance so that the positional relationship between the position of the notch WN (see fig. 6) and the 2 nd blade 143 becomes a predetermined relationship, or the 2 nd robot 141 is mounted on the 2 nd blade 143 by aligning the direction of the wafer WF, and is finally mounted so that the relationship between the position of the carrier C in the circumferential direction and the position of the wafer WF in the circumferential direction becomes a relationship as shown in fig. 7C or fig. 8C described later.

On the other hand, when the processed wafer WF carried to the load lock chamber 13 in the state of being placed on the carrier C is carried to the wafer storage container 15, the three wafer lift pins 174 are raised and the 1 st and 2 nd racks 172 and 173 are lowered as shown in fig. D from the state shown in fig. 4E, the wafer WF is supported only by the wafer lift pins 174, the 2 nd blade 143 is advanced between the carrier C and the wafer WF as shown in fig. C, and then the three wafer lift pins 174 are lowered as shown in fig. B, the wafer WF is placed on the 2 nd blade 143, and the 2 nd robot 141 is operated manually. This enables the wafer WF having finished processing to be taken out from the carrier C to the wafer storage container 15. The wafer WF that has finished being processed in the state shown in fig. 4(E) is carried to the 1 st shelf 172 in the mounted state on the carrier C, but the wafer WF can be taken out from the carrier C to the wafer storage container 15 by the same flow in the case of being carried to the 2 nd shelf 173.

In particular, the carrier C of the present embodiment has a structure or shape corresponding to the crystal orientation of the wafer WF (monocrystalline silicon wafer or the like) as a CVD processing substrate, and the CVD film thickness at the peripheral edge portion of the wafer is made uniform by the structure or shape. Fig. 6 is a plan view showing a crystal orientation of a wafer WF (strictly, a single crystal silicon wafer) having a (100) plane as a main surface. In a step of slicing a wafer from a single crystal silicon ingot, a notch WN indicating a crystal orientation is formed in a part of the outer peripheral edge of the wafer WF. As shown in the plan view of the wafer WF shown in fig. 6, the crystal orientation in the present specification is rotated counterclockwise to an angle of 360 degrees by a reference point having an origin Wp of 0 degree. As shown in fig. 6, the crystal orientations of the wafer WF having the (100) plane as the main surface in the peripheral direction are repeated every 45 degrees with the crystal orientations of 0 degrees < 110 >, < 100 > at 45 degrees, and < 110 > at 90 degrees, and further, the crystal orientations are repeated periodically at 90 degrees. In addition, the range between 0 degree and 45 degrees is < 230 >, < 120 >, < 130 >. The film thickness distribution at the outer peripheral edge of the wafer WF is dependent on the crystal orientation, and becomes thicker in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and becomes thinner in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees. That is, the film thickness is continuously changed between a thick film facing each other in the range of the crystal orientation < 110 > direction and a thin film facing each other in the range of the crystal orientation < 100 > direction.

Therefore, the carrier C of the present embodiment has the following structure or shape. Fig. 7A is a main sectional view showing a 1 st example of the carrier C, fig. 7B is a plan view similarly showing the 1 st example of the carrier C, and fig. 7C is a view similarly developed in the direction of the arrow in fig. 7B of the upper surface C12 of the 1 st example of the carrier C. The carrier C of example 1 includes a bottom surface C11 placed on the upper surface of the susceptor 112, an upper surface C12 supported in contact with the outer edge of the back surface of the wafer WF over the entire circumference, an outer circumferential side wall surface C13, and an inner circumferential side wall surface C14, and the upper surface C12 includes an upper surface C121 connected to the outer circumferential side wall surface C13, and an upper surface C122 connected to the inner circumferential side wall surface C14. Then, the entire periphery of the outer peripheral edge of the wafer WF is mounted on the upper surface C122 in contact therewith.

Here, if the height in the vertical direction from the position where the outer peripheral edge of the wafer WF contacts the upper surface C122 to the upper surface C121 is defined as the counterbore depth D, the carrier C of the present embodiment has a shape in which the counterbore depth D2 is relatively large in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and the counterbore depth D1 is relatively small in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees, and the height of the upper surface C121 periodically changes in the circumferential direction so that the counterbore depth therebetween continuously changes between D1 and D2, as shown in fig. 7C.

In the cross-sectional view shown in fig. 7A, in the portion where the counterbore depth D2 is large, the reaction gas flow flowing in the horizontal direction is partially blocked by the upper surface C121 formed relatively high, and therefore stagnation of the reaction gas flow occurs around the outer peripheral edge portion of the wafer WF, and the reaction gas flow rate is slightly reduced. In contrast, in the cross-sectional view shown in fig. 7A, in the portion D1 where the depth of the counterbore is made small, the reaction gas flow flowing in the horizontal direction flows without being partially blocked by the upper surface C121 formed relatively low, and the reaction gas of the target reaction gas flow rate flows including the outer peripheral edge portion of the wafer WF. Therefore, by changing the depth of the counterbore in the circumferential direction as in the development view of fig. 7C, the film thickness of the CVD film becomes relatively thin in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and becomes relatively thick in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees. However, since the wafer having the (100) plane as the main surface has a thick film facing each other in the range of the crystal orientation < 110 > direction and a thin film facing each other in the range of the crystal orientation < 100 > direction as described above, and the film thicknesses of the films continuously change, the depth of the counter bore of the carrier C is set as in example 1, thereby eliminating the periodic variation in the film thickness due to the crystal orientation.

Fig. 7D is a main part sectional view showing another example of the carrier C of the present invention 1. Since the carrier C shown in fig. 7D has an outer diameter smaller than that of the carrier C shown in fig. 7A, the carrier C forms an upper surface C121 together with the outer circumferential ridge 1121 of the base 112 when placed on the upper surface of the base 112. Here, if the height in the vertical direction from the position where the outer peripheral edge of the wafer WF contacts the upper surface C122 to the upper surface C121 of the carrier C and the upper surface of the outer peripheral bump 1121 of the base 112 is defined as the counterbore depth D, the carrier C of the present embodiment has a shape in which the counterbore depth is relatively large D2 in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and relatively small D1 in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees, and the counterbore depth therebetween is periodically changed in the circumferential direction so as to continuously change between D1 and D2, as shown in fig. 7C.

When the carrier C of the present embodiment has a structure or a shape corresponding to the crystal orientation of the wafer WF as the CVD-processed substrate, the structure or the shape of example 2 can be used in addition to example 1. Fig. 8A is a main part cross-sectional view showing a 2 nd example of a vehicle C according to the present invention, fig. 8B is a plan view similarly showing the vehicle C, and fig. 8C is a view similarly showing a pocket width of the vehicle C expanded in a direction of an arrow in fig. 8B.

The carrier C of example 2 includes a bottom surface C11 placed on the upper surface of the susceptor 112, an upper surface C12 supported in contact with the outer edge of the back surface of the wafer WF over the entire circumference, an outer peripheral side wall surface C13, and an inner peripheral side wall surface C14, and the upper surface C12 includes an upper surface C121 connected to the outer peripheral side wall surface C13, and an upper surface C122 connected to the inner peripheral side wall surface C14. Then, the entire periphery of the outer peripheral edge of the wafer WF is mounted on the upper surface C122 in contact therewith.

Here, if the horizontal direction distance from the peripheral edge of the wafer WF to the boundary surface C123 (vertical wall surface) between the upper surface C121 and the upper surface C122 is defined as the pocket width WD, the carrier C of the present embodiment has a shape in which the pocket width is relatively small WD1 in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and relatively large WD2 in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees, as shown in fig. 8C, and the position of the boundary surface C123 periodically changes in the circumferential direction so as to continuously change between WD1 and WD 2.

In the cross-sectional view shown in fig. 8A, since the reaction gas flow flowing in the horizontal direction is partially blocked by the upper surface C121, stagnation of the reaction gas flow occurs around the outer peripheral edge portion of the wafer WF, and the reaction gas flow rate is slightly reduced. Here, in the portion WD1 where the pocket width is small, the stagnation of the reaction gas flow is stopped at the upper portion of the peripheral edge portion of the wafer WF due to the small pocket width, and therefore the reaction gas flow rate is slightly reduced at the peripheral edge portion of the wafer WF. On the other hand, in the portion where the pocket width is set to be large WD2, since the stagnation of the reaction gas flow is deviated from the portion where the pocket width is formed widely, the reaction gas of the target reaction gas flow rate flows including the peripheral edge portion of the wafer WF. Therefore, by changing the pocket width in the circumferential direction as in the developed view of fig. 8C, the CVD film thickness becomes relatively thin in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and becomes relatively thick in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees. However, as described above, in the wafer having the (100) plane as the main surface, since the film thickness continuously changes between the thick film facing in the range of the crystal orientation < 110 > direction and the thin film facing in the range of the crystal orientation < 100 > direction, the pocket width of the carrier C is set as in example 2, and thus the periodic variation in the film thickness due to the crystal orientation can be eliminated.

Fig. 8D is a main part sectional view showing another example of the carrier C of the present invention according to example 2. Since the carrier C shown in fig. 8D has an outer diameter smaller than that of the carrier C shown in fig. 8A, when placed on the upper surface of the base 112, the carrier C constitutes an upper surface C121 together with the outer circumferential ridge 1121 of the base 112. Here, if the distance in the horizontal direction from the outer peripheral edge of the wafer WF to the boundary surface C123 (vertical wall surface) between the upper surface C121 and the upper surface C122 is defined as the pocket width WD, the carrier C of the present embodiment has a shape in which the pocket width is relatively small WD1 in the vicinity of 0 degrees (360 degrees), 90 degrees, 180 degrees, and 270 degrees, and relatively large WD2 in the vicinity of 45 degrees, 135 degrees, 230 degrees, and 315 degrees, and the position of the boundary surface C123 periodically changes in the circumferential direction so as to continuously change between WD1 and WD2, as shown in fig. 8C. Incidentally, the portion where the pocket width is relatively large lacks the raised portion of the outer periphery of the carrier C, and the inner wall of the outer peripheral raised portion 1121 of the base 112 is concave.

Next, a flow of handling the wafer WF and the carrier C before the epitaxial film is grown (hereinafter, also referred to as just before the process) and after the epitaxial film is grown (hereinafter, also referred to as just after the process) in the vapor phase growth apparatus 1 according to the present embodiment will be described. Fig. 9 to 12 are schematic views showing a flow of handling wafers and carriers in the vapor phase growth apparatus according to the present embodiment, and a plurality of wafers W1, W2, and W3 … (for example, 25 wafers in total) are stored in the wafer storage container 15 corresponding to the wafer storage container 15, the load lock chamber 13, and the reaction furnace 11 on one side of fig. 1, and processing is started in this order.

Step S0 in fig. 9 shows a waiting state in which the process is started by the vapor phase growth apparatus 1, and a plurality of wafers W1, W2, and W3 … (for example, 25 wafers in total) are stored in the wafer storage container 15, and the empty carrier C1 is supported by the 1 st shelf 172 and the empty carrier C2 is supported by the 2 nd shelf 173, and the load lock chamber 13 is in an inert gas atmosphere.

In the next step S1, the 2 nd robot 141 places the wafer W1 stored in the wafer storage container 15 on the 2 nd blade 143, and transfers the wafer W to the carrier C1 supported by the 1 st shelf 172 through the 1 st door 131 of the load lock chamber 13. The transfer flow is described with reference to fig. 4.

In the next step S2, the inside of the load-lock chamber 13 is replaced with an inert gas atmosphere in a state where the 1 st door 131 closing the load-lock chamber 13 also closes the 2 nd door 132. Then, the 2 nd gate 132 is opened, the carrier C1 is mounted on the 1 st blade 123 of the 1 st robot 121, the gate valve 114 of the reaction furnace 11 is opened, and the carrier C1 on which the wafer W1 is mounted is transferred to the susceptor 112 through the gate valve 114. The transfer flow is described with reference to fig. 4. In steps S2 to S4, a CVD film is formed on the wafer W1 in the reaction furnace 11.

That is, the carrier C1 carrying the wafer W1 before processing is transferred to the susceptor 112 of the reaction chamber 111, the gate valve 114 is closed, and after a predetermined time of waiting, hydrogen gas is supplied to the reaction chamber 111 through the gas supply device 113, thereby making the reaction chamber 111 a hydrogen atmosphere. Next, the temperature of the wafer W1 in the reaction chamber 111 is raised to a predetermined temperature by the heating lamp, and after pretreatment such as etching and heat treatment is performed as necessary, the source gas is supplied by the gas supply device 113 while controlling the flow rate and/or the supply time. Thereby, a CVD film is formed on the surface of the wafer W1. After the CVD film is formed, hydrogen gas is supplied again to the reaction chamber 111 by the gas supply device 113 to replace the reaction chamber 111 with a hydrogen gas atmosphere, and then the reaction chamber is kept stand by for a predetermined time.

While the wafer W1 is processed in the reaction furnace 11 in steps S2 to S4, the 2 nd robot 141 takes out the next wafer W2 from the wafer container 15 and prepares for the next process. Before that, in the present embodiment, in step S3, the inside of the load-lock chamber 13 is replaced with the inert gas atmosphere in a state where the 2 nd door 132 closing the load-lock chamber 13 also closes the 1 st door 131. Then, the 2 nd door 132 is opened, the carrier C2 supported on the 2 nd rack 173 is transferred to the 1 st rack 172 by the 1 st robot 121, and the 2 nd door 132 is closed. Next, in step S4, the 2 nd robot 141 places the wafer W2 stored in the wafer storage container 15 on the 2 nd blade 143, opens the 1 st door 131, and transfers the wafer W to the carrier C2 supported by the 1 st shelf 172 of the load lock chamber 13.

In this way, in the present embodiment, the step S3 is added, and the unprocessed wafer WF stored in the wafer storage container 15 is mounted on the 1 st rack 172 which is the uppermost rack of the racks 17 in the load lock chamber 13. This is because of the following reason. That is, as shown in step S2, when the empty carrier C2 on which the next wafer W2 is mounted is supported by the 2 nd rack 173, the processed wafer W1 may be transferred to the 1 st rack 172 when the wafer W2 is mounted thereon. Since the carriers C of the vapor phase growth apparatus 1 of the present embodiment are conveyed to the reaction chamber 111, the carriers C become a cause of generation of particles, and when the carriers C1 are supported on the upper portion of the wafers W2 before processing, dust may fall onto the wafers W2 before processing. Therefore, step S3 is added to transfer the empty carrier C2 to the 1 st rack 172 so that the wafer WF before processing is mounted on the uppermost rack (the 1 st rack 172) of the racks 17 in the load lock chamber 13.

In step S5, the inside of the load-lock chamber 13 is replaced with an inert gas atmosphere in a state where the 1 st door 131 closing the load-lock chamber 13 also closes the 2 nd door 132. Then, the gate valve 114 of the reaction furnace 11 is opened, the 1 st blade 123 of the 1 st robot 121 is inserted into the reaction chamber 111, the carrier C1 on which the processed wafer W1 is mounted is transferred, the wafer W is taken out from the reaction chamber 111, the gate valve 114 is closed, the 2 nd gate 132 is opened, and the wafer W is transferred to the 2 nd rack 173 of the load lock chamber 13. Next, the carrier C2 supported by the 1 st shelf 172 is placed on the 1 st blade 123 of the 1 st robot 121, and the carrier C2 on which the wafer W2 before processing is mounted is transferred to the susceptor 112 of the reaction furnace 11 through the wafer transfer chamber 12 and the gate valve 114 is opened as shown in step S6.

In steps S6 to S9, a CVD film is formed on the wafer W2 in the reaction furnace 11. That is, the carrier C2 on which the wafer W2 before processing is mounted is transferred to the susceptor 112 of the reaction chamber 111, the gate valve 114 is closed, and after a predetermined time of waiting, hydrogen gas is supplied to the reaction chamber 111 by the gas supply device 113 to make the reaction chamber 111 a hydrogen atmosphere. Next, the temperature of the wafer W2 in the reaction chamber 111 is raised to a predetermined temperature by the heating lamp, and after pretreatment such as etching and heat treatment is performed as necessary, the source gas is supplied by the gas supply device 113 while controlling the flow rate and/or the supply time. Thereby, a CVD film is formed on the surface of the wafer W2. After the CVD film is formed, hydrogen gas is supplied again to the reaction chamber 111 by the gas supply device 113, and the reaction chamber 111 is replaced with a hydrogen gas atmosphere and then stands by for a predetermined time.

While the wafer W2 is processed in the reaction furnace 11 in steps S6 to S9, the 2 nd robot 141 stores the processed wafer W1 in the wafer container 15, and takes out the next wafer W3 from the wafer container 15 to prepare for the next process. That is, in step S7, the inside of the load-lock chamber 13 is replaced with the inert gas atmosphere in a state where the 2 nd door 132 that closes the load-lock chamber 13 also closes the 1 st door 131. Then, the 1 st door 131 is opened, and the processed wafer W1 is placed on the 2 nd blade 143 from the carrier C1 supported by the 2 nd rack 173 by the 2 nd robot 141, and the processed wafer W1 is stored in the wafer storage container 15 as shown in step S8. Next, in step S8, similarly to step S3 described above, the inside of load lock chamber 13 is replaced with an inert gas atmosphere in a state where 1 st door 131 closing load lock chamber 13 also closes 2 nd door 132. Then, the carrier C2 supported on the 2 nd rack 173 is transferred to the 1 st rack 172 by the 1 st robot 121.

Next, in step S9, the inside of the load-lock chamber 13 is replaced with an inert gas atmosphere in a state where the 2 nd door 132 closing the load-lock chamber 13 also closes the 1 st door 131. Then, the 2 nd robot 141 places the wafer W3 stored in the wafer storage container 15 on the 2 nd blade 143, and opens the 1 st door 131 to transfer the wafer W to the carrier C1 supported by the 1 st shelf 172 of the load lock chamber 13 as shown in step S9.

In step S10, similarly to step S5 described above, the inside of the load-lock chamber 13 is replaced with an inert gas atmosphere in a state where the 1 st door 131 closing the load-lock chamber 13 also closes the 2 nd door 132. Then, the gate valve 114 of the reaction furnace 11 is opened, the 1 st blade 123 of the 1 st robot 121 is inserted into the reaction chamber 111, the carrier C2 on which the processed wafer W2 is mounted is placed, the gate valve 114 is closed, the 2 nd door 132 is opened, and the wafer is transferred from the reaction chamber 111 to the 2 nd rack 173 of the load lock chamber 13. Next, carrier C1 supported by the 1 st shelf 172 is placed on the 1 st blade 123 of the 1 st robot 121, and carrier C1 on which the wafer W3 before processing is mounted is transferred to the susceptor 112 of the reactor 11 through the wafer transfer chamber 12 as shown in step S11.

In step S10, similarly to step S7 described above, the inside of the load-lock chamber 13 is replaced with an inert gas atmosphere in a state where the 2 nd door 132 closing the load-lock chamber 13 also closes the 1 st door 131. Then, the 1 st door 131 is opened, and the processed wafer W2 is transferred from the carrier C2 supported by the 2 nd rack 173 to the 2 nd blade 143 by the 2 nd robot 141, and the processed wafer W2 is stored in the wafer storage container 15 as shown in step S11. Thereafter, the above steps are repeated until all the wafers WF stored in the wafer storage container 15 before being processed are processed.

As described above, in the vapor phase growth apparatus 1 of the present embodiment, the structure or shape of the carrier C on which the wafer WF is mounted and which is transported to the reaction chamber 111 is specifically a structure or shape in which the counterbore depth D or the pocket width WD in the circumferential direction is set to have a relationship corresponding to the crystal orientation of the wafer WF in the circumferential direction, and the 2 nd robot 141 mounts the wafer WF before processing on the carrier C while adjusting the crystal orientation of the wafer WF before processing and the structure or shape in the circumferential direction to have a corresponding relationship, so that it is possible to eliminate the periodic variation in film thickness due to the crystal orientation.

In the vapor phase growth apparatus 1 of the present embodiment, while the process is performed in the reaction furnace 11, the wafers WF before the next process are taken out of the wafer container 15 and prepared, or the processed wafers WF are stored in the wafer container 15, so that the time required for only carrying can be minimized. In this case, as shown in the rack 17 of the present embodiment, when the number of waiting times of the carriers C in the load lock chamber 13 is set to 2 or more, the degree of freedom of shortening only the time taken for transportation becomes further high. Considering the exclusive space of the load lock chamber 13, the exclusive space of the entire vapor phase growth apparatus 1 becomes smaller when the plurality of carriers C are arranged in a plurality of stages in the vertical direction than when the plurality of carriers C are arranged in the horizontal direction. However, when a plurality of carriers C are arranged in a plurality of stages in the vertical direction, the carriers C may be supported on the upper portion of the wafer WF before processing, and dust may fall onto the wafer WF before processing. However, in the vapor phase growth apparatus 1 of the present embodiment, steps S3 and S8 are added so that the wafer WF before processing is mounted on the uppermost rack (the 1 st rack 172) of the racks 17 of the load lock chamber 13, and the empty carrier C2 is transferred to the 1 st rack 172, whereby the wafer WF before processing is mounted on the uppermost carrier C. As a result, the adhesion of particles to the wafer WF by the carrier C can be suppressed, and the quality of the LPD can be improved.

Description of the reference numerals

1 … vapor phase growth apparatus

11 … reaction furnace

111 … reaction chamber

112 … base

113 … gas supply device

114 … gate valve

115 … Carrier Lift Pin

12 … wafer transfer chamber

121 … robot 1

122 … No. 1 robot controller

123 … No. 1 blade

13 … load lock chamber

131 … door 1

132 … door 2

14 … factory interface

141 … No. 2 robot

142 … No. 2 robot controller

143 … No. 2 blade

15 … wafer container

16 … bus controller

17 … shelf

171 … shelf base

172 … item 1

173 nd 173 … nd shelf

174 … wafer lift pin

C … carrier

Bottom surface of C11 …

Upper surface of C12 …

C13 … outer peripheral side wall surface

C14 … inner peripheral side wall surface

WF … wafer.