阅读说明：本技术 一种面向量子shor算法的仿真方法及装置 (Quantum shor algorithm-oriented simulation method and device ) 是由 张新 赵雅倩 李仁刚 于 2019-11-07 设计创作，主要内容包括：本发明公开了一种面向量子shor算法的仿真方法及装置,应用于主机端,可以将待分解数与随机数发送至FPGA端,以使所述FPGA端根据所述待分解数与所述随机数进行量子仿真处理获得与待求量子态中的周期有关的测量参数,其中,所述随机数与所述待分解数互质,且所述随机数小于所述待分解数；根据所述测量参数进行连分式展开,获得所述待求量子态中的周期；根据所述周期,获得所述待分解数的各分解参数。本发明通过FPGA端运行量子计算中的量子仿真处理部分,主机端运行量子计算中的常规计算处理部分的技术手段,降低仿真过程的延迟,提升了仿真效率。(The invention discloses a quantum shor algorithm-oriented simulation method and device, which are applied to a host end and can send a number to be decomposed and a random number to an FPGA end so that the FPGA end carries out quantum simulation processing according to the number to be decomposed and the random number to obtain measurement parameters related to a period in a quantum state to be solved, wherein the random number and the number to be decomposed are relatively prime, and the random number is smaller than the number to be decomposed; carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved; and obtaining each decomposition parameter of the number to be decomposed according to the period. According to the invention, by adopting the technical means that the FPGA terminal runs the quantum simulation processing part in the quantum computation and the host terminal runs the conventional computation processing part in the quantum computation, the delay of the simulation process is reduced and the simulation efficiency is improved.)

1. A simulation method for a quantum shor algorithm is characterized in that the method is applied to a host side, and the method comprises the following steps:

sending a number to be decomposed and a random number to an FPGA end so that the FPGA end carries out quantum simulation processing according to the number to be decomposed and the random number to obtain a measurement parameter related to a period in a quantum state to be solved, wherein the random number and the number to be decomposed are relatively prime, and the random number is smaller than the number to be decomposed;

carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved;

and obtaining each decomposition parameter of the number to be decomposed according to the period.

2. The method according to claim 1, wherein said obtaining each decomposition parameter of said number to be decomposed according to said period comprises:

and processing the period according to Euclidean rolling phase division to obtain each decomposition parameter of the number to be decomposed.

3. The method of claim 2, wherein the processing the cycle according to euclidean cyclotomic division to obtain each decomposition parameter of the number to be decomposed comprises:

according to a^r/2Calculating to obtain a first numerical value in the range of +/-1, wherein a is the random number and r is the period;

and determining the first numerical value and the greatest common divisor of the number to be decomposed as the decomposition parameter of the number to be decomposed.

4. The method according to claim 1, wherein after obtaining the decomposition parameters of the number to be decomposed according to the period, the method further comprises:

judging whether the product of each decomposition parameter is equal to the number to be decomposed, if so, determining that each decomposition parameter is the correct decomposition parameter of the number to be decomposed, if not, determining that each decomposition parameter is not the correct decomposition parameter of the parameter to be decomposed, selecting another random number, returning to execute the step of sending the number to be decomposed and the random number to an FPGA end so that the FPGA end carries out quantum simulation treatment according to the number to be decomposed and the random number to obtain the measurement parameters related to the period in the quantum state to be solved.

5. The method of claim 1, wherein the FPGA terminal comprises a first quantum register, a second quantum register and a quantum gate, the first quantum register is connected with the quantum gate, and the initial quantum state of the first quantum register is the same as the initial quantum state of the second quantum register.

6. The method according to claim 5, wherein the FPGA terminal performs quantum simulation processing according to the number to be decomposed and the random number to obtain a quantum state to be solved and measurement parameters related to a period in the quantum state to be solved, and the method comprises the following steps:

the FPGA end initializes the first quantum register and the second quantum register according to the number to be decomposed and the random number to obtain initial quantum states of the first register and the second register, wherein the initial quantum states of the first quantum register and the second quantum register are the same;

the FPGA end constructs an initial quantum state of the second quantum register according to the number to be decomposed and the random number to obtain a quantum entangled state of the first quantum register and the second quantum register;

the FPGA end measures the quantum entanglement state of the second quantum register to obtain a first quantum state of the first quantum register;

the FPGA end carries out Fourier transform on the first quantum state of the first quantum register to obtain the quantum state to be solved of the first quantum register;

and the FPGA measures the quantum state to be solved to obtain a measurement parameter related to the period parameter of the quantum state to be solved.

7. The method of claim 6, wherein the initial quantum states of the first quantum register and the second quantum register are:

wherein L is the number of quantum bits of the first quantum register and the second quantum register, and the number of quantum bits satisfies: n is a radical of²≤2^L≤2N²；

The quantum entanglement states of the first quantum register and the second quantum register are as follows:

wherein a is the random number, and N is the number to be decomposed;

the first quantum state of the first quantum register is:

wherein the content of the first and second substances,l is an offset and r is the period;

the quantum state to be solved of the first quantum register is as follows:

wherein i is an imaginary number and y is a measurement parameter related to a period in the quantum state to be solved.

8. The quantum shor algorithm-oriented simulation device is applied to a host side, and comprises: a simulation value sending unit, a period obtaining unit and a decomposition parameter determining unit,

the simulation numerical value sending unit is used for sending the number to be decomposed and the random number to the FPGA end so that the FPGA end carries out quantum simulation processing according to the number to be decomposed and the random number to obtain measurement parameters related to the period in the quantum state to be solved, wherein the random number and the number to be decomposed are relatively prime, and the random number is smaller than the number to be decomposed;

the period obtaining unit is used for carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved;

and the decomposition parameter obtaining unit is used for obtaining each decomposition parameter of the number to be decomposed according to the period.

9. The apparatus according to claim 8, wherein the decomposition parameter obtaining unit is specifically configured to process the cycle according to euclidean cyclotomic division to obtain each decomposition parameter of the number to be decomposed.

10. The apparatus of claim 8, further comprising: a judging unit, a correct decomposition parameter determining unit and a random number selecting unit,

the judging unit is used for judging whether the product of the decomposition parameters is equal to the number to be decomposed or not after the decomposition parameter obtaining unit obtains the decomposition parameters of the number to be decomposed according to the period, if so, the correct decomposition parameter determining unit is triggered, and if not, the random number selecting unit is triggered;

the correct decomposition parameter determining unit is used for determining that each decomposition parameter is the correct decomposition parameter of the number to be decomposed;

the random number selection unit is used for determining that each decomposition parameter is not the correct decomposition parameter of the parameter to be decomposed, selecting another random number and triggering the simulation numerical value sending unit.

Technical Field

The invention relates to the field of data simulation, in particular to a quantum shor algorithm-oriented simulation method and device.

Background

With the continuous development of science and technology, the demand of people on the computing power of traditional computers is gradually increased. Since it is increasingly difficult to improve the computing power of the conventional computer by increasing the integration level of the components, the quantum computer with higher computing power than the conventional computer becomes a key research object for those skilled in the art.

Quantum computers rely on quantum algorithms, the quantum algorithms are mainly researched through quantum simulation computing platforms, however, the quantum simulation computing platforms mainly perform simulation through clustered software, and simulation process delay is large, so that simulation efficiency is low.

Disclosure of Invention

In view of the above problems, the present invention provides a simulation method and apparatus for quantum shor algorithm, which overcomes or at least partially solves the above problems, and the technical solution is as follows:

a simulation method for a quantum shor algorithm is applied to a host side, and comprises the following steps:

sending a number to be decomposed and a random number to an FPGA end so that the FPGA end carries out quantum simulation processing according to the number to be decomposed and the random number to obtain a measurement parameter related to a period in a quantum state to be solved, wherein the random number and the number to be decomposed are relatively prime, and the random number is smaller than the number to be decomposed;

carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved;

and obtaining each decomposition parameter of the number to be decomposed according to the period.

Optionally, the obtaining, according to the period, each decomposition parameter of the number to be decomposed includes:

and processing the period according to Euclidean rolling phase division to obtain each decomposition parameter of the number to be decomposed.

Optionally, the processing the cycle according to euclidean cycloidal division to obtain each decomposition parameter of the number to be decomposed includes:

according to a^r/2Calculating to obtain a first numerical value in the range of +/-1, wherein a is the random number and r is the period;

and determining the first numerical value and the greatest common divisor of the number to be decomposed as the decomposition parameter of the number to be decomposed.

Optionally, after obtaining the decomposition parameters of the number to be decomposed according to the period, the method further includes:

judging whether the product of each decomposition parameter is equal to the number to be decomposed, if so, determining that each decomposition parameter is the correct decomposition parameter of the number to be decomposed, if not, determining that each decomposition parameter is not the correct decomposition parameter of the parameter to be decomposed, selecting another random number, returning to execute the step of sending the number to be decomposed and the random number to an FPGA end so that the FPGA end carries out quantum simulation treatment according to the number to be decomposed and the random number to obtain the measurement parameters related to the period in the quantum state to be solved.

Optionally, the FPGA end includes a first quantum register, a second quantum register, and a quantum gate, where the first quantum register is connected to the quantum gate, and the initial quantum state of the first quantum register is the same as the initial quantum state of the second quantum register.

Optionally, the performing, by the FPGA end, quantum simulation processing according to the number to be decomposed and the random number to obtain a quantum state to be solved and measurement parameters related to a period in the quantum state to be solved includes:

the FPGA end initializes the first quantum register and the second quantum register according to the number to be decomposed and the random number to obtain initial quantum states of the first register and the second register, wherein the initial quantum states of the first quantum register and the second quantum register are the same;

the FPGA end constructs an initial quantum state of the second quantum register according to the number to be decomposed and the random number to obtain a quantum entangled state of the first quantum register and the second quantum register;

the FPGA end measures the quantum entanglement state of the second quantum register to obtain a first quantum state of the first quantum register;

the FPGA end carries out Fourier transform on the first quantum state of the first quantum register to obtain the quantum state to be solved of the first quantum register;

and the FPGA measures the quantum state to be solved to obtain a measurement parameter related to the period parameter of the quantum state to be solved.

Optionally, the initial quantum states of the first quantum register and the second quantum register are:

wherein L is the number of quantum bits of the first quantum register and the second quantum register, and the number of quantum bits satisfies: n is a radical of²≤2^L≤2N²；

The quantum entanglement states of the first quantum register and the second quantum register are as follows:

wherein a is the random number, and N is the number to be decomposed;

the first quantum state of the first quantum register is:

wherein the content of the first and second substances,

l is an offset and r is the period;

the quantum state to be solved of the first quantum register is as follows:

wherein i is an imaginary number and y is a measurement parameter related to a period in the quantum state to be solved.

A quantum shor algorithm-oriented simulation device is applied to a host side and comprises: a simulation value sending unit, a period obtaining unit and a decomposition parameter obtaining unit,

the simulation numerical value sending unit is used for sending the number to be decomposed and the random number to the FPGA end so that the FPGA end carries out quantum simulation processing according to the number to be decomposed and the random number to obtain measurement parameters related to the period in the quantum state to be solved, wherein the random number and the number to be decomposed are relatively prime, and the random number is smaller than the number to be decomposed;

the period obtaining unit is used for carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved;

and the decomposition parameter obtaining unit is used for obtaining each decomposition parameter of the number to be decomposed according to the period.

Optionally, the decomposition parameter obtaining unit is specifically configured to process the cycle according to euclidean rolling phase division to obtain each decomposition parameter of the number to be decomposed.

Optionally, the apparatus further comprises: a judging unit, a correct decomposition parameter determining unit and a random number selecting unit,

the judging unit is used for judging whether the product of the decomposition parameters is equal to the number to be decomposed or not after the decomposition parameter obtaining unit obtains the decomposition parameters of the number to be decomposed according to the period, if so, the correct decomposition parameter determining unit is triggered, and if not, the random number selecting unit is triggered;

the correct decomposition parameter determining unit is used for determining that each decomposition parameter is the correct decomposition parameter of the number to be decomposed;

the random number selection unit is used for determining that each decomposition parameter is not the correct decomposition parameter of the parameter to be decomposed, selecting another random number and triggering the simulation numerical value sending unit.

By means of the technical scheme, the simulation method and device for the quantum shor algorithm, provided by the invention, are applied to a host end, and can be used for sending a to-be-decomposed number and a random number to an FPGA end so that the FPGA end carries out quantum simulation processing according to the to-be-decomposed number and the random number to obtain a measurement parameter related to a period in a to-be-solved quantum state, wherein the random number and the to-be-decomposed number are relatively prime, and the random number is smaller than the to-be-decomposed number; carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved; and obtaining each decomposition parameter of the number to be decomposed according to the period. According to the invention, by adopting the technical means that the FPGA terminal runs the quantum simulation processing part in the quantum computation and the host terminal runs the conventional computation processing part in the quantum computation, the delay of the simulation process is reduced and the simulation efficiency is improved.

The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 shows a schematic flow diagram of a simulation method for a quantum shor algorithm according to an embodiment of the present invention;

fig. 2 is a schematic flow chart illustrating a quantum simulation processing procedure at the FPGA end according to an embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating the connection between a multiplier and a lookup table according to an embodiment of the present invention;

fig. 4 is a schematic flow chart illustrating another simulation method for a quantum shor algorithm according to an embodiment of the present invention;

fig. 5 is a schematic flow chart illustrating another simulation method for a quantum shor algorithm according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram illustrating a simulation apparatus for a quantum shor algorithm according to an embodiment of the present invention;

fig. 7 shows a schematic structural diagram of another simulation apparatus for a quantum shor algorithm according to an embodiment of the present invention.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

As shown in fig. 1, a quantum shor algorithm-oriented simulation method provided in an embodiment of the present invention is applied to a host, and the method includes:

s100, sending a number to be decomposed and a random number to an FPGA end so that the FPGA end carries out quantum simulation processing according to the number to be decomposed and the random number to obtain a measurement parameter related to a period in a quantum state to be solved, wherein the random number and the number to be decomposed are relatively prime, and the random number is smaller than the number to be decomposed.

The host may be an electronic device carrying a Central Processing Unit (CPU). The parameter to be decomposed may be an integer to be decomposed. The method embodiment can randomly select a natural number as the random number. Optionally, the parameter to be decomposed and the random number are relatively prime, and the random number is smaller than the parameter to be decomposed.

The FPGA side may be a device carrying an FPGA (Field-Programmable Gate Array), such as an FPGA processing board. The FPGA and the host device may be communicatively connected through a communication bus, where the communication bus may be a bus using PCI-Express (high speed serial computer expansion bus standard). The FPGA end can be in communication connection with the host end.

According to the embodiment of the invention, the decomposition parameters for directly decomposing the number to be decomposed to obtain the number to be decomposed can be converted into the decomposition parameters for obtaining the number to be decomposed by solving the period of the periodic function according to the number theory. For example, N is the number to be decomposed, and a is the random number, embodiments of the present invention can be generally applied toOver-computing periodic function f_a,N(x)＝a^x(modN) and then obtaining the decomposition parameters of the number to be decomposed.

It should be noted that the embodiment of the present invention obtains the periodic function f_a,N(x)＝a^xThe periodic process of (modN) may use a quantum shor algorithm. According to the embodiment of the invention, the number to be decomposed and the random number can be subjected to quantum simulation processing in the FPGA end according to the quantum shor algorithm, and then the periodic function f capable of being solved can be obtained_a,N(x)＝a^x(modN) periodic measurement parameters.

The embodiment of the invention can send the number to be decomposed and the random number to the FPGA end through the communication bus. Optionally, the FPGA end may include a first quantum register, a second quantum register, and a quantum gate, where the first quantum register is connected to the quantum gate, and the initial quantum state of the first quantum register is the same as the initial quantum state of the second quantum register.

Optionally, as shown in fig. 2, the quantum simulation processing process at the FPGA end may include:

s10, initializing the first quantum register and the second quantum register by the FPGA end according to the number to be decomposed and the random number, and obtaining initial quantum states of the first register and the second register, wherein the initial quantum states of the first quantum register and the second quantum register are the same.

Wherein the initial quantum states of the first quantum register and the second quantum register are:

wherein L is the number of quantum bits of the first quantum register and the second quantum register, and the number of quantum bits satisfies: n is a radical of²≤2^L≤2N²。

And S20, the FPGA end constructs the initial quantum state of the second quantum register according to the number to be decomposed and the random number, and the quantum entanglement states of the first quantum register and the second quantum register are obtained.

The quantum entanglement states of the first quantum register and the second quantum register are as follows:

wherein a is the random number, and N is the number to be decomposed.

Specifically, the quantum entangled state may be obtained by performing unitary transformation on the initial quantum states of the first quantum register and the second quantum register. The quantum entanglement states of the first quantum register and the second quantum register are the same.

And S30, the FPGA end measures the quantum entanglement state of the second quantum register to obtain the first quantum state of the first quantum register.

The first quantum state of the first quantum register is:

wherein the content of the first and second substances,l is the offset and r is the period.

In particular, the embodiments of the invention are in pairs

When measurement is carried out, the collapse state of the quantum entanglement state of the second quantum register is assumed to be z ═ a^l(modN) since the period of the quantum simulation function is r, a can be obtained^l(modN)＝a^jr+l(modN), where l ≦ r, j ≦ 0, 1., a, so x ═ l, l + r., l + Ar, so when the quantum entangled state of the second quantum register collapses, the quantum entangled state of the first quantum register collapses to the first quantum state accordingly:

s40, the FPGA end carries out Fourier transform on the first quantum state of the first quantum register to obtain the quantum state to be solved of the first quantum register.

The quantum state to be solved of the first quantum register is as follows:

wherein i is an imaginary number and y is a measurement parameter related to a period in the quantum state to be solved.

The FPGA end can also carry out Fourier transform on the first quantum state through a lookup table connected with the multiplier. Specifically, the FPGA end can complete the index calculation in the Fourier transform process through a lookup table connected with a multiplier. The connection of the multiplier to the look-up table may be as shown in figure 3.

And S50, the FPGA measures the quantum state to be solved, and measurement parameters related to the period parameters of the quantum state to be solved are obtained.

Wherein, the measurement parameters are positive integers.

S200, carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved.

Among them, continuous fractional expansion (continuous fractional expansion) is a frequency domain order reduction method of large-scale system, and its basic starting point is: the model is expanded into a continuous division type, and then the partial coefficients which play the main role in the previous step are intercepted to form a simplified model.

Specifically, after the FPGA measures the quantum state to be solved, the obtained measurement parameters satisfy the inequality

Wherein q is 2^LK is 0,1, 2, n. Embodiments of the present invention may align the inequality

And performing continuous component expansion, and determining the value of r as the period in the quantum state to be solved when the greatest common divisor of k and r is 1.

S300, obtaining each decomposition parameter of the number to be decomposed according to the period.

Optionally, as shown in fig. 4, in another simulation method for a quantum shor algorithm provided in the embodiment of the present invention, step S300 may include:

s310, processing the cycle according to Euclidean rolling phase division method to obtain each decomposition parameter of the number to be decomposed.

Specifically, the embodiment of the present invention can be according to a^r/2And +/-1, calculating to obtain a first numerical value, wherein a is the random number and r is the period. And determining the first numerical value and the greatest common divisor of the number to be decomposed as the decomposition parameter of the number to be decomposed.

For ease of understanding, the description is made herein by way of example: assuming that the random number a is 7, the period r is 4, and the number to be decomposed N is 15, the method is based on a^r/2The first values calculated by ± 1 are 48 and 50, the greatest common divisor of 48 and 15 is 3, and the greatest common divisor of 50 and 15 is 5, so that the decomposition parameters of the number to be decomposed are 3 and 5.

It should be noted that the random number in the embodiment of the present invention is a randomly selected natural number, and since the number to be decomposed may be an integer with a larger value in an actual situation, the embodiment of the present invention may check the decomposition parameters after determining each decomposition parameter of the number to be decomposed, and determine whether the decomposition parameter is a correct decomposition parameter of the number to be decomposed.

Specifically, as shown in fig. 5, after step S300, the another simulation method for a quantum shor algorithm provided in the embodiment of the present invention may further include:

s400, judging whether the product of the decomposition parameters is equal to the number to be decomposed, if so, executing the step S500, and if not, executing the step S600.

S500, determining that each decomposition parameter is the correct decomposition parameter of the number to be decomposed;

s600, determining that each decomposition parameter is not the correct decomposition parameter of the parameter to be decomposed, selecting another random number, and returning to execute the step S100.

Preferably, in the embodiment of the present invention, steps in the quantum computation-based simulation method provided in the embodiment of the present invention may be edited by OpenCL (Open Computing Language) and RTL (real time Language). It is understood that the embodiment of the present invention may also be edited by other programming languages, and is not further limited herein.

The quantum shor algorithm-oriented simulation method provided by the embodiment of the invention is applied to a host end, and can send a to-be-decomposed number and a random number to an FPGA end, so that the FPGA end carries out quantum simulation processing according to the to-be-decomposed number and the random number to obtain a measurement parameter related to a period in a to-be-solved quantum state, wherein the random number and the to-be-decomposed number are relatively prime, and the random number is smaller than the to-be-decomposed number; carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved; and obtaining each decomposition parameter of the number to be decomposed according to the period. According to the embodiment of the invention, by adopting the technical means that the FPGA terminal runs the quantum simulation processing part in the quantum computation and the host terminal runs the conventional computation processing part in the quantum computation, the delay of the simulation process is reduced and the simulation efficiency is improved.

Corresponding to the above method embodiment, an embodiment of the present invention further provides a quantum shor algorithm-oriented simulation apparatus, a structure of which is shown in fig. 6, the apparatus is applied to a host side, and the apparatus includes: a simulation value transmitting unit 100, a period obtaining unit 200, and a decomposition parameter obtaining unit 300.

The simulation numerical value sending unit 100 is configured to send a to-be-decomposed number and a random number to an FPGA end, so that the FPGA end performs quantum simulation processing according to the to-be-decomposed number and the random number to obtain a measurement parameter related to a period in a to-be-solved quantum state, where the random number and the to-be-decomposed number are relatively prime, and the random number is smaller than the to-be-decomposed number.

The host may be an electronic device carrying a Central Processing Unit (CPU). The parameter to be decomposed may be an integer to be decomposed. The method embodiment can randomly select a natural number as the random number. Optionally, the parameter to be decomposed and the random number are relatively prime, and the random number is smaller than the parameter to be decomposed.

The FPGA side may be a device carrying an FPGA (Field-Programmable Gate Array), such as an FPGA processing board. The FPGA and the host device may be communicatively connected through a communication bus, where the communication bus may be a bus using PCI-Express (high speed serial computer expansion bus standard). The FPGA end can be in communication connection with the host end.

The host end can send the number to be decomposed and the random number to the FPGA end through the communication bus. Optionally, the FPGA end may include a first quantum register, a second quantum register, and a quantum gate, where the first quantum register is connected to the quantum gate, and the initial quantum state of the first quantum register is the same as the initial quantum state of the second quantum register.

The period obtaining unit 200 is configured to perform continuous-division expansion according to the measurement parameter to obtain a period in the quantum state to be solved.

The decomposition parameter obtaining unit 300 is configured to obtain each decomposition parameter of the number to be decomposed according to the period.

Specifically, the decomposition parameter obtaining unit 300 is specifically configured to process the cycle according to euclidean rolling phase division to obtain each decomposition parameter of the number to be decomposed.

Specifically, the decomposition parameter obtaining unit 300 may obtain the decomposition parameter according to a^r/2And +/-1, calculating to obtain a first numerical value, wherein a is the random number and r is the period. And determining the first numerical value and the greatest common divisor of the number to be decomposed as the decomposition parameter of the number to be decomposed.

As shown in fig. 7, another simulation apparatus for a quantum shor algorithm according to an embodiment of the present invention may further include: a judging unit 400, a correct decomposition parameter determining unit 500 and a random number selecting unit 600.

The judging unit 400 is configured to judge whether a product of the decomposition parameters is equal to the number to be decomposed after the decomposition parameter obtaining unit 300 obtains each decomposition parameter of the number to be decomposed according to the period, if so, trigger the correct decomposition parameter determining unit 500, and if not, trigger the random number selecting unit 600.

And the correct factor determining unit is used for determining that each decomposition parameter is a correct decomposition parameter of the number to be decomposed.

The random number selecting unit 600 is configured to determine that each decomposition parameter is not the correct decomposition parameter of the parameter to be decomposed, select another random number, and trigger the simulation value sending unit 100.

The quantum shor algorithm-oriented simulation device provided by the embodiment of the invention is applied to a host end, and can send a to-be-decomposed number and a random number to an FPGA end, so that the FPGA end carries out quantum simulation processing according to the to-be-decomposed number and the random number to obtain a measurement parameter related to a period in a to-be-solved quantum state, wherein the random number and the to-be-decomposed number are relatively prime, and the random number is smaller than the to-be-decomposed number; carrying out continuous-division expansion according to the measurement parameters to obtain the period in the quantum state to be solved; and obtaining each decomposition parameter of the number to be decomposed according to the period. According to the embodiment of the invention, by adopting the technical means that the FPGA terminal runs the quantum simulation processing part in the quantum computation and the host terminal runs the conventional computation processing part in the quantum computation, the delay of the simulation process is reduced and the simulation efficiency is improved.

In this application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.