阅读说明：本技术 具有空白符元侦测电路的无线接收装置以及其空白符元侦测方法 (Wireless receiving device with blank symbol detection circuit and blank symbol detection method thereof ) 是由 魏逢时 童泰来 于 2018-07-27 设计创作，主要内容包括：在本发明提供的无线接收装置中的一空白符元侦测电路接收数据串流,根据该数据串流中数据符元的长度,分次撷取以得到多个撷取结果,将该多个撷取结果进行运算,以决定一现存最大差异量,并将产生该现存最大差异量对应于该数据串流中的位置,判断为最接近一空白符元的尾端的位置。(The invention provides a blank symbol detecting circuit in a wireless receiving device, which receives a data stream, acquires a plurality of acquisition results by times according to the length of data symbols in the data stream, calculates the acquisition results to determine an existing maximum difference, and judges the position which is closest to the tail end of a blank symbol and corresponds to the position in the data stream when the existing maximum difference is generated.)

1. A wireless receiving device, comprising:

a pre-processing circuit for receiving a radio frequency signal and performing a preliminary signal processing; and

a time domain signal processing circuit connected to the pre-processing circuit for receiving a high frequency digital signal, comprising:

a frequency-reducing circuit for reducing the frequency of the high-frequency digital signal to a baseband frequency band to become a baseband digital signal;

a down-sampling circuit for down-sampling the baseband digital signal into a data stream, wherein the data stream comprises a plurality of data symbols and at least one blank symbol; and

a blank symbol detecting circuit, which receives the data stream, and according to the length of one of the data symbols in the data stream, captures a plurality of parts in the data stream for operation in a time-sharing manner to determine a position closest to the tail end of the blank symbol.

2. The wireless receiving device of claim 1, wherein the blanking symbol detection circuit comprises:

an extraction circuit for extracting a plurality of adjacent portions of the data stream in a plurality of times as a plurality of sets of extraction results;

a buffer for buffering the multiple groups of capturing results;

a power accumulation calculating circuit, which respectively carries out power accumulation calculation on the plurality of groups of acquisition results to obtain a plurality of corresponding power accumulation results;

an adder for calculating every two of the power accumulation results to obtain a plurality of subtraction results; and

a maximum value determining circuit, which stores a plurality of difference values corresponding to the plurality of subtraction results respectively, and determines an existing maximum difference value according to the plurality of difference values.

3. The wireless receiving apparatus of claim 2, wherein the maximum value determining circuit in the blanking symbol detecting circuit comprises:

an absolute value circuit for taking the absolute value of the subtraction results to obtain the difference values;

a buffer for storing the plurality of difference values;

a comparator for comparing every two of the plurality of difference quantities each time to generate a current maximum difference quantity;

a maximum value recording circuit for recording the maximum difference value; and

a counter for starting counting when the maximum value recording circuit is stored with an existing maximum difference amount, and making the maximum value recording circuit output the existing maximum difference amount when the count reaches a count upper limit value.

4. The wireless receiving device of claim 3, wherein the two sets of capturing results outputted by the capturing circuit are two adjacent portions of the data stream, and the two differences compared by the comparator each time correspond to the two sets of capturing results to output the maximum current difference.

5. The wireless receiver of claim 3 wherein the count ceiling of the counter is at most a difference between a length of the dummy symbols and a length of the data symbols in the data stream.

6. The wireless receiver of claim 3, wherein when the maximum value recording circuit updates the existing maximum difference and the counter has not counted up to the upper limit, the counter is reset to zero and starts counting again.

7. The wireless receiver of claim 3 wherein the maximum determination circuit further comprises a SNR determination circuit for calculating the current maximum difference and the accumulated power results respectively to obtain a SNR.

8. The wireless receiver of claim 7 wherein the snr decision circuit comprises a divider and a comparator, the divider is configured to calculate the present maximum difference as a dividend and the plurality of power class addition results as divisors to obtain a plurality of division results, and the division results are determined by the comparator to output a maximum division result as the snr.

9. The wireless receiving device of claim 2 wherein the blanking symbol detection circuit further comprises a signal-to-noise ratio determination circuit for calculating the current maximum difference and one of the two power accumulation results corresponding to the subtraction result corresponding to the current maximum difference to determine a signal-to-noise ratio.

10. The wireless receiving device of claim 2, wherein the retrieving circuit retrieves two adjacent portions of the data stream as two sets of retrieving results, each set of retrieving results having a length equal to a length of one data symbol; the adder subtracts the two power accumulation results corresponding to the two previous and next sets of extraction results each time to obtain one of the subtraction results.

11. The wireless receiving device of claim 10 wherein the power accumulation circuit squares the absolute value of N values in each of the plurality of sets of acquisition results, N representing the number of samples in a data symbol length.

12. The wireless receiving device of claim 2 wherein the existing maximum disparity that is output corresponds to a position in the data stream that is closest to the end of the dummy data symbol.

13. A method for detecting a dummy symbol in a data stream received by a wireless receiving device, the data stream including a plurality of data symbols and at least one dummy symbol, the method comprising:

capturing a plurality of parts of the data stream to obtain a plurality of groups of capturing results;

obtaining a plurality of corresponding power accumulation results according to the plurality of groups of acquisition results;

subtracting every two of the plurality of power accumulation results to obtain a plurality of subtraction results; and

determining a current maximum difference according to a plurality of differences corresponding to the subtraction results.

14. The method of claim 13, wherein the step of determining the maximum amount of difference comprises:

comparing every two difference quantities to generate a current maximum difference quantity;

recording the maximum difference and starting counting; and

when the count reaches a count upper limit value, the present maximum difference amount is outputted.

15. The method of claim 14, wherein counting is resumed when the count has not reached the count upper limit and the recorded maximum variance is updated.

16. The method of claim 13, wherein the extracting comprises extracting a portion of the data stream having a length equal to a data symbol each time as one of the plurality of extraction results.

17. The method of claim 13, further comprising: it is determined that the maximum amount of difference that results corresponds to the position in the data stream that is closest to the end of the dummy data symbol.

18. The method of claim 13 further comprising calculating one of the two power accumulation results corresponding to the subtraction result corresponding to the current maximum difference and the current maximum difference to determine a signal-to-noise ratio.

Technical Field

The present invention relates to the field of communication systems, and more particularly, to a technique for detecting the position of a dummy symbol in a data stream and providing a detected signal-to-noise ratio in a communication system.

Background

Orthogonal Frequency Division Multiplexing (OFDM) technology has been widely used in wireless communication systems in recent years because of its advantages such as high spectrum utilization and simple hardware architecture. The Digital Audio Broadcasting (DAB) system adopts a modulation method of Orthogonal Frequency Division Multiplexing (OFDM) of multipath transmission, and has the advantages of noise resistance, interference resistance, resistance to wave propagation fading, suitability for high-speed mobile reception, and the like. It has the additional data service function of transmitting any archive or even image signal, besides providing sound close to the quality of CD.

The signal of the digital audio transmission system is transmitted in a frame (frame) structure, and a plurality of frames constitute a data stream to be transmitted to the receiving end. As shown in fig. 1a, each frame of the digital audio transmission signal is preceded by a null symbol (Nullsymbol), followed by synchronization data and data to be actually received. The receiver synchronizes the data stream before receiving the real data. One of the conventional synchronization methods is to determine the starting position of the dummy symbol according to the energy value measured by the received signal; for example, the measured energy value is visually compared with an energy threshold value, and if the signal energy is smaller than the energy threshold value, the beginning of a blank symbol is determined, so that the beginning of a frame can be determined. Fig. 1b shows a functional block diagram of a receiving device of a current digital audio transmission system. The antenna receives the received signal and processes the received signal by the adc circuit 110, the agc circuit 120, and other pre-stage circuits, and then sequentially transmits the signal to the down-converter circuit 130, the down-sampling circuit 140, and the fft circuit 150. The received signal is transformed into a complex signal in the frequency domain after fast fourier transform, and then the dummy symbol detection circuit 170 performs the above-mentioned operation on the complex signal in the frequency domain to further determine whether the start position of the dummy symbol is found. After finding the start position of the blank symbol, the frame synchronization is completed, and the signal in the frequency domain is continuously transmitted to the post-processing circuit 160 for further signal processing. Since the energy calculation for complex signals is complicated, the amount of calculation for the dummy symbol detection circuit 170 used in the above-mentioned prior art is very large; in addition, the signal energy value calculated by the dummy symbol detection circuit 170 is easily affected by the environment, i.e. the signal energy has weak resistance to the interference and noise caused by multipath transmission, and it is not easy to select an appropriate energy threshold value for the above determination because the channel condition is not constant.

In addition, in the prior art digital audio transmission system, the blank symbol detection and the initial snr in the detection channel are processed separately, which can save many system computation resources and time if they can be processed integrally.

Disclosure of Invention

In order to solve the above problems, the present invention provides a wireless receiving apparatus including a new dummy symbol detection circuit and a new dummy symbol detection method.

According to an embodiment of the present invention, a wireless receiving apparatus including a dummy symbol detection circuit includes a pre-processing circuit, a time domain signal processing circuit, and a dummy symbol detection circuit. The space symbol detection circuit receives a data stream from the time domain signal processing circuit, the data stream comprises a plurality of data symbols and at least one space symbol, and a plurality of parts in the data stream are captured by times according to the length of one data symbol in the data stream to carry out operation so as to judge a position closest to the tail end of the space symbol.

According to another embodiment of the present invention, a dummy symbol detection circuit includes an acquisition circuit, a register, a power accumulation circuit, an adder, and a maximum value determination circuit. The extraction circuit is used for extracting a plurality of adjacent parts of the data stream in a grading way to be used as a plurality of groups of extraction results, and the buffer caches the plurality of groups of extraction results. The power accumulation calculating circuit respectively carries out power accumulation calculation on the multiple groups of acquisition results to obtain a plurality of corresponding power accumulation results; the adder calculates every two power accumulation results to obtain a plurality of subtraction results; the maximum value determining circuit stores a plurality of difference values corresponding to the plurality of subtraction results respectively, and determines an existing maximum difference value according to the plurality of difference values.

In addition to the above elements, the circuit for detecting a dummy symbol according to another embodiment of the present invention further comprises a signal-to-noise ratio determining circuit for calculating the present maximum difference and one of the two power accumulation results corresponding to the subtraction result corresponding to the present maximum difference, respectively, to determine a signal-to-noise ratio.

According to another embodiment of the present invention, a method for detecting a dummy symbol is applied to a data stream received by a wireless receiving device, where the data stream includes a plurality of data symbols and at least one dummy symbol. The detection method comprises the following steps: capturing a plurality of parts of the data stream to obtain a plurality of groups of capturing results; obtaining a plurality of corresponding power accumulation results according to the plurality of groups of acquisition results; subtracting every two of the plurality of power accumulation results to obtain a plurality of subtraction results; and determining a current maximum difference according to a plurality of differences corresponding to the subtraction results.

Another embodiment of the present invention is a method for detecting a dummy symbol, which comprises, in addition to the above steps, calculating one of the two power accumulation results corresponding to the subtraction result corresponding to the present maximum difference and the present maximum difference to determine a signal-to-noise ratio.

The advantages and spirit of the present invention can be further understood by the following detailed description of the invention and the accompanying drawings.

Drawings

FIG. 1a is a diagram of the structure within a data stream of a current digital audio transmission signal;

FIG. 1b is a functional block diagram of a receiver of a conventional digital audio transmission system;

FIG. 2 is a simplified functional block diagram of a wireless receiving device including a blanking symbol detection circuit according to an embodiment of the present invention;

FIG. 3 is a detailed functional block diagram of a dummy symbol detection circuit according to an embodiment of the present invention;

FIG. 4 is a detailed functional block diagram of a maximum value determining circuit in the dummy symbol detecting circuit of FIG. 3 according to an embodiment of the present invention;

FIG. 5a shows a structure of a data stream and a portion of a window frame corresponding to the data stream captured twice;

FIG. 5b is a diagram illustrating the variation of the maximum difference value when different capturing frames capture different portions of the data stream;

FIG. 6a is a detailed block diagram of a blanking symbol detection circuit according to another embodiment of the present invention;

FIG. 6b is a detailed functional block diagram of a maximum value determining circuit in the blanking symbol detecting circuit of FIG. 6a according to an embodiment of the present invention;

FIG. 7 is a detailed circuit block diagram of a blanking symbol detection circuit according to yet another embodiment of the present invention;

FIG. 8 is a flowchart illustrating a method for detecting a dummy symbol according to an embodiment of the present invention; and

FIG. 9 is a flowchart illustrating the detailed procedure of step 410 in FIG. 8 according to an embodiment of the present invention.

Description of the symbols

110A/D converter

120 automatic gain control circuit

130 frequency reducing circuit

140 down-sampling circuit

150 fast fourier transform circuit

160 post-stage processing circuit

170 blank symbol detection circuit

200 radio receiving apparatus

210 pre-stage processing circuit

230 time domain signal processing circuit

231 frequency reducing circuit

232 down-sampling circuit

233 blank symbol detection circuit

250 frequency domain signal processing circuit

251 fast fourier transform circuit

252 post-stage processing circuit

330 pick-up circuit

332 buffer

334 power accumulation calculating circuit

336 adder

338 maximum value decision circuit

339 SNR decision circuit

383 buffer

385 comparator

387 maximum value recording circuit

389 counter

Method for detecting 400 blank symbols

CP Cyclic Prefix

Max maximum amount of discrepancy extant

S401-S414 flow steps

S510-S523 flow steps

s (n) down-sampling results

Window frame

Detailed Description

It is noted that the drawings include functional block diagrams that represent various functional blocks that can be associated with one another. The drawings are not intended to be exhaustive of the circuit diagrams, and the connecting lines are merely intended to represent the flow of signals. The various interactions between functional elements and/or processes need not be achieved through direct electrical connections. Moreover, the functions of the individual elements need not be distributed as shown in the drawings, and the distributed blocks need not be implemented by distributed electronic elements.

A wireless receiving apparatus including a null symbol detection circuit according to an embodiment of the present invention is shown in fig. 2 in a simplified functional block diagram. In practice, the dummy symbol detection circuit can be incorporated into various wireless receiving devices that need to detect a blank symbol in a received signal for signal synchronization, such as but not limited to digital audio transmission (DAB) receiving devices. As shown in fig. 2, the wireless receiving apparatus includes a pre-processing circuit 210, a time domain signal processing circuit 230, and a frequency domain signal processing circuit 250. The pre-processing circuit 210 may include digital-to-analog conversion circuits, automatic gain control circuits, and the like; the time domain signal processing circuit 230 includes a down-converter 231, a down-sampling circuit 232 and a dummy detection circuit 233; the frequency domain signal processing circuit 250 includes a fast fourier transform circuit 251 and a post-processing circuit 252. As known to those skilled in the art, the post-processing circuit 252 may include, for example, an deinterleaver, a demodulator, a decoder, etc., which are elements that may be included in a conventional frequency-domain signal processing circuit, and the details thereof are not repeated.

The antenna of the wireless receiving apparatus of this embodiment receives the high frequency analog signal and the pre-processing circuit 210 performs initial signal processing, for example, an analog-to-digital converter converts the analog signal received by the front-end circuit into a digital signal and an automatic gain control circuit adjusts the amplitude of the digital signal for subsequent circuit processing. Then, the down-converting circuit 231 of the time domain signal processing circuit 230 down-converts the high frequency digital signal to a baseband (baseband), and down-samples the high frequency digital signal by the down-sampling circuit 232 to obtain a symbol rate (symbol rate) suitable for the transmitting end. The output signal of the down-sampling circuit 232 is referred to as a data stream s (n) and is composed of a series of symbols. The data stream s (n) enters the dummy symbol detection circuit 233, which performs operations on a plurality of symbols of the data stream to find the position closest to the end of the dummy symbol, i.e. the position near the beginning of the frame. The following describes an embodiment of the blank symbol detection circuit 233 in detail.

Referring to fig. 3, the blank symbol detection circuit 233 according to an embodiment of the present invention includes an acquisition circuit 330, a register 332, a power accumulation calculation circuit 334, an adder 336 and a maximum value determination circuit 338. Referring to fig. 5a, the structure sequence of each frame in the data stream to which the embodiment of the present invention is applied is Null symbol (Null symbol), preamble symbol used as synchronization data, system information symbol, and data symbol actually to be transmitted. It should be noted that the length of the blank symbol is specified to be 1.297 milliseconds (ms) in the digital audio transmission system, and the length of the other data symbols is specified to be 1.246 ms (ms), where the length of the data symbol includes a Cyclic Prefix (CP) as shown in the figure, and the CP is a guard interval used for transmitting the OFDM signal, which is not described herein in detail. By utilizing the characteristics of the data stream in fig. 5a, the capturing circuit 330 captures portions of the data stream as capturing results for comparison by subsequent circuits to determine the positions of the blank symbols; the buffer 332 is used for buffering the fetched result; the power accumulation circuit 334 calculates the extracted results to obtain a comparison reference. Then, the adder 336 performs subtraction to obtain the comparison result, and the comparison result is inputted to the maximum value determining circuit 338 for final judgment. Each of the above elements will be described in detail below.

After the data stream s (N) outputted from the down-sampling circuit 232 enters the dummy symbol detection circuit 233, one segment of the data stream s (N) is first extracted by the extraction circuit 330 and stored in the buffer circuit, and the extraction length of each time is designed to conform to the length of one data symbol (symbol), which is set to be N (1.246 ms in the case of digital audio transmission system). Since the data stream s (N) is sampled in time, one set of the extraction results obtained by the extraction circuit 330 each time is N samples in the data stream s (N), where N is 0 to N-1. The fetch circuit 330 stores two fetch results obtained in two previous and next fetches in the buffer area a1 and the buffer area B1 of the register 332, respectively. If the current acquisition result is s (N) and N is 0 to N-1, the previous acquisition result is s (N-N) and N is 0 to N-1. The power accumulation circuit 334 includes a computing circuit a2 and a computing circuit B2, which respectively perform power accumulation operations on two sets of extraction results in the buffer area a1 and the buffer area B1. Taking the computing circuit a2 as an example, it squares all N sampling values of the set of extraction results in the buffer area a1 after taking absolute values respectively, and then accumulates the N squared values to obtain a power accumulation result A3, which is mathematically expressed as

The computing circuit B2 also performs the same operation on the set of fetched results in the buffer B1 to obtain a power accumulation result B3, which is expressed asThe calculating circuit a2 and the calculating circuit B2 may be two sets of the same circuits, or a set of the same circuits for calculating different sets of capturing results in turn, and the manner of this embodiment should not limit the scope of the present invention. Then, the power accumulation result a3 and the power accumulation result B3 are output to the adder 336 for subtraction, and the subtraction result is input to the maximum value determining circuit 338 for the final operation. In the present embodiment, the adder 336 subtracts the power accumulation result A3 from the power accumulation result B3, that is, the power accumulation result corresponding to the previous acquisition result minus the power accumulation result corresponding to the next acquisition result, and all drawings related to the present embodiment are drawn based on this; however, it should be noted that the subtraction in other embodiments of the present invention (i.e. subtracting the power accumulation result B (previous time) from the power accumulation result a (current time)) may be the reverse subtraction, and should not be construed as the scope limitation, and the principles and calculation methods of the two are the same, and therefore, the description thereof will not be repeated.

The detailed circuit block diagram of the maximum value determining circuit 338 of the present embodiment is shown in fig. 4, which includes a register 383, a comparator 385, a maximum value recording circuit 387, and a counter 389. The subtraction result is referred to as the difference between the power accumulation results corresponding to the two previous and subsequent acquisition results and is expressed as

Fig. 5a is a schematic diagram of the extracting circuit 330 extracting different portions of the window frame to extract the data stream twice before and after the data stream structure, where the window frame is represented by T-0 and T-1, the length of the window frame is the extracting length, T-0 represents the previous extraction, and T-1 (current) represents the position of the data stream (currently) extracted this time. Therefore, each T should have a differenceFor example, when T is 0, the difference between the power accumulation result of T-1 and the power accumulation result of T-0 is calculated, and T is 0The difference between the power accumulation result with T-0 and the power accumulation result with T-1 is calculated at 1, the difference obtained with T-0 is called the previous difference, the difference obtained with T-1 is called the current difference, the two differences are inputted into the comparator 385 for comparison, and the larger difference between the two is stored in the maximum value recording circuit 387 as the current maximum difference. Once the maximum value recording circuit 387 has taken the action to change the maximum difference present, the counter 389 starts counting. The counter 389 is set to have a count upper limit, which is ideally set to be the difference between the blank symbol length and the data symbol length. In this embodiment, for example, the number of samples corresponding to the difference between the length of the blank symbol 1.297 milliseconds (ms) and the length of the data symbol 1.246 milliseconds (ms) in the digital audio transmission system is 104 sampling points. The counter 389 outputs the maximum difference present in the maximum value recording circuit 387 when the count upper limit value is reached. Assuming that the existing maximum difference of the maximum value recording circuit 387 is updated (i.e., a greater difference is stored) before the counter 389 reaches the upper limit value, the counter 389 is zeroed and begins counting again. The purpose of the counter 389 arrangement is to ensure the reliability of the maximum value, reducing the likelihood that incorrect sampling results will occur due to noise or other interference, resulting in an incorrect maximum value.

Fig. 5b is a diagram illustrating the variation of the window in T-1, T-0 and T-1, and the maximum value recording circuit 387 stores the value of the current maximum difference. T-1, T-0 and T-1 represent different time intervals for extracting the data stream to obtain different extraction results, and the length of one T represents the time of N samples (i.e. the extraction length). The values and slopes of the existing maximum variance value trend graph are for illustrative purposes and are not an exact representation. As can be seen from fig. 5b, assuming that the previous extraction result (e.g. T ═ 0) corresponds to the end of one frame of the data stream, and the current extraction result (e.g. T ═ 1) corresponds to the empty symbol in the data stream, the existing maximum disparity will be the largest of all the disparities (Max in the figure). In other words, when the largest amount of difference is found, it can be determined that the end of the nearest blank symbol has been found. It is noted that generating the maximum amount of difference corresponds to the position in the data stream being near the end of the blank symbol, rather than the beginning of the data symbol. The present invention utilizes this characteristic to enable the counter to have a position where the margin count exceeds the maximum value to confirm the true maximum value (Max), and utilizes the Cyclic Prefix (CP) in the data stream structure as the characteristic of the protection interval to enable the wireless receiving device of the present invention to perform synchronization in this protection interval without any problem and find the starting position of the data symbols.

In one embodiment, as shown in fig. 6a, the dummy symbol detection circuit 233 is configured such that the maximum value determination circuit 338 further receives the output of the calculation circuit B2 for further calculating the maximum difference output by the maximum value determination circuit 338 and the power accumulation result B3 to obtain the signal-to-noise ratio (SNR) at this stage. Fig. 6b is a detailed circuit block diagram of the maximum value determining circuit 338 of the present embodiment. Most of the circuit blocks are the same as those in fig. 4, and are not described herein; the difference from the embodiment of fig. 4 is that the maximum value determining circuit 338 of the present embodiment further includes a signal-to-noise ratio (SNR) determining circuit 339. In practice, the snr determining circuit 339 may be a divider. The maximum difference and the power accumulation result B3 are input to the SNR decision circuit 339, and the maximum difference is input

As dividend, and the power accumulation result B3As a divisor, the division result is obtained, i.e., the signal-to-noise ratio (SNR) corresponding to the maximum difference amount.

Fig. 7 shows another embodiment of the white space symbol detection circuit 233. Most of the circuit blocks are the same as those of the circuit blocks corresponding to the embodiment of fig. 3, and the description is not repeated. In fact, the embodiment of fig. 7 is similar to the embodiment of fig. 6a, except that the SNR decision circuit 339 is disposed outside the maximum decision circuit 338 in the embodiment of fig. 7, so that the dummy symbol detection circuit 233 of fig. 7 can output the maximum difference and the SNR. The function and circuit design are the same as those of the SNR decision circuit 339 shown in FIG. 6 a.

Another embodiment of the present invention is a method 400 for detecting a dummy symbol in a wireless receiving device, which is illustrated in fig. 8. First, step S401 starts the flow. In step S402, a set of extraction results is obtained by extracting the data stream once, and in step S404, a power accumulation calculation is performed on the set of extraction results to obtain a power accumulation result. Next, in step S406, it is determined whether there are at least two sets of power accumulation results, if yes, the next step S408 is performed, and if no, the process returns to step S404. Step S408 includes subtracting the two sets of power accumulation results to obtain a subtraction result, and then step S410 is performed to determine the maximum difference according to the subtraction result. Thereafter, the following steps can be performed according to the designer's requirements. In step S412, the existing maximum difference and one of the power accumulation calculation results are divided to determine a snr. Note that steps S401 to S410 may exist independently without performing step S412.

Fig. 9 is a detailed flowchart of the step S410 of the method 400 for detecting white space symbols for determining the maximum difference according to the subtraction result. First, step S510 receives the subtraction result and starts the flow. Step 511 obtains the absolute value of the subtraction result and generates a current difference. Step S513 stores the difference of this time, and checks whether there is a difference of the previous time, if yes, step S515 is performed, if no, step S510 is returned to wait for the next subtraction result. Step S515 includes comparing the difference between the current time and the previous time, and outputting the larger difference. Next, step S517 stores the larger difference amount as the present maximum difference amount, and starts counting immediately after step S519. In the counting process, it is checked in step S521 whether the upper limit of the count has been reached, if the checking result is no, go to step S523 to determine whether the existing maximum difference is updated, if so, go back to step S519 to restart counting, if not, go back to step S521 to continue counting and check whether the upper limit of the count has been reached; if the check result in step S521 is yes, the present maximum difference amount stored in step S517 is output, and the present flow is ended. Note that step S513 may be omitted, and the previous difference is set to zero in step S515 and compared with the present difference. It can be understood by those skilled in the art that various operation variations described in the introduction of the wireless receiving apparatus can also be applied to the method for detecting the dummy symbols in fig. 8 and the method for determining the maximum difference in fig. 9, and the details thereof are not repeated.

The above detailed description of the embodiments is intended to more clearly describe the features and spirit of the present invention, and is not intended to limit the scope of the present invention by the embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the appended claims. Those skilled in the art will appreciate that there are numerous other circuit configurations and components which can implement the concepts of the present invention without departing from the spirit of the invention. Furthermore, the numerical expressions used in the specification are used for illustrating the principles and logic associated with the embodiments of the present invention and are not intended to limit the scope of the invention unless otherwise specifically indicated. Those skilled in the art can understand that there are many techniques to realize the physical expression corresponding to the mathematical expressions.