阅读说明：本技术 射频超宽带驱动放大器芯片 (Radio frequency ultra-wideband driving amplifier chip ) 是由 王三路 于 2019-11-27 设计创作，主要内容包括：本发明公开了一种射频超宽带驱动放大器芯片,包括两个输入电阻、两个反馈电阻以及运算放大器；其中运算放大器包括：三个放大器,包括：一级放大器、二级放大器和三级放大器；两个共模反馈电路,包括：一级共模反馈电路和二级共模反馈电路；其中,所述一级放大器和二级放大器直流耦合,所述三级放大器的输入端与一级放大器的输入端连接,所述三级放大器的输出端与二级放大器的输出端连接,形成前馈结构；本发明能够实现很高的带宽和线性度,相比于传统的带补偿电容Cc的两级或三级放大器,更适合用于电阻反馈结构中,能够实现更好的性能。(The invention discloses a radio frequency ultra-wideband drive amplifier chip, which comprises two input resistors, two feedback resistors and an operational amplifier; wherein the operational amplifier comprises: three amplifiers, comprising: a first-stage amplifier, a second-stage amplifier and a third-stage amplifier; two common mode feedback circuits comprising: the first-stage common-mode feedback circuit and the second-stage common-mode feedback circuit; the primary amplifier and the secondary amplifier are in direct current coupling, the input end of the tertiary amplifier is connected with the input end of the primary amplifier, and the output end of the tertiary amplifier is connected with the output end of the secondary amplifier to form a feed-forward structure; compared with the traditional two-stage or three-stage amplifier with the compensation capacitor Cc, the amplifier is more suitable for a resistance feedback structure and can realize better performance.)

1. An RF ultra-wideband driver amplifier chip, the operational amplifier comprising:

three amplifiers, comprising: a first-stage amplifier, a second-stage amplifier and a third-stage amplifier;

two common mode feedback circuits comprising: the first-stage common-mode feedback circuit and the second-stage common-mode feedback circuit;

wherein the content of the first and second substances,

the primary amplifier and the secondary amplifier are in direct current coupling, the input end of the tertiary amplifier is connected with the input end of the primary amplifier, and the output end of the tertiary amplifier is connected with the output end of the secondary amplifier to form a feed-forward structure;

the output of the primary amplifier is connected with the resistance input of the primary common mode feedback circuit, the output of the primary common mode feedback circuit is connected with the grid electrode of a load PMOS tube of the primary amplifier, and the output common mode level of the primary amplifier is VCOM under the action of a common mode feedback loop;

the output of the secondary amplifier is connected with the resistance input of the secondary common mode feedback circuit, the output of the secondary common mode feedback circuit is connected with the grid electrode of the load PMOS tube of the secondary amplifier, and the output common mode level of the secondary amplifier is VCOM under the action of a common mode feedback loop.

2. The rf ultra-wideband driver amplifier chip of claim 1, wherein the primary amplifier comprises: four NMOS tubes, are respectively: n1, N2, N3 and N4; four PMOS tubes, are respectively: p1, P2, P3 and P4; wherein the content of the first and second substances,

the N3 and N4 serve as tail pipes for providing bias current for N1 and N2;

the source ends and the substrate ends of the N3 and the N4 are both connected with GND ground wires, the grid electrodes are both connected with a bias potential VNB, the drain ends are respectively connected with the source ends and the substrate ends of the N1 and the N2, and the N1 and the N2 form a substrate bias structure;

the gates of the N1 and the N2 are respectively connected with signals VIN and VIP, and drain terminals of the N1 and the N2 are connected with drain terminals of PMOS transistors P1 and P2, P3 and P4;

the source ends and the substrate ends of the four PMOS tubes are connected with a VDD power line, the P1 and the P4 form a current load structure, and the P2 and the P3 form a negative resistance structure;

the gates of the P1 and the P4 are connected with the output VCMFB1 of the common mode feedback circuit; the gate of P2 is connected with the drain of P3, and the gate of P3 is connected with the drain of P2.

3. The rf ultra-wideband driver amplifier chip of claim 1, wherein the secondary amplifier comprises: ten NMOS tubes, are respectively: n5, N6, N7, N8, N9, N10, N11, N12, N13, N14; six PMOS tubes are respectively: p5, P6, P7, P8, P9, P10; two capacitors, respectively: c1, C2; the N11, N12, N13 and N14 are used as tail pipes for providing bias currents for N5, N6, N7, N8, N9 and N10; the source ends and the substrate ends of the N11, the N12, the N13 and the N14 are connected with a GND ground wire, the grid ends are connected with a bias potential VNB, the drain ends of the N11 and the N12 are connected with the source ends and the substrate ends of the N5, the N6 and the N7, and the drain ends of the N13 and the N14 are connected with the source ends and the substrate ends of the N8, the N9 and the N10; the N5, N6, N7, N8, N9 and N10 form an input stage, and each pipe is connected to form a substrate bias structure; the grid of the N5 is connected with the output VOP1 of the first-stage amplifier, the drain terminal is connected with the drain terminals VONN of the P5 and the P6, the grid and the drain terminal of the N5 are connected across the capacitor C1, and the drain terminal is connected with the VONN; the grid of the N6 is connected with the output VON1 of the primary amplifier, and the drain end is connected with the output VON; the grid of the N7 is connected with the output VCMFB2 of the second-stage common mode feedback circuit, and the drain end is connected with the output VON; the grid of the N8 is connected with the output VON1 of the first-stage amplifier, the drain terminal is connected with the drain terminals VOPP of the P9 and the P10, the grid and the drain terminal of the N8 are connected across the capacitor C2, the drain terminal is connected with VOPP, the grid of the N9 is connected with VOP1, and the drain terminal is connected with the output VOP; the grid of the N10 is connected with the output VCMFB2 of the second-stage common mode feedback circuit, and the drain end is connected with the output VOP; the source ends and the substrate ends of the P5, the P6, the P9 and the P10 are connected with VDD, the gates of the P5 and the P9 are connected with VOPP, the gates of the P6 and the P10 are connected with VONN, and the drain ends and the gates of the P6 and the P9 are respectively connected together to form a diode connection mode; the source ends and the substrate ends of the P7 and the P8 are connected with VDD, the grid electrodes are respectively connected with VONN and VOPP, and the drain ends are respectively connected with VON and VOP.

4. The rf ultra-wideband driver amplifier chip of claim 1, wherein the tertiary amplifier comprises: four NMOS tubes, are respectively: n15, N16, N17, N18; two capacitors, respectively: c3 and C4; wherein the content of the first and second substances,

the N17 and the N18 are used as tail pipes for respectively providing bias currents for N15 and N16; the source ends and the substrate ends of the N17 and the N18 are connected with a GND ground wire, the grid ends are connected with a bias potential VNB, and the drain ends are respectively connected with the source ends and the substrate ends of the N15 and the N16;

two ends of the capacitors C3 and C4 are bridged between two drain terminal potentials;

the N15 and the N16 form a substrate bias structure, the grid electrodes are respectively connected with input signals VIN and VIP, and the drain ends are respectively VOPP and VONN.

5. The rf ultra-wideband driver amplifier chip of claim 1, wherein the primary common-mode feedback circuit comprises:

three NMOS tubes, are respectively: n19, N20, N21;

two PMOS tubes, are respectively: p11, P12, two resistors C5 and C6;

wherein the content of the first and second substances,

the N21 is used as a tail pipe to provide bias current for N19 and N20, the source end and the substrate end of the N21 are connected with a GND ground wire, the grid electrode of the N21 is connected with a bias voltage VNB, and the drain end of the N21 is connected with the source end and the substrate end of the N19 and the N20;

the capacitor C5 is connected with the resistor R1 in parallel, the capacitor C6 is connected with the resistor R2 in parallel and is respectively connected with output signals VON1 and VOP1 of the first-stage amplifier, and the other ends of the two groups of capacitors and resistors connected in parallel are connected together and are connected with the grid of the N19; the gate input of N20 is connected to an external reference voltage VCOM,

the drain terminals of the N19 and the N20 are respectively connected with the drain terminals of the P11 and the P12, the P11 and the P12 are connected to form a load of a current mirror structure, the drain terminal and the grid terminal of the P11 are connected together and are connected with the grid terminal of the P12, the source terminals and the substrate of the P11 and the P12 are both connected with a VDD line, and the output VCMFB1 of the P12 is connected with the grid terminal of a current mirror load PMOS tube of a primary amplifier.

6. The rf ultra-wideband driver amplifier chip of claim 1, wherein the secondary common-mode feedback circuit comprises: two NMOS tubes, are respectively: n22, N23; three PMOS tubes, are respectively: p13, P14, P15; two resistors, respectively: r5, R6; two capacitances: c7, C8;

wherein the content of the first and second substances,

the P13 is used as a tail pipe to provide bias current for P14 and P15, the source end and the substrate of the P13 are connected with a VDD power line, the grid electrode is connected with bias voltage VPB, and the drain end is connected with the source ends and the substrate ends of the P14 and the P15;

the capacitor C7 is connected with the resistor R5 in parallel, the capacitor C8 is connected with the resistor R6 in parallel and is respectively connected with the output signals VON and VOP of the second-stage amplifier, and the other ends of the two groups of capacitors and resistors which are connected in parallel are connected together and are commonly connected with the grid input of the P14; the gate input of the P15 is connected to an external reference voltage VCOM,

the drain terminals of the P14 and the P15 are respectively connected with the drain terminals of the N22 and the N23, the N22 and the N23 are connected into a load of a current mirror structure, the drain terminal and the grid terminal of the N22 are connected together and are connected with the grid terminal of the N23, the source terminals and the substrate of the N22 and the N23 are commonly connected with a GND ground wire, and the output VCMFB2 of the N23 is connected with the grid terminals of the N7 and the N10 of the second-stage amplifier.

Technical Field

The invention belongs to the field of radio frequency integrated circuits, and particularly relates to an ultra-wideband drive amplifier chip working in a radio frequency band.

Background

The radio frequency driving amplifier is used as a basic module, is widely applied to various radio frequency integrated systems, and is used for improving the transmission quality and the driving capability of signals. With the continuous development and perfection of radio frequency technology, the working frequency of a chip is higher and higher, and the high performance of a radio frequency integrated system is more and more embodied in higher frequency and broadband, so that the requirement on a radio frequency driving circuit is higher and higher, the design difficulty is correspondingly increased, and the research on the high-performance radio frequency driving amplifier chip has great application prospect and practical significance.

At present, the common techniques for designing a driving amplifier mainly include an active follower structure, a common source amplifier structure, a resistance negative feedback structure, and the like, wherein the active follower structure and the resistance negative feedback structure are usually used for driving analog small signals, low-resistance loads, capacitive loads, and the like due to high linearity and low output resistance, and the common source amplifier is usually used for driving large-power signals and full-swing large signals. When the common-source amplifier structure is at high frequency, the bandwidth is difficult to improve due to the existence of the parasitic capacitance of the common-source amplifier structure, and the linearity of the driving circuit is deteriorated by the parasitic capacitance. Therefore, the present technology mainly studies a driving circuit of a resistive feedback structure.

In the structure of the resistance feedback amplifier, the resistance feedback amplifier mainly comprises an operational amplifier A1, an input resistor R1 and a feedback resistor R2, and the bandwidth of a feedback loop mainly comprises the gain bandwidth product (GBW) of the amplifier A1 and the ratio of the input resistor R1 to the feedback resistor R2

Determination of the resistance ratio

The higher the bandwidth of the circuit output is, the smaller the bandwidth of the circuit output is, so that in order to improve the bandwidth of the resistance feedback amplifier, on one hand, the GBW of the operational amplifier can be improved, and further, the power consumption of the operational amplifier can be larger in an inevitable way, the operational amplifier can also be designed by adopting a Bicmos process, compared with a CMOS process, the GBW can be improved, and on the other hand, the resistance ratio is reducedThe feedback amplifier operates with a lower gain and has a limited ability to amplify the signal.

The linearity of the driver amplifier should be better than that of the preceding stage circuit, otherwise the non-linearity of the driver circuit deteriorates the linearity of the output signal, and if used as a separate driver chip, the linearity should be much higher than that of the preceding stage circuit to meet the application requirements. The relevant literature indicates that the linearity of the resistive feedback structure mainly depends on two aspects, one is the frequency gain of the operational amplifier in the feedback structure, and at low frequency, the amplifier gain is higher, the feedback loop gain is larger, the feedback depth is deeper, and the linearity is better, however, as the frequency increases and exceeds the-3 dB bandwidth of the amplifier gain, the gain of the amplifier decreases faster and faster, the feedback loop gain also decreases correspondingly, and the linearity becomes worse, therefore, the idea of improving the linearity of the resistive feedback circuit is to improve the low-frequency gain of the amplifier, and under the condition of ensuring sufficient phase degree, the-3 dB bandwidth of the amplifier is improved, and GBW is also improved correspondingly. Another aspect is the linearity of the operational amplifier itself, and when the linearity of the amplifier itself is high, the coefficient of the provided non-linear term is small, and the linearity of the feedback loop is high, and it is the output stage, which may be the second stage or the third stage of the operational amplifier, that generally plays a decisive role in the linearity, and therefore, the non-linear optimization of the amplifier in the output stage is also a technical difficulty to be solved.

The influence of the noise figure of the driver amplifier on the system performance is not necessarily important, because the driver amplifier is often located at the output stage of the system, and the gain of the front stage is high, so that the noise of the driver amplifier does not have a great influence on the system. Therefore, the noise of the driver amplifier should be as small as possible. For the structure of the resistance feedback amplifier, the size of the input resistance and the feedback resistance plays a main role, generally the size of the feedback resistance is determined along with the determination of the bandwidth, and the value of the input resistance is determined along with the requirement or the limitation of the gain of the feedback circuit, so the noise level is determined according to the design of a system; another major noise contribution comes from the operational amplifier, and the input stage or first stage of the operational amplifier determines the noise level of the amplifier, thus reducing the noise figure of the input stage of the amplifier, increasing the gain of the first stage amplifier, and advantageously reducing the noise contribution of the output stage of the amplifier.

In summary, the invention adopts the structure of the resistive feedback amplifier to design the radio frequency high bandwidth driver amplifier, the idea is basically clear, the amplifier structure which needs to be designed reasonably is needed to realize the required performance, and the optimization and the improvement of the performance are realized.

Disclosure of Invention

An object of the present invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.

Compared with the traditional two-stage or three-stage amplifier with the compensation capacitor Cc, the amplifier with the novel structure is more suitable for being used in a resistance feedback structure, and can realize better performance.

The invention provides a radio frequency ultra-wideband driving amplifier chip with a novel structure, which adopts a three-stage amplifier, wherein two stages of amplifiers are connected in series to be used as a main path amplifier, the third stage amplifier is used for phase desire compensation, the GBW of the amplifier depends on the input transconductance of the first stage amplifier and the parasitic capacitance of a corresponding output node, compared with the traditional two-stage or three-stage amplifier structure with a compensation capacitor Cc, the GBW of the traditional amplifier depends on the ratio of the input transconductance to the compensation capacitor, and the compensation capacitor is often larger than the parasitic capacitance, so that the improvement of the bandwidth of the amplifier is limited, therefore, the GBW of a feedforward amplifier is much higher than that of the traditional amplifier, and the feedforward amplifier is more suitable for high-bandwidth operation. In addition, the novel amplifier structure is consistent with the traditional amplifier structure in the design of a first-stage amplifier (input stage), the noise and gain optimization method is the same, and the same level of gain and noise can be achieved, so that-3 dB of the novel amplifier structure is farther, and the improvement of linearity in a feedback circuit is facilitated. In addition, the second stage of the operational amplifier with the novel structure is an output stage, a third-stage amplifier is required to be added, the third-stage amplifier is reversely connected through a signal wire, namely, a right half-plane zero point is inserted, phase degree compensation is achieved, the nonlinear terms of the third-stage amplifier and the nonlinear terms of the second-stage amplifier are opposite in sign and can be mutually offset, the nonlinearity of the whole operational amplifier is further reduced, and the improvement of the linearity of the feedback circuit is very beneficial. In the traditional Cc-compensated amplifier structure, the output stage is of a common source type or Class-AB structure, which is not beneficial to designing a high-bandwidth amplifier, and the parasitic capacitance of the output stage can also make the high-frequency nonlinearity of the output stage larger and bring the high-frequency nonlinearity into a feedback loop, so that the output linearity is lower.

The invention also provides a novel resistance feedback amplifier structure, which adopts the technical scheme that: by changing the input resistance of the feedback structure, the gain can be adjusted on the premise of not changing the bandwidth, so that the gain-adjustable feedback circuit is suitable for different application environments. The change of the amplification factor of the feedback structure by changing the size of the feedback resistor can cause the output bandwidth to be reduced along with the increase of the gain and be irrevocable, therefore, the invention is suitable for changing the output gain of the resistance feedback amplifier by using a method of adjusting the input resistor.

The novel structure operational amplifier provided by the invention is brought into a resistance feedback structure, in order to work in a radio frequency band, the gain of the feedback amplifier is generally low, the resistance values of an input resistor and a feedback resistor are generally not very high, the order of magnitude is generally dozens to hundreds of ohms, and the size of the feedback resistor is not too large due to the parasitic capacitance of the resistor. In order to improve the matching of the circuit layout, the sizes and the overall sizes of the feedback resistor and the input resistor are formed by connecting small resistors with the same size in series or in parallel.

The input resistance of the driver amplifier should be as high as possible so as not to affect the driving capability of the preceding stage circuit, and therefore, the bandwidth and the driving capability of the preceding stage circuit are in a trade-off relationship.

The feedforward operational amplifier provided by the invention is based on the structure of the traditional feedforward amplifier, and an innovative amplifier structure is provided by optimizing the power consumption of the operational amplifier and changing the connection relation of circuits, so that the phase degree of desire and the linearity are improved.

Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a block diagram of the overall circuit structure of the resistive feedback amplifier according to the present invention;

FIG. 2 is a schematic diagram of the overall structure of the novel feed forward operational amplifier according to the present invention;

FIG. 3 is a schematic diagram of a first stage amplifier of the operational amplifier according to the present invention;

FIG. 4 is a schematic diagram of a second stage of the operational amplifier according to the present invention;

FIG. 5 is a schematic diagram of a third stage of the operational amplifier of the present invention;

FIG. 6 is a schematic diagram of a first stage common mode feedback circuit of the operational amplifier according to the present invention;

fig. 7 is a schematic diagram of a second stage common mode feedback circuit of the operational amplifier according to the present invention.

Detailed Description

The present invention is further described in detail below with reference to the attached drawings so that those skilled in the art can implement the invention by referring to the description text.

It will be understood that terms such as "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof.

As shown in fig. 1, the present invention provides a novel resistor feedback amplifier structure, the circuit structure is that an input signal VIN and VIP are connected to one end of input resistors R1 and R2, the other end of the input resistors are respectively connected to two input ports of a fully differential operational amplifier, the input ports of the amplifier are connected to one ends of feedback resistors R3 and R4, and the other end of the feedback resistors are respectively connected to output ports VON and VOP of the amplifier, so as to form a fully differential feedback structure. The working principle of the circuit is that gain adjustment can be realized by changing the input resistors R1 and R2 of the feedback structure without changing the feedback resistors R3 and R4 on the premise of not changing the output bandwidth so as to adapt to different application environments. The amplification factor of the feedback structure can also be changed by changing the sizes of the feedback resistors R3 and R4, but due to the existence of the parasitic capacitance of the resistors, the output bandwidth is reduced along with the improvement of the gain, it should be noted that the input resistance cannot be infinitely reduced, and when the input resistance is reduced to a certain extent, the driving capability of the front-stage circuit to the feedback amplifier is weakened, which affects the signal transmission quality, and therefore, the method for changing the gain of the feedback amplifier by changing the input resistance is determined according to the specific application environment.

As shown in FIG. 2, the present invention provides a feedforward operational amplifier with a novel structure, which employs a three-stage amplifier and a two-stage common mode feedback circuit, the first stage amplifier and the second stage amplifier are DC-coupled, the input of the third stage amplifier is connected to the input of the first stage amplifier, the output is connected to the output of the second stage amplifier, to form a feedforward structure, the reference voltage of the common mode feedback circuit is VCOM, the first stage common mode feedback amplifier is a bias common mode level of the first stage amplifier, the output of the first stage amplifier is connected to the resistance input of the first stage common mode feedback circuit, the output of the first stage common mode feedback circuit is connected to the gate of the load PMOS transistor of the first stage amplifier, the output common mode level of the first stage amplifier is VCOM by the action of the common mode feedback loop, and similarly, the second stage common mode feedback amplifier is a bias common mode level of the second, the output common mode level of the second stage amplifier is also set to VCOM, so that the input/output node voltage of each stage amplifier is set to VCOM in the DC path of the operational amplifier, thereby preventing the influence of process variation or temperature variation on the input/output node level. Each stage of the amplifier and each stage of the common mode feedback circuit are described in detail below.

As shown in fig. 3, the circuit structure of the first stage amplifier is shown, the amplifier is composed of 4 NMOS transistors (N, N) and 4 PMOS transistors (P, P), the circuit structure is a fully differential common-source amplifier structure, tail pipes N and N are used to provide bias current for input transconductance pipes N and N, the source ends and the substrate ends of N and N are connected to GND ground, the gates are connected to bias potential VNB, the drain ends are respectively connected to the source ends and the substrate ends of N and N, N and N form a substrate bias structure, the gates of N and N are respectively connected to input signals VIN and VIP, the drain ends are respectively connected to the drain ends of load pipes P and P, P form a current mirror load structure, the source ends and the substrate ends are connected to power supply line VDD, the gate is connected to the output VCMFB of the first stage common mode feedback circuit, P and P form a negative resistance structure, the gate and the drain end of P are connected together, and the P2 and the P3 are small in size, and the impedance provided by the negative resistance is low, so that the negative resistance is connected in parallel with the current mirror load, partial current of the current mirror load can be shared, the output impedance of the first-stage amplifier is improved, and the gain of the first-stage amplifier is further improved.

As shown in fig. 4, a circuit structure of a second stage amplifier is shown, the amplifier is composed of 10 NMOS transistors (N5, N6, N7, N8, N9, N10, N11, N12), 6 PMOS transistors (P12 ) and 2 capacitors C12, using N12, N12 and N12 as tail pipes for providing bias current to the input pipes, the source terminals and the substrate terminals of the tail pipes are connected to the ground, the gate terminals are connected to the bias potential VNB, the drain terminals of N12 and N12 are connected to N12, the source terminals and the substrate terminals of N12 and N12, the drain terminals of N12 and N12 of N12, the drain terminals of N12 and N12 are connected to the gate terminal of the first stage amplifier, the drain terminal is connected to the gate terminal of the VONN 12, the first stage amplifier, the drain terminal of the input stage amplifier is connected to the gate 12 and the gate terminal of the first stage amplifier, the first stage amplifier is connected to the gate terminal of the first stage amplifier, the first stage amplifier, the drain terminals are connected with the drain terminals VOPP of the P9 and the P10, the grid electrode and the drain terminal of the N8 are connected across a capacitor C2, the grid electrode of the input tube N6 is connected with the VON1, the drain terminal is connected with the output VON, the grid electrode of the input tube N7 is connected with the output VCMFB2 of the second-stage common mode feedback circuit, the drain terminal is connected with the output VON, the grid electrode of the input tube N9 is connected with the VOP1, the drain terminal is connected with the output VOP, the grid electrode of the input tube N10 is connected with the output VCMFB2 of the second-stage common mode feedback circuit, the drain terminals are connected with the output VOP, the source terminals and the substrate VDD of the P5, P6, P9 and P10 are connected, the grid terminals of the P5 and P9 are connected with the VOPP, the grid terminals of the P6 and P10 are connected together, the drain terminals and the grid terminals and the drain terminals and the grid terminals of the P6 and the P9 are connected together respectively to form a diode connection mode, the drain terminal VONN, the drain terminal of the VON 9, the drain terminal of the VOPP and the drain terminal of the second-substrate, the differential input ends are respectively the output of the first-stage amplifier and a common-mode feedback signal, the output load adopts a small-sized tube and is connected into a current mirror load structure, the driving capability of the output circuit is improved, the P5 is reversely connected with the P10, the N6 and the N9, the phase pre-degree of the circuit can be improved, the sign of the coefficient of the third-order nonlinear term of the tube is opposite to that of the third-order nonlinear terms of the P6, the P9, the N7 and the N10 which are correspondingly connected in parallel, the linearity of the second-stage amplifier is improved, and the linearity of the whole operational amplifier is further improved.

As shown in fig. 5, the third-stage amplifier is a circuit structure diagram, the amplifier is composed of 4 NMOS transistors (N15, N16, N17, N18) and 2 capacitors (C3, C4), N17 and N18 are used as tail pipes to provide bias current for input transconductance N15 and N16, the source terminals and the substrate terminals of N17 and N18 are connected to GND ground, the gates are connected to bias potential VNB, the drain terminals are connected to the source terminals and the substrate terminals of N15 and N16, the two ends of capacitors C3 and C4 are bridged between two drain terminal potentials, N15 and N16 form a substrate bias structure, the gates are connected to input signals VIN and VIP, the drain terminals are VOPP and VONN, the source terminal of the third-stage amplifier is a negative feedback structure, and the capacitor is connected as a negative feedback element to increase impedance of high frequency and further increase bandwidth of the third-stage amplifier. In the whole operational amplifier structure, the third stage amplifier is connected between the input signal and the output signal in a bridging mode to form a feedforward path, a semi-plane zero point is provided for phase pre-degree compensation in a frequency domain, nonlinearity of an output stage can be reduced, and the linearity of the amplifier is improved.

As shown in fig. 6, the structure of the first-stage common-mode feedback circuit is shown, the amplifier is composed of 3 NMOS transistors (N19, N20, N21), 2 PMOS transistors (P11, P12), 2 resistors (R1, R2) and 2 capacitors (C5, C4), N21 is used as a tail pipe, a source terminal and a substrate terminal are connected to GND ground, a gate terminal is connected to a bias voltage VNB, and a drain terminal is connected to the source terminals and the substrate terminals of N19 and N20, so as to provide bias currents for the input transistors N19 and N20. The capacitor C5 and the resistor R1 are connected in parallel, the capacitor C6 and the resistor R2 are connected in parallel and are respectively connected with the output signals VON1 and VOP1 of the first-stage amplifier, the other ends of the two groups of capacitors and resistors which are connected in parallel are connected together and are commonly connected with the gate input of N19, the gate input of N20 is connected with an external reference voltage VCOM, the drain terminals of N19 and N20 are respectively connected with the drain terminals of P11 and P12, in order to improve the gain of the common mode feedback circuit, P11 and P12 are connected into a load of a current mirror structure, the drain terminal and the gate of P11 are connected together, and is connected with the grid of P12, the source terminals of P11 and P12 are connected with VDD line together with the substrate, the output VCMFB1 of P12 is connected with the grid of the current mirror load PMOS tube of the first-stage amplifier, therefore, a working loop of the first-stage amplifier and the common-mode feedback circuit is formed, as long as the loop is ensured to be stable, the output potential of the first-stage amplifier is equal to VCOM, and the output common-mode voltage of the first-stage amplifier is stabilized.

As shown in fig. 7, the structure of the second stage common mode feedback circuit is shown, the amplifier is composed of 2 NMOS transistors (N22, N23), 3 PMOS transistors (P13, P14, P15), 2 resistors (R3, R4) and 2 capacitors (C7, C8), a P13 is used as a tail pipe, a source terminal and a substrate terminal are connected with a VDD power line, a gate terminal is connected with a bias voltage VPB, and a drain terminal is connected with source terminals and substrate terminals of input transistors P14 and P15, so as to provide bias currents for P14 and P15. The capacitor C7 is connected in parallel with the resistor R3, the capacitor C8 is connected in parallel with the resistor R4 and is respectively connected with the output signals VON and VOP of the second-stage amplifier, the other ends of the two groups of capacitors and resistors which are connected in parallel are connected together and are commonly connected with the gate input of the P14, the gate input of the P15 is connected with an external reference voltage VCOM, the drain terminals of the P14 and the P15 are respectively connected with the drain terminals of the N22 and the N23, in order to improve the gain of the common-mode feedback circuit, the N22 and the N23 are connected into a load with a current mirror structure, the drain terminal and the gate of the N22 are connected together and are connected with the gate of the N23, the source terminals and the substrate of the N22 and the N23 are commonly connected with a ground GND, the output VCMFB2 of the N23 is connected with the gates of the N7 and the N10 of the second-stage amplifier, so as well as to form a loop.

Although the embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the description and the embodiments, and can be applied to various fields suitable for the present invention; additional modifications will readily occur to those skilled in the art. It is therefore intended that the invention not be limited to the exact details and illustrations described and illustrated herein, but fall within the scope of the appended claims and equivalents thereof.