阅读说明：本技术 一种基于动态阈值技术的低功耗压控振荡器 (Low-power consumption voltage-controlled oscillator based on dynamic threshold technology ) 是由 高静 殷嘉程 徐江涛 聂凯明 于 2019-09-29 设计创作，主要内容包括：本发明公开一种基于动态阈值技术的低功耗压控振荡器,包括提供负阻弥补谐振腔振荡时的功率损耗的CMOS交叉耦合对、用于产生压控振荡器的谐振信号的LC谐振腔,电容分压动态阈值模块；CMOS交叉耦合对的两个差分输出端口分别与LC谐振腔的两个输入端口并联,且将该两个差分输出端口作为LC压控振荡器的输出端口。本发明能实现通过检测输出信号波形来动态的调节晶体管衬底电压,从而改变晶体管阈值电压,实现在低电源电压情况下提高电路起振速度,且降低输出信号的相位噪声和功耗。(The invention discloses a low-power consumption voltage-controlled oscillator based on a dynamic threshold technology, which comprises a CMOS cross coupling pair, an LC resonant cavity and a capacitance voltage-dividing dynamic threshold module, wherein the CMOS cross coupling pair is used for providing negative resistance to make up power loss during resonant cavity oscillation; and two differential output ports of the CMOS cross-coupled pair are respectively connected with two input ports of the LC resonant cavity in parallel, and the two differential output ports are used as output ports of the LC voltage-controlled oscillator. The invention can realize dynamic adjustment of the substrate voltage of the transistor by detecting the waveform of the output signal, thereby changing the threshold voltage of the transistor, realizing improvement of the circuit oscillation starting speed under the condition of low power supply voltage, and reducing the phase noise and the power consumption of the output signal.)

1. A low-power consumption voltage-controlled oscillator based on a dynamic threshold technology is characterized by comprising a CMOS cross coupling pair providing negative resistance to compensate power loss during oscillation of a resonant cavity, an LC resonant cavity for generating a resonant signal of the voltage-controlled oscillator, and a capacitance voltage division dynamic threshold module for realizing dynamic threshold voltage by adopting a capacitance voltage division technology; two differential output ports of the CMOS cross-coupled pair are respectively connected with two input ports of the LC resonant cavity in parallel, and the two differential output ports are used as output ports of the LC voltage-controlled oscillator;

the CMOS cross-coupling pair is an NMOS and PMOS complementary cross-coupling tube and comprises a first NMOS tube M1, a second NMOS tube M2, a first PMOS tube M3 and a second PMOS tube M4; the drain electrode of the first NMOS tube M1 is connected with the drain electrode of the first PMOS tube M3, the drain electrode of the second NMOS tube M2 is connected with the drain electrode of the second PMOS tube M4, the grid electrodes of the first NMOS tube M1 and the first PMOS tube M3 are connected with the drain electrodes of the second NMOS tube M2 and the second PMOS tube M4, and the grid electrodes of the second NMOS tube M2 and the second PMOS tube M4 are connected with the drain electrodes of the first NMOS tube M1 and the first PMOS tube M3; the drains of the first NMOS transistor M1 and the first PMOS transistor M3, and the drains of the second NMOS transistor M2 and the second PMOS transistor M4 are differential output ports of the voltage-controlled oscillator;

the LC resonant cavity comprises a first capacitor C1, a second capacitor C2, a first varactor Cvar1, a second varactor Cvar2 and an inductance L; after the first capacitor C1 and the second capacitor C2 are connected in series, two ends of the first varactor Cvar1 and the second varactor Cvar2 are connected in series, and two ends of the first varactor Cvar 3526 and two ends of the second varactor Cvar2 are connected in parallel with an inductance L differential port to form a resonant cavity; one end of the first varactor Cvar1 and one end of the second varactor Cvar2 are connected and then serve as input ends of control voltage, and frequency adjustment of the voltage-controlled oscillator is achieved through external control voltage;

the capacitance voltage division dynamic threshold module comprises a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9 and a tenth capacitor C10; the connection end of the third capacitor C3 and the fourth capacitor C4 is connected to the substrate end of the first NMOS transistor M1, and the two ends of the third capacitor C3 and the fourth capacitor C4 are respectively connected to the gate end and the source end of the first NMOS transistor M1; the connection end of the fifth capacitor C5 and the sixth capacitor C6 is connected to the substrate end of the second NMOS transistor M2, and the two ends of the fifth capacitor C5 and the sixth capacitor C6 are respectively connected to the gate end and the source end of the second NMOS transistor M2; the connection end of the seventh capacitor C7 and the eighth capacitor C8 is connected to the substrate end of the first PMOS transistor M3, and two ends of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to the drain end and the source end of the first PMOS transistor M3; the ninth capacitor C9 and the tenth capacitor C10 are connected to the substrate terminal of the second PMOS transistor M4, and two terminals of the ninth capacitor C9 and the tenth capacitor (C10) are connected to the drain terminal and the source terminal of the second PMOS transistor M4, respectively.

2. The voltage controlled oscillator with low power consumption based on the dynamic threshold technology as claimed in claim 1, wherein all NMOS sources are grounded, and all PMOS sources are connected to VDD.

Technical Field

The invention relates to the technical field of voltage-controlled oscillators, in particular to a low-power consumption voltage-controlled oscillator based on a dynamic threshold technology.

Background

In the radio frequency communication technology, a voltage controlled oscillator VCO is a circuit for providing a local stable local oscillation signal for a chip, is an important component in a phase-locked loop module, can generate a required clock signal, and affects the performance of a transceiver at any time due to power consumption, adjustment sensitivity and phase noise thereof, and how to effectively improve the performance of the voltage controlled oscillator is one of the keys of the radio frequency communication technology.

The currently commonly used VCO types are both ring and LC VCOs. The feedback link of the loop VCO does not comprise a capacitor and an inductor, so that the chip space can be effectively saved, but the phase noise is poor and larger power consumption can be consumed. The tuning range of the LC VCO is not as large as that of the loop VCO, but the noise performance is better and the power consumption is lower, so that the LC VCO is widely applied to radio frequency technology.

The VCO phase noise seriously affects the performance of the system, so that it is always a technical problem in designing the radio frequency circuit how to improve the phase noise, and different topological structures of the circuit have different influences on the performance of the circuit. An LC VCO in CMOS cross-coupled pair configuration may reduce its phase noise by improving the quality factor, but may increase the circuit power consumption. However, when a circuit with a reduced power supply voltage and a reduced power consumption is applied, the circuit oscillation starting speed is lowered, and the phase noise performance is deteriorated due to the lowered quality factor of the circuit.

Disclosure of Invention

The invention aims to provide a low-power consumption voltage-controlled oscillator based on a dynamic threshold technology aiming at the technical defects in the prior art, and solves the problems of poor phase noise and low oscillation starting speed of the voltage-controlled oscillator under the condition of low power supply voltage through improving and optimizing the structure of a typical LC voltage-controlled oscillator, and reduces the power consumption of a circuit.

The technical scheme adopted for realizing the purpose of the invention is as follows:

a low-power consumption voltage-controlled oscillator based on a dynamic threshold technology comprises a CMOS cross coupling pair providing negative resistance to compensate power loss during oscillation of a resonant cavity, an LC resonant cavity for generating a resonant signal of the voltage-controlled oscillator, and a capacitance voltage division dynamic threshold module for realizing dynamic threshold voltage by adopting a capacitance voltage division technology; two differential output ports of the CMOS cross-coupled pair are respectively connected with two input ports of the LC resonant cavity in parallel, and the two differential output ports are used as output ports of the LC voltage-controlled oscillator;

the CMOS cross-coupling pair is an NMOS and PMOS complementary cross-coupling tube and comprises a first NMOS tube M1, a second NMOS tube M2, a first PMOS tube M3 and a second PMOS tube M4; the drain electrode of the first NMOS tube M1 is connected with the drain electrode of the first PMOS tube M3, the drain electrode of the second NMOS tube M2 is connected with the drain electrode of the second PMOS tube M4, the grid electrodes of the first NMOS tube M1 and the first PMOS tube M3 are connected with the drain electrodes of the second NMOS tube M2 and the second PMOS tube M4, and the grid electrodes of the second NMOS tube M2 and the second PMOS tube M4 are connected with the drain electrodes of the first NMOS tube M1 and the first PMOS tube M3; the drains of the first NMOS transistor M1 and the first PMOS transistor M3, and the drains of the second NMOS transistor M2 and the second PMOS transistor M4 are differential output ports of the voltage-controlled oscillator;

the LC resonant cavity comprises a first capacitor C1, a second capacitor C2, a first varactor Cvar1, a second varactor Cvar2 and an inductance L; after the first capacitor C1 and the second capacitor C2 are connected in series, two ends of the first varactor Cvar1 and the second varactor Cvar2 are connected in series, and two ends of the first varactor Cvar 3526 and two ends of the second varactor Cvar2 are connected in parallel with an inductance L differential port to form a resonant cavity; one end of the first varactor Cvar1 and one end of the second varactor Cvar2 are connected and then serve as input ends of control voltage, and frequency adjustment of the voltage-controlled oscillator is achieved through external control voltage;

the capacitance voltage division dynamic threshold module comprises a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9 and a tenth capacitor C10; the connection end of the third capacitor C3 and the fourth capacitor C4 is connected to the substrate end of the first NMOS transistor M1, and the two ends of the third capacitor C3 and the fourth capacitor C4 are respectively connected to the gate end and the source end of the first NMOS transistor M1; the connection end of the fifth capacitor C5 and the sixth capacitor C6 is connected to the substrate end of the second NMOS transistor M2, and the two ends of the fifth capacitor C5 and the sixth capacitor C6 are respectively connected to the gate end and the source end of the second NMOS transistor M2; the connection end of the seventh capacitor C7 and the eighth capacitor C8 is connected to the substrate end of the first PMOS transistor M3, and two ends of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to the drain end and the source end of the first PMOS transistor M3; the ninth capacitor C9 and the tenth capacitor C10 are connected to the substrate terminal of the second PMOS transistor M4, and two terminals of the ninth capacitor C9 and the tenth capacitor (C10) are connected to the drain terminal and the source terminal of the second PMOS transistor M4, respectively.

The source terminals of all the NMOS are grounded, and the source terminals of all the PMOS are connected with a power supply VDD.

The invention can realize dynamic adjustment of the substrate voltage of the transistor by detecting the waveform of the output signal, thereby changing the threshold voltage of the transistor, realizing improvement of the circuit oscillation starting speed under the condition of low power supply voltage, and reducing the phase noise and the power consumption of the output signal.

Drawings

Fig. 1 is a structural diagram of a low power consumption voltage-controlled oscillator based on a dynamic threshold technology according to the present invention.

Fig. 2-5 are schematic diagrams of the external capacitive voltage-dividing dynamic threshold module according to the present invention.

Detailed Description

The invention is described in further detail below with reference to the figures and specific examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

As shown in fig. 1-5, the low power consumption voltage-controlled oscillator based on the dynamic threshold technology of the present invention includes a CMOS cross-coupled pair providing a negative resistance to compensate for power loss during oscillation of a resonant cavity, an LC resonant cavity for generating a resonant signal of the voltage-controlled oscillator, and a capacitance voltage-dividing dynamic threshold module for implementing a dynamic threshold voltage by using a capacitance voltage-dividing technology; two differential output ports of the CMOS cross-coupled pair are respectively connected with two input ports of the LC resonant cavity in parallel, and the two differential output ports are used as output ports of the LC voltage-controlled oscillator;

the CMOS cross-coupling pair is an NMOS and PMOS complementary cross-coupling tube and comprises a first NMOS tube M1, a second NMOS tube M2, a first PMOS tube M3 and a second PMOS tube M4; the drain electrode of the first NMOS tube M1 is connected with the drain electrode of the first PMOS tube M3, the drain electrode of the second NMOS tube M2 is connected with the drain electrode of the second PMOS tube M4, the grid electrodes of the first NMOS tube M1 and the first PMOS tube M3 are connected with the drain electrodes of the second NMOS tube M2 and the second PMOS tube M4, and the grid electrodes of the second NMOS tube M2 and the second PMOS tube M4 are connected with the drain electrodes of the first NMOS tube M1 and the first PMOS tube M3; the drains of the first NMOS transistor M1 and the first PMOS transistor M3, and the drains of the second NMOS transistor M2 and the second PMOS transistor M4 are differential output ports of the voltage-controlled oscillator;

the LC resonant cavity comprises a first capacitor C1, a second capacitor C2, a first varactor Cvar1, a second varactor Cvar2 and an inductance L; after the first capacitor C1 and the second capacitor C2 are connected in series, two ends of the first varactor Cvar1 and the second varactor Cvar2 are connected in series, and two ends of the first varactor Cvar 3526 and two ends of the second varactor Cvar2 are connected in parallel with an inductance L differential port to form a resonant cavity; one end of the first varactor Cvar1 and one end of the second varactor Cvar2 are connected and then serve as input ends of control voltage, and frequency adjustment of the voltage-controlled oscillator is achieved through external control voltage;

the capacitance voltage division dynamic threshold module comprises a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9 and a tenth capacitor C10; the connection end of the third capacitor C3 and the fourth capacitor C4 is connected to the substrate end of the first NMOS transistor M1, and the two ends of the third capacitor C3 and the fourth capacitor C4 are respectively connected to the gate end and the source end of the first NMOS transistor M1; the connection end of the fifth capacitor C5 and the sixth capacitor C6 is connected to the substrate end of the second NMOS transistor M2, and the two ends of the fifth capacitor C5 and the sixth capacitor C6 are respectively connected to the gate end and the source end of the second NMOS transistor M2; the connection end of the seventh capacitor C7 and the eighth capacitor C8 is connected to the substrate end of the first PMOS transistor M3, and two ends of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to the drain end and the source end of the first PMOS transistor M3; the ninth capacitor C9 and the tenth capacitor C10 are connected to the substrate terminal of the second PMOS transistor M4, and two terminals of the ninth capacitor C9 and the tenth capacitor (C10) are connected to the drain terminal and the source terminal of the second PMOS transistor M4, respectively.

The capacitance voltage division dynamic threshold module detects the change of the output signal, and changes the substrate voltages of the transistors M1, M2, M3 and M4, thereby realizing the dynamic threshold voltage.

The source terminals of all the NMOS are grounded, and the source terminals of all the PMOS are connected with a power supply VDD.

It should be noted that the phase noise of the VCO is related to many factors, such as the circuit quality factor Q, the number of components, and the current source noise, and the like, and the phase noise is affected by time. Leeson proposes a phase noise formula based on the Linear Time Invariant (LTI) theory, expressed as,

where F is the noise coefficient, k is the Boltzmann constant, and Q is the quality factor. One possible way to improve the phase noise performance is to increase the quality factor of the circuit, which can be improved by lowering the threshold voltage (Vth) of the transistor and increasing the negative conductance (Gm) of the circuit.

The circuit of the invention adopts a CMOS cross-coupling structure to obtain better Q value and improve the negative resistance of the circuit, the negative resistance of the circuit is provided by the combined action of an NMOS tube and a PMOS tube, the negative resistance of the proposed circuit can be expressed as,

in order to avoid the situation that the circuit performance is influenced by introducing a forward biased PN junction into an MOS device due to the fact that a traditional dynamic threshold MOSFET needs a low output swing amplitude, the dynamic threshold MOSFET adopts a capacitance voltage division technology to realize the dynamic threshold, the phase noise performance is improved on the basis of keeping the output of a high swing amplitude, and the threshold voltage of the MOSFET can be expressed as follows:

in the formula V_th0Is the threshold voltage at zero bias, gamma is the bulk effect coefficient, phi_FIs the potential of the inversion layer, V_bsIs the voltage of the substrate and source terminals. In the formula V_thCan be changed by changing V_bsAnd changed, the dynamic threshold voltage is realized by adopting a capacitance voltage division technology, the voltage of the substrate and the source terminal of the NMOS can be expressed as,

V_gand V_sThe voltage of the gate terminal and the voltage of the source terminal respectively, when the output amplitude is reduced, the substrate voltage of the NMOS tube can be increased, so that the threshold voltage is reduced, and the transconductance of the NMOS is increased. Meanwhile, the PMOS tube also adopts a capacitance voltage division technology, when the output amplitude is reduced, the substrate voltage of the PMOS tube is reduced, so that the threshold voltage is reducedThe transconductance of the PMOS is reduced and increased. Another advantage of the dynamic threshold MOSFET is that the start-up speed of the oscillator can be increased, and in the initial state, Vbs of both the NMOS transistor and the PMOS transistor is at a maximum value, and the threshold voltage is at a minimum value, so that the negative transconductance of the circuit is large enough to satisfy the oscillation condition, which can be expressed as,

wherein G is_mIs the transconductance of a circuit, R_PIs the consumption resistance of the circuit. The DTMOS can also reduce the minimum supply voltage of the proposed circuit, but in order to operate the NMOS and PMOS transistors, its minimum supply voltage must be greater than | V_thPI and V_thNThe sum of (a) and (b). The threshold voltage of the cross-coupled transistors is the lowest value during initial oscillation, so that the structure can work at a lower power supply voltage compared with the traditional VCO structure, and the threshold voltage of the MOS tube can be automatically adjusted along with the amplitude after the oscillation starts, so that less power consumption is consumed.

In the invention, the CMOS cross coupling pair is connected with the LC resonant cavity in parallel, and provides negative resistance to compensate power loss when the resonant cavity oscillates, thereby forming a core circuit of the voltage-controlled oscillator. The output of the core circuit of the voltage-controlled oscillator is respectively connected with capacitors C3, C5, C7 and C9, and the substrate voltage of the transistor is adjusted by detecting the peak value of an output signal. The change of the substrate voltage can change the threshold voltage of the transistor, the dynamic threshold voltage can achieve the purposes of improving the circuit starting speed and reducing the power consumption, and the NMOS and PMOS complementary cross coupling structure is adopted to reduce the phase noise.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.