阅读说明：本技术 阵列基板的制造方法及阵列基板 (Array substrate manufacturing method and array substrate ) 是由 刘翔 孙学军 李广圣 马群 于 2019-10-23 设计创作，主要内容包括：本发明提供一种阵列基板的制造方法及阵列基板,所述制造方法包括：在衬底基板上沉积栅极金属层,并通过第一次光刻,以形成栅极；依次沉积栅极绝缘层、金属氧化物半导体层、金属铝层和金属铜层,进行第二次光刻,以在金属氧化物半导体层形成有源岛的同时,使金属铝层和金属铜层形成源极和漏极,再对源极和漏极之间的沟道区域进行氧化处理,使沟道区域内的铝转化为氧化铝；沉积金属氧化物保护层,并进行第三次光刻,以在金属氧化物保护层上形成导电过孔；沉积透明导电层,并进行第四次光刻,以形成像素电极,并连通像素电极和导电过孔。本发明提供一种阵列基板及其制造方法,仅需四道光罩制程顺序即可实现阵列基板的制作,工艺简单,制作成本低。(The invention provides a manufacturing method of an array substrate and the array substrate, wherein the manufacturing method comprises the following steps: depositing a grid metal layer on the substrate base plate, and forming a grid through first photoetching; sequentially depositing a grid insulating layer, a metal oxide semiconductor layer, a metal aluminum layer and a metal copper layer, carrying out second photoetching to form a source electrode and a drain electrode on the metal aluminum layer and the metal copper layer while forming an active island on the metal oxide semiconductor layer, and then carrying out oxidation treatment on a channel region between the source electrode and the drain electrode to convert aluminum in the channel region into aluminum oxide; depositing a metal oxide protective layer, and carrying out third photoetching to form a conductive through hole on the metal oxide protective layer; and depositing a transparent conductive layer, and carrying out fourth photoetching to form a pixel electrode and communicating the pixel electrode and the conductive through hole. The invention provides an array substrate and a manufacturing method thereof, which can realize the manufacturing of the array substrate only by four photomask manufacturing procedures, and has simple process and low manufacturing cost.)

1. A method for manufacturing an array substrate includes:

depositing a grid metal layer on a substrate, and forming a grid on the grid metal layer through first photoetching;

sequentially depositing a gate insulating layer, a metal oxide semiconductor layer, a metal aluminum layer and a metal copper layer, carrying out second photoetching to enable the metal aluminum layer and the metal copper layer to form a source electrode and a drain electrode while forming an active island on the metal oxide semiconductor layer, and then carrying out oxidation treatment on a channel region between the source electrode and the drain electrode to enable metal aluminum in the channel region to be converted into aluminum oxide;

depositing a metal oxide protective layer, and carrying out third photoetching to form a conductive through hole on the metal oxide protective layer positioned above the drain electrode;

and depositing a transparent conducting layer, and carrying out fourth photoetching to enable the transparent conducting layer to form a pixel electrode, and communicating the pixel electrode and the drain electrode through the conducting through hole.

2. The manufacturing method according to claim 1, wherein the performing the second lithography specifically comprises:

after exposure through a mask and development of a developing solution, an opaque area, a partially transparent area and a completely exposed area are formed; wherein the opaque region corresponds to the source and the drain, the partially transparent region corresponds to the channel region, and the fully exposed region corresponds to a region outside the opaque region and the partially transparent region;

etching away the metal aluminum layer, the metal copper layer and the metal oxide semiconductor layer corresponding to the completely exposed area;

removing the photoresist of the partial light transmission region, and etching the metal copper layer and the metal aluminum layer with partial thickness corresponding to the partial light transmission region;

and reserving the metal copper layer and the metal aluminum layer corresponding to the light-tight area to form the source electrode and the drain electrode.

3. The manufacturing method according to claim 2, wherein the second photolithography is performed by a halftone mask process or a gray tone mask process.

4. The method of manufacturing of claim 1, wherein the thickness of the metallic copper layer is 40-60 times the thickness of the metallic aluminum layer.

5. The method of claim 4, wherein the metallic aluminum layer has a thickness of

6. The method of manufacturing according to claim 1, wherein the gate metal layer, the metal oxide semiconductor layer, the metal aluminum layer, the metal copper layer, and the transparent conductive film are deposited by a sputtering or thermal evaporation process.

7. The method of claim 1, wherein the gate insulating layer and the metal oxide protective layer are deposited by a plasma enhanced chemical vapor deposition process.

8. The manufacturing method according to claim 1, wherein the oxidation treatment specifically includes: and carrying out oxidation treatment on the metal aluminum in the channel region in oxygen plasma in dry etching equipment.

9. The manufacturing method according to claim 1, wherein the metal oxide semiconductor layer comprises Indium Gallium Zinc Oxide (IGZO).

10. An array substrate manufactured by the method of manufacturing an array substrate according to any one of claims 1 to 9, the array substrate comprising: the semiconductor device comprises a substrate, a grid insulating layer, a metal oxide semiconductor layer, a source electrode and a drain electrode;

the grid electrode is positioned above the substrate base plate, the grid electrode insulating layer covers the grid electrode and the substrate base plate, the metal oxide semiconductor layer covers part of the grid electrode insulating layer and is positioned above the grid electrode, the source electrode and the drain electrode are both arranged above the metal oxide semiconductor layer, and a channel region is arranged between the source electrode and the drain electrode;

the source electrode and the drain electrode respectively comprise a metal aluminum layer and a metal copper layer covering the metal aluminum layer, a layer of aluminum oxide covers the channel region, and the aluminum oxide covers the metal oxide semiconductor layer.

Technical Field

The invention relates to the technical field of liquid crystal display, in particular to a manufacturing method of an array substrate and the array substrate.

Background

With the development of Display technology, flat panel Display devices such as Liquid Crystal Displays (LCDs) have the advantages of high definition, power saving, thin body, and no radiation, and are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, and notebook computers, and become the mainstream of Display devices. The liquid crystal display panel generally includes an array substrate, a color filter substrate, and a liquid crystal layer sandwiched between the array substrate and the color filter substrate. The liquid crystal molecules can be controlled to rotate by applying a driving voltage between the array substrate and the color film substrate, so that light rays of the backlight module are refracted out to generate a picture.

Disclosure of Invention

The invention provides a manufacturing method of an array substrate and the array substrate, which can realize the manufacturing of the array substrate only by four photomask manufacturing procedures, and has simple process and low manufacturing cost.

One aspect of the present invention provides a method for manufacturing an array substrate, including:

depositing a grid metal layer on a substrate, and forming a grid on the grid metal layer through first photoetching;

sequentially depositing a gate insulating layer, a metal oxide semiconductor layer, a metal aluminum layer and a metal copper layer, carrying out second photoetching to enable the metal aluminum layer and the metal copper layer to form a source electrode and a drain electrode while forming an active island on the metal oxide semiconductor layer, and then carrying out oxidation treatment on a channel region between the source electrode and the drain electrode to enable metal aluminum in the channel region to be converted into aluminum oxide;

depositing a metal oxide protective layer, and carrying out third photoetching to form a conductive through hole on the metal oxide protective layer positioned above the drain electrode;

and depositing a transparent conducting layer, and carrying out fourth photoetching to enable the transparent conducting layer to form a pixel electrode, and communicating the pixel electrode and the drain electrode through the conducting through hole.

In the manufacturing method, the performing the second photolithography specifically includes:

exposing and developing through a mask to form an opaque area, a partially transparent area and a completely exposed area; wherein the opaque region corresponds to the source and the drain, the partially transparent region corresponds to the channel region, and the fully exposed region corresponds to a region outside the opaque region and the partially transparent region;

etching away the metal aluminum layer, the metal copper layer and the metal oxide semiconductor layer of the completely exposed region;

removing the photoresist of the partial light transmission region, and etching the metal copper layer and the metal aluminum layer with partial thickness of the partial light transmission region;

and reserving the metal copper layer and the metal aluminum layer corresponding to the light-tight area to form the source electrode and the drain electrode.

In the manufacturing method described above, the second photolithography is performed by a halftone mask process or a gray tone mask process.

In the above manufacturing method, the thickness of the metallic copper layer is 40 to 60 times the thickness of the metallic aluminum layer.

In the above manufacturing method, the thickness of the metal aluminum layer isThe thickness of the metal copper layer is

In the manufacturing method, the gate metal layer, the metal oxide semiconductor layer, the metal aluminum layer, the metal copper layer, and the transparent conductive film are deposited by sputtering or thermal evaporation.

In the manufacturing method, the gate insulating layer and the metal oxide protective layer are deposited by a plasma enhanced chemical vapor deposition process.

In the above manufacturing method, the oxidation treatment specifically includes: and carrying out oxidation treatment on the metal aluminum in the channel region in oxygen plasma in dry etching equipment.

In the manufacturing method described above, the metal oxide semiconductor layer includes indium gallium zinc oxide IGZO.

According to the manufacturing method of the array substrate, provided by the embodiment of the invention, the metal aluminum is used as the buffer layer of the source-drain electrode metal copper, so that the adhesion of the metal copper on the array substrate is improved, and meanwhile, the residual metal aluminum in the channel region is oxidized and converted into aluminum oxide by utilizing the difference of the etching rates of the metal copper and the metal aluminum to form the protective layer of the channel region, so that the four-time photoetching process of the array substrate is realized, and the productivity can be effectively improved.

Another aspect of the present invention provides an array substrate manufactured by the method for manufacturing an array substrate, the array substrate including: the semiconductor device comprises a substrate, a grid insulating layer, a metal oxide semiconductor layer, a source electrode and a drain electrode;

the grid electrode is positioned above the substrate base plate, the grid electrode insulating layer covers the grid electrode and the substrate base plate, the metal oxide semiconductor layer covers part of the grid electrode insulating layer and is positioned above the grid electrode, the source electrode and the drain electrode are both arranged above the metal oxide semiconductor layer, and a channel region is arranged between the source electrode and the drain electrode;

the source electrode and the drain electrode respectively comprise a metal aluminum layer and a metal copper layer covering the metal aluminum layer, a layer of aluminum oxide covers the channel region, and the aluminum oxide covers the metal oxide semiconductor layer.

According to the array substrate provided by the embodiment of the invention, the metal aluminum is used as the buffer layer of the source/drain electrode metal copper, so that the adhesion of the metal copper on the array substrate is improved, and meanwhile, the residual metal aluminum in the channel region is oxidized and converted into aluminum oxide by utilizing the difference of the etching rates of the metal copper and the metal aluminum to form the protective layer of the channel region, so that three photomask processes for forming the gate insulating layer, the etching barrier layer, the source electrode and the drain electrode in the prior art are simplified into one photomask process, the process is reduced, and the manufacturing cost is greatly saved.

Drawings

In order to more clearly illustrate the technical solutions of the present invention or the prior art, the drawings needed in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without inventive labor.

Fig. 1 is a flowchart of a method for manufacturing an array substrate according to an embodiment of the invention;

fig. 2 is a schematic structural diagram of an array substrate in a first state during a manufacturing process according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of an array substrate in a second state during a manufacturing process according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of an array substrate in a third state during a manufacturing process according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of an array substrate in a fourth state during a manufacturing process according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of an array substrate in a fifth state during a manufacturing process according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of an array substrate according to an embodiment of the present invention.

Reference numerals:

11-a substrate base plate;

12-a gate;

13-a gate insulating layer;

14-a metal oxide semiconductor layer;

15-source electrode;

16-a drain electrode;

17-a channel region;

18-a metallic aluminum layer;

19-a metallic copper layer;

20-alumina;

21-source drain metal layer;

22-a metal oxide protective layer;

23-a conductive via;

24-pixel electrodes.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be understood that, a conventional liquid crystal display panel is formed by attaching a Thin film transistor Array Substrate (TFT Array Substrate for short) to a color filter Substrate (CF Substrate for short), a pixel electrode and a common electrode are formed on the Array Substrate and the color filter Substrate, respectively, and liquid crystal is filled between the Array Substrate and the color filter Substrate.

A Mask (Mask), also called a Photo Mask (Photo Mask), is a pattern Mask used in a Photolithography process, in which a Mask pattern is formed on a transparent substrate by a light-opaque light-shielding film (chrome metal), and the pattern is transferred onto a film of a glass substrate by a Photolithography process (Photo lithography). The Exposure (Exposure) process is a process in which Ultraviolet (Ultraviolet) rays are irradiated through a mask onto a photoresist (Photo Resist) to transfer a pattern on the mask onto the photoresist. In the array engineering, the photoresist plays a role of a mask, a photoresist pattern formed by exposure protects a film below the photoresist pattern from being etched in an etching process, and finally the photoresist pattern is taken out, so that the pattern on the mask is transferred to the film, the process is called photoetching (Photolithography), and each photoetching process comprises the steps of film deposition, photoresist coating, exposure, development, etching and photoresist stripping.

It is understood that the number of photolithography steps affects both the yield and the manufacturing cost of the panel, and therefore, the fewer the photolithography steps, the better.

The invention is described below in connection with specific embodiments with reference to the following drawings.