Distributed processing of process data

文档序号:1602649 发布日期:2020-01-07 浏览:4次 中文

阅读说明:本技术 分布式处理过程数据 (Distributed processing of process data ) 是由 丹尼尔·杰罗尔姆 于 2018-05-17 设计创作,主要内容包括:描述一种用于在本地总线(6)上分布式处理过程数据(P1、P2、P3)的方法,其中,本地总线(6)具有本地总线主控装置(3)和至少两个数据总线用户设备(7a、7b、……、7n),并且所述方法包括将带有过程数据(P1、P2、P3)的数据包(17)从本地总线主控装置(3)经过本地总线(6)进行发送,在第一数据总线用户设备(7a、7b、……、7n)上接收数据包(17),通过第一数据总线用户设备(7a、7b、……、7n)预处理至少一个过程数据(P3),通过第一数据总线用户设备v(7a、7b、……、7n)将具有至少一个处理好的过程数据(P3a)的数据包(17)通过本地总线(6)发送到第二数据总线用户设备(7a、7b、……、7n)上,在第二数据总线用户设备(7a、7b、……、7n)上接收具有至少一个预处理好的过程数据(P3a)的数据包(17)并且通过第二数据总线用户设备(7a、7b、……、7n)进一步处理至少一个预处理好的过程数据(P3a)。此外描述了相应的本地总线(6)和本地总线主控装置(3)。(A method for the distributed processing of process data (P1, P2, P3) on a local bus (6) is described, wherein the local bus (6) has a local bus master (3) and at least two data bus user devices (7a, 7b, … …, 7n), and the method comprises transmitting data packets (17) with the process data (P1, P2, P3) from the local bus master (3) via the local bus (6), receiving the data packets (17) on a first data bus user device (7a, 7b, … …, 7n), preprocessing at least one process data (P3) by means of the first data bus user device (7a, 7b, … …, 7n), transmitting the data packets (17) with the at least one processed process data (P3a) to a second data bus user device (7 b, … …, 7n) via the local bus (6) a. 7b, … …, 7n), a data packet (17) with at least one preprocessed process data (P3a) is received at the second data bus user device (7a, 7b, … …, 7n) and the at least one preprocessed process data (P3a) is further processed by the second data bus user device (7a, 7b, … …, 7 n). Furthermore, a corresponding local bus (6) and a local bus master (3) are described.)

1. Method for the distributed processing of process data (P1, P2, P3) in a local bus (6), in particular a ring bus, having a local bus master (3) and at least two data bus user devices (7a, 7b, … …, 7n), comprising:

transmitting data packets (17) with process data (P1, P2, P3) from the local bus master (3) via the local bus (6);

-receiving a data packet (17) at a first data bus user device (7a, 7b, … …, 7 n);

preprocessing at least one process data (P3) by a first data bus user device (7a, 7b, … …, 7 n);

transmitting data packets (17) with at least one pre-processed process data (P3a) via the first data bus subscriber (7a, 7b, … …, 7n) to the second data bus subscriber (7a, 7b, … …, 7n) via the local bus (6);

receiving a data packet (17) with the at least one preprocessed process data (P3a) at a second data bus user device (7a, 7b, … …, 7 n); and

the at least one preprocessed process data (P3a) is further processed by a second data bus user device (7a, 7b, … …, 7 n).

2. The method of claim 1, wherein the pre-processing comprises:

the at least one process data (P3a) is written into a data packet (17).

3. The method of one of the preceding claims, wherein the pre-processing comprises:

at least one process datum (P3) is read from the data packet (17).

4. The method according to one of the preceding claims,

wherein the data packet (17) has a plurality of symbols, wherein each symbol has a certain number of bits.

5. The method of claim 4, wherein receiving a data packet (17) with process data (P1, P2, P3) comprises:

the data packets (17) are received symbol by each data bus subscriber device (7a, 7b, … …, 7 n).

6. The method of claim 4 or 5, wherein the pre-processing comprises:

the received symbols are pre-processed bit by bit.

7. The method of claim 6, wherein the bitwise preprocessing comprises:

bit manipulation is performed on at least one bit of the received symbol for obtaining at least one preprocessed process data (P3 a).

8. The method of one of claims 4 to 7, wherein the pre-processing comprises:

reading process data (P3) from the symbols of the data packet (17); the process data (P3a) is written in this symbol of the data packet (17) or in a subsequent symbol of the data packet (17).

9. The method of one of claims 4 to 8, wherein the pre-processing comprises:

executing instructions of the instruction list (22a, 22b, … …, 22n) for preprocessing the at least one process data (P3), wherein a fixed number of instructions of the instruction list are executed for each symbol.

10. The method of claim 9, further comprising:

a list of instructions (22a, 22b, … …, 22n) is received from a local bus master (3) on a first data bus user device (7a, 7b, … …, 7 n).

11. A local bus (6) having at least one first and one second data bus user device (7a, 7b, … …, 7n) and a local bus master (3), wherein,

a local bus master device (3) is provided with:

means for transmitting a data packet (17) with process data (P1, P2, P3);

the first data bus subscriber device (7a, 7b, … …, 7n) comprises:

means for receiving a data packet (17) with process data (P1, P2, P3);

-means for preprocessing at least one process data (P3) of the received data packet (17);

means for transmitting data packets (17) with at least one preprocessed process data (P3a) to the second data bus subscriber devices (7a, 7b, … …, 7 n);

the second data bus subscriber (7a, 7b, … …, 7n) comprises:

means for receiving a data packet (17) with the at least one preprocessed process data (P3 a);

means for further processing the at least one preprocessed process data (P3 a).

12. A local bus (6) as claimed in claim 11, wherein the data packet (17) has a plurality of symbols, wherein each symbol has a certain number of bits.

13. A local bus (6) as claimed in claim 12, wherein the means for transmitting data packets (17) with process data (P1, P2, P3) are adapted to transmit the process data (P1, P2, P3) symbol by symbol in the data packets (17); and

the means for transmitting the data packet (17) with the at least one preprocessed process data (P3a) are adapted to transmit the at least one preprocessed process data (P3a) symbol by symbol in the data packet (17).

14. Method for the distributed processing of process data (P1, P2, P3) in a local bus (6), in particular a ring bus, having a local bus master (3) and at least two data bus user devices (7a, 7b, … …, 7n), comprising:

determining a load of a first data bus user device (7a, 7b, … …, 7n), wherein the load indicates whether the first data bus user device (7a, 7b, … …, 7n) executes a preprocessing of process data (P1, P2, P3) for a second data bus user device (7a, 7b, … …, 7n) within an operating clock provided at the disposal of the first data bus user device (7a, 7b, … …, 7 n);

generating at least one instruction list (22a, 22b, … …, 22n), wherein the at least one instruction list (22a, 22b, … …, 22n) has a set of instructions for preprocessing process data (P1, P2, P3) by means of a first data bus user device (7a, 7b, … …, 7n), wherein the instructions for preprocessing relate to the determination of a load;

-sending the at least one instruction list (22a, 22b, … …, 22n) to a first data bus user device (7a, 7b, … …, 7 n); and

data packets (17) with process data (P1, P2, P3) are transmitted via the local bus master (3) via the local bus (6).

15. Local bus master (3), in particular a ring bus, having a local bus (6) of at least two data bus user devices (7a, 7b, … …, 7n), the local bus master (3) having:

means for determining a load of a first data bus user device (7a, 7b, … …, 7n), wherein the load indicates whether the first data bus user device (7a, 7b, … …, 7n) executes a preprocessing of process data (P1, P2, P3) for a second data bus user device (7a, 7b, … …, 7n) within an operating clock provided for the first data bus user device (7a, 7b, … …, 7 n); means for generating at least one instruction list (22a, 22b, … …, 22n), wherein the at least one instruction list (22a, 22b, … …, 22n) has a set of instructions for preprocessing process data (P1, P2, P3) by means of a first data bus user device (7a, 7b, … …, 7n), wherein the instructions for preprocessing relate to the determination of a load;

means for sending the at least one instruction list (22a, 22b, … …, 22n) to a first data bus user device (7a, 7b, … …, 7 n); and

means for transmitting data packets (17) with process data (P1, P2, P3) via the local bus (6).

Technical Field

The present invention relates generally to distributed processing of process data, and more particularly to distributed processing of process data on data bus user devices of a local bus, particularly a ring bus.

Background

Local buses are mostly used in automation systems. Bus systems and in particular local bus systems have become an essential part of modern automation systems. Automation systems are used in particular for controlling industrial plants, buildings and vehicles. For control automation systems, a plurality of sensors and actuators are often required. These sensors and actuators monitor and control the processes performed by the system. The various sensors and actuators of an automation system are often also referred to as automation devices in this case.

These automation devices can be connected directly to the controllers of the automation system or can be connected first to input modules and output modules (often also referred to as I/O modules). These modules are then directly connected to the controller.

In this case, the automation devices can be integrated directly into the I/O modules or can be connected to these via cables or wirelessly.

Controllers of automation systems are usually implemented by means of one or more memory programmable controllers, PLCs. In this case, the PLCs are arranged hierarchically or decentralized in the automation system. In this case, different performance levels are present in the PLC, so that the PLC can assume different controls and adjustments depending on the computing and memory capacities. In the simplest case, a PLC has inputs, outputs, a running system (firmware) and interfaces, via which a user program can be loaded. The user program defines how the output should be switched according to the input. In this case, the inputs and outputs are connected to the automation system and/or the I/O modules and the processes executed by the automation system can be monitored or controlled by means of the logic registered in the user program. In this case, the monitoring of the process is effected by sensors and the control of the process is effected by actuators. Such a controller can also be referred to as a central controller or central unit and assumes control at least for one automation device or I/O module connected to the controller.

However, it is rather expensive to connect the automation devices directly to the at least one controller or to connect the I/O modules directly to the at least one controller in a parallel wired manner (i.e. one line is routed from each automation device or each I/O module for the superordinate control). In particular, with increasing automation of automation systems, the wiring effort increases in parallel wiring. This is associated with high costs in design, installation, commissioning and maintenance.

For this reason, bus systems are currently used in automation technology, with which automation devices or I/O modules can be connected to controllers. In order to further simplify the connection of the individual automation devices or I/O modules to the bus system, it is now often the case that groups of automation devices or I/O modules are connected one above the other by means of a dedicated local bus to form a local bus system and that at least one user device of the local bus is then connected to the bus system, which is connected to the controller. The local bus system can be different from the bus system used for connection to the controller.

The user devices of a group of local bus user devices which are connected to the bus system of the controller are often also referred to as local bus masters. Alternatively, the name of the front end of the local bus system is also used. Such a local bus master contains, in relation to other local bus user devices, further logic, circuits and functionalities which are necessary for the bus system connected to the controller. The local bus masters themselves may also contain PLCs. Such a user device may also have logic and circuitry for switching between the two bus systems. The local bus master can therefore also be designed as a gateway or as a bus converter and is responsible for converting data present in the format of one of the bus systems into the format of the local bus system and vice versa. However, it is often not mandatory to dedicate a local bus master to the connection of a local bus to a higher level bus.

The local buses used are mostly adapted to the specific usage requirements of the automation devices or of the I/O modules or in consideration of their special hardware design. In this case, the groups of automation devices or I/O modules of the local bus system form in most cases groups of the automation system for carrying out special tasks in the process carried out by the automation system. The data exchanged on the bus for a process are also often referred to as local bus data or process data, since these data contain information for regulating or controlling the process executed by the automation system. Here, such data may also include measurement data, control data, status data, and/or other information. Depending on the bus protocol used, these data may be prepended to other data (header) or appended to other data (trailer).

The other data may contain information about the data or information about internal communication on the local bus. In this case, various types of information are known which, according to the bus protocol used, precede the data or are appended to it. The local bus subscriber devices connected to the local bus may also be referred to as data bus subscriber devices, since these data are exchanged on the local bus. In this case, the databus user device is used for controlling or monitoring the process, in particular by outputting control signals, for example, to the actuators and/or by receiving measurement signals, for example, from sensors. The data bus subscriber devices convert the control signals and/or measurement signals into data of the local bus or vice versa.

A ring bus is a special form of local bus, known for example from US 5472347. In the ring bus, data bus user devices, for example automation devices or I/O modules, are each connected to their directly adjacent data bus user devices and transfer data in turn from one data bus user device to the other. The data transmitted on the local bus may also be referred to as local bus data. Thus, instead of transmitting data to all data bus user devices simultaneously, data is transmitted in succession, wherein one data bus user device receives data from its upstream data bus user device and transmits the data onward to its downstream data bus user device. The data bus user device can process the acquired data between acquiring the data and continuing the transfer. When the data arrives at the last data bus user device in the series, the data is again transferred back in sequence from the last data bus user device to the first data bus user device. In this case, this return transmission is effected either via all data bus user devices or by means of a bypass line next to the data bus user devices. Thus, the ring bus has a downstream and an upstream of the data. The data in the ring bus are mostly transmitted in the form of data packets, which pass through all data bus user devices.

Data packets are transferred from one data bus user device to another data bus user device in the ring bus. In this case, a data bus subscriber always receives only a part of a data packet from its upstream data bus subscriber at each given time. The data bus user device then spends a certain amount of time before continuing to transmit the data contained in the received part of the data packet, which it needs to process. If the data bus subscriber device processes the data using only a defined time or operating clock until it is necessary to continue to transmit the data, the executable process is defined.

It is therefore an object of the present invention to provide a method and a device with which complex processing can be carried out with process data without the process data remaining longer on the respective data bus user device than a predetermined fixed time or operating clock assigned to the data bus user device for processing the data.

Disclosure of Invention

This object is achieved by the method of the independent claim.

Advantageous embodiments are described in the dependent claims.

The method according to the invention for the distributed processing of process data in a local bus, in particular a ring bus, using a local bus master and at least two data bus user devices comprises transmitting data packets with the process data via the local bus, wherein the data packets are transmitted by the local bus master. In this case, the data packets are preferably originally generated by the local bus master and transmitted to the data bus user devices via the ring bus. When generated, the local bus master embeds process data received by a controller, such as a PLC, into data packets. However, the data packet may also contain process data from the local bus master itself and/or the controller. The data packets may also be referred to as telegrams. The data packet has, for example, a header, a payload and advantageously a checksum. The data packets carrying the process data may also be referred to as process data packets herein. Advantageously, the process data packet does not have an address for transmitting process data to or from a data bus user device in the local bus. In the process data packet, the process data are set, for example, in such a way that the data bus subscriber devices recognize the process data belonging to the respective data bus subscriber device on the basis of the respective position of the process data in the process data packet, for example one or several bits in the associated data block (1 byte) to which they belong. Advantageously, the process data packet has an Identifier (IDE) which is associated with the type of data packet, i.e. the process data packet, and which can be recognized by the data bus subscriber device. The process data may also be referred to as local bus data.

The process data packets may be communicated in recurring frames, for example. A cyclic frame can be defined here, for example, as periodic (cyclic), preferably equidistant time slots in which data can be transmitted on the local bus. The cyclic frame has, for example, at least one start identifier (SOC) and a time domain for transmitting data. In this case, the start identifiers (SOCs) of successive loop frames are advantageously spaced apart from one another at equal intervals in time. The so-called time domain is set for transmission of a packet. The start identifier (SOC) and the data packet are transmitted via the local bus and pass through all data bus user devices. The start identifier (SOC) can be transmitted separately, i.e. as a separate symbol, or advantageously contained in a start data packet (SOC-packet).

One or more data packets are not transmitted, or transmitted in the time domain of the cyclic frame. Idle Data (Idle-Data), in particular contiguous to at least one Data packet, is advantageously inserted in the cyclic frame. Advantageously, the transmission of the data packets and/or idle data causes an uninterrupted signal on the local bus. Such a signal enables the data bus subscriber devices to achieve a synchronization in time for the signal. Advantageously, the loop frame additionally has a frame end. The end of frame has a variable length and follows a time domain for data transmission that preferably does not exceed a subsequent start identifier (SOC) of the next cycle frame. Advantageously, the end of frame has idle data.

In this case, the data packets and the process data contained therein are passed through the individual data bus subscriber devices of the local bus in steps. During the passage of a data packet through a data bus subscriber, the data bus subscriber can process the process data contained in the data packet.

According to the invention, the first data bus subscriber device receives a data packet, i.e. a first part of a data packet. The portion of the data packet contains process data destined for the first data bus user device. "specifying" means in this context that the individual process data are suitable for use by the data bus user device which specifies their use for example for carrying out control, regulation and evaluation on this data bus user device. However, the first data bus subscriber device can also receive process data in the first part of the data packet which is not intended for this data bus subscriber device, but which is intended for a downstream second data bus subscriber device in the local bus. That is to say, the process data is intended for the second data bus subscriber device in order to carry out the control, regulation and evaluation precisely at this data bus subscriber device.

The part of the data packets received by the first data bus subscriber device may contain, for example, only the process data intended for the first data bus subscriber device, or a part of the process data intended for the first data bus subscriber device and another part of the process data intended for the second data bus subscriber device, or only the process data intended for the second data bus subscriber device.

If the section of the data packet that has just been received has process data intended for the second data bus subscriber, the first data bus subscriber performs a preprocessing of the process data according to the invention. The degree of preprocessing here depends on how much capacity the first data bus subscriber has available, i.e. the operating clock or the time, before the first data bus subscriber has to forward the data packet or the part of the data packet to the second data bus subscriber. The time available to the data bus user device corresponds to the time between the reception and the continued transmission of a data packet. If the part of the data packet which is temporarily located in the first data bus subscriber device does not have process data which are intended for the first data bus subscriber device, i.e. the first data bus subscriber device also does not have to process it, all the clock cycles of the first data bus subscriber device are free to be used for preprocessing. After the preprocessing, the first data bus subscriber transmits the data packet or the temporarily reserved part of the data packet with the at least one preprocessed process data to the second data bus subscriber via the local bus. The process data can be, for example, a plurality of bits, wherein a single process data can be a single bit. The first and second data bus subscriber devices do not have to be arranged directly adjacent to one another in the local bus. The first data bus subscriber device only needs to be arranged upstream of the second data bus subscriber devices, i.e. the data packets or the parts of the data packets containing the process data to be preprocessed are acquired between the second data bus subscriber devices, so that the first data bus subscriber device can execute the processing before the second data bus subscriber devices.

The method according to the invention further comprises receiving a data packet with at least one preprocessed process data at a second data bus subscriber and further processing the at least one preprocessed process data by the second data bus subscriber. Such further processing may also comprise performing further pre-processing for another data bus user device downstream of the second data bus user device. In this case, the second data bus subscriber device becomes the first data bus subscriber device and performs preprocessing for the second data bus subscriber device. However, the further processing may also include performing control, regulation or evaluation using the process data.

By distributing the processing of the process data over a plurality of data bus user devices, an optimized use of the resources provided on the local bus, i.e. an optimum use of the free capacity available for the data bus user devices, is obtained. The complexity of the preprocessing that can be performed for the data bus user devices via the upstream data bus user devices is directly proportional to the number of data bus user devices and their free capacity. The more data bus subscriber devices are arranged downstream of the local bus from the local bus master, the more preprocessing steps can be carried out for the data bus subscriber devices via upstream data bus subscriber devices. Accordingly, the data bus user devices of the local bus function as distributed logic for the processing of the process data. The local bus is designed during its construction such that data bus user devices which have to preprocess their process data in a more complex manner are located further away from the local bus master than data bus user devices which have to preprocess their process data in a simple manner. By means of the distributed processing, the individual data bus user devices can also be designed comparatively simply, since complex processing does not have to be carried out individually by only one data bus user device, but rather the processing is distributed to a plurality of data bus user devices. This also leads to homogeneity in the local bus. It is not necessary to combine high-performance data bus user devices with low-performance data bus user devices, but the data bus user devices may all have the same performance. Here, the performance is evaluated in the form of computing power.

In a preferred embodiment of the method according to the invention, the preprocessing comprises writing at least one process data packet by means of the first data bus subscriber device. In this case, the writing into the data packet can take place in the same part of the data packet from which the process data were previously read or in a different part of the data packet. If the at least one process data is written into a different part of the data packet, the at least one process data is first stored in the first data bus subscriber until the part of the data packet is present in the first data bus subscriber to be written. However, the first data bus subscriber device can also write the same part of the data packet and the at least one process data is written into this part of the data packet, for example at a different location. The process data to be written are collected by the memory of the first data bus subscriber and/or originally read from the data packets, or are obtained by at least one input of the first data bus subscriber, or a combination of the aforementioned. It is also conceivable to read at least one process datum from the data packet, to carry out an operation with the at least one process datum and to write at least one processed process datum again at the same location into the part of the data packet from which the process datum was read.

In a preferred embodiment of the method according to the invention, the method further comprises the steps of: storing the read at least one process data prior to writing the process data. Here, the memory may include at least one process data read reserved in various ways. The only important thing here is that the data bus user device has access to at least one read process datum, i.e. to the memory. Accordingly, the at least one read process data can be stored in the data bus user device itself, for example in a memory of the data bus user device, or in a memory connected to the data bus user device. The connection between the data bus user device and the memory can be realized here by wire or wirelessly. It is also conceivable that the memory is an add-on module, which can be connected to the data bus user device. The memory can be designed arbitrarily.

In a preferred embodiment of the method according to the invention, the data packet has a plurality of symbols, wherein each symbol has a certain number of bits, for example 8 bits, i.e. 1 byte. Correspondingly, the data packets pass through the data bus subscriber devices in units, segments or intervals (e.g., symbol by symbol). Such portions of a data packet are also subsequently referred to as fragments or units of the data packet. Accordingly, the data bus subscriber devices always have only a part of the data packets for each given time. The last data bus subscriber in the local bus sends back the part of the data packet processed by the data bus subscriber in the upstream direction to the local bus master either via all data bus subscribers again or via the fat line. Once the portion of the data packet is again transmitted via the data bus subscriber device, the portion of the data packet can be further processed. For example, a temporal correction of the signal edges can be carried out. In the processing of parts of the data packets, a distributed preprocessing of the process data according to the invention can also be carried out, for example, in order to perform an evaluation before the process data reaches the local bus master or to convert the process data into a specific format, so that the process data can be processed more easily by the local bus master or can be sent further to a higher-level controller.

In a further preferred embodiment of the method according to the invention, the receiving comprises: the data packets are received symbol by symbol, i.e. only a part of the data packets is available in the data bus subscriber devices at each given time. The symbol may have 8 bits, i.e. 1 byte. But those skilled in the art will appreciate that fragmentation of the data packet may occur in other units, such fragmentation including more or less than 8 bits. After processing one of the parts of the data packet, i.e. after processing one of the symbols, the data bus subscriber device sends the just processed part further to the downstream data bus subscriber device and receives a new part of the data packet from the upstream data bus subscriber device in the same step. Processing a portion of the data packet may also include the data bus subscriber device skipping that portion of the data packet, i.e., not performing processing. In order to ensure a certain processing time, the portion of the data packet can also remain unprocessed with a certain number of operating clocks at the data bus user devices. This is needed in order to give other data bus user devices sufficient time to perform their processing before receiving a new part of the data packet. In this case, a part of the data packet, i.e. for example the symbols of the data packet, can be processed bit by bit. Thus, a bit operation on at least one bit of the received symbol may be performed in order to obtain the at least one preprocessed process data, wherein the operation is a processing of the process data. The executable bit operations, such as "SKIP" ("SKIP"), "MOVE" ("MOVE"), "INCREMENT"), "not" ("gain"), "AND" ("AND") AND "OR" ("OR") OR a combination thereof, may be performed, for example, based on a reduced set of instructions executed by the data bus user equipment. The instruction list is used to register which bit operation is to be executed in the data bus subscriber. The instruction list contains at least one instruction for each part of the data packet or bit of the data packet, i.e. the operation that should be performed with the corresponding number of bits. If the data bus subscriber device does not perform processing, for example, with the number of bits, the corresponding instruction list is empty or has a "SKIP" ("SKIP") instruction for the corresponding number of bits. The instruction list may also have a particular number of repetitions of the instruction. For example, the instruction list may contain a "SKIP" ("SKIP") instruction, which is repeated twice with an indication. Then, the next two bits are not processed in this case, but skipped. Arguments may also be preset for instructions such as "MOVE", "not", "INCREMENT", "AND", AND "OR". The data bus user device may store a plurality of instruction lists. In this case, the local bus master prepends an instruction list index to the process data in the data packet, which instruction list index indicates to the data bus user devices that a very specific instruction list is used for the subsequent part of the data packet, i.e. the process data. The instruction list index points here to a specific memory location in the data bus subscriber device, in which at least one first instruction of the instruction list is stored, or may point to a specific reference which points to the specific instruction list or at least to the first instruction in the instruction list.

In a further preferred embodiment of the method according to the invention, the method comprises reading at least one process data item from a symbol of a data packet and subsequently writing the process data item into the symbol of the data packet or, for example, into a subsequent symbol of the data packet. In this case, the subsequent symbol can follow the current symbol directly or indirectly, i.e. spaced apart by a certain number of symbols. Thus, in this case, the preprocessing may include restoring at least one process data in the data packet. In this case, the first data bus subscriber device reads at least one process datum from a symbol that is to be processed at the data bus subscriber device and can write the at least one process datum at a different position in the same symbol and then transmit the symbol to the second data bus subscriber device for further processing there. The reading and writing can be performed in two operating clocks. The advantage of this preprocessing by the first data bus subscriber is that the second data bus subscriber itself does not have to be restored. Accordingly, the second data bus subscriber device does not have to sacrifice the operating clock, but can use its operating clock for executing its own processing of the process data. It is also conceivable that the first data bus subscriber no longer writes the read at least one process data item into the same symbol, but merely buffers and writes the symbol of the same data packet which is applied later on to the data bus subscriber in order to thus change the position of the at least one process data item in the data packet.

In a further embodiment of the method according to the invention, the method comprises receiving an instruction list from the local bus master on the first data bus user device. The local bus master transmits a command list to each data bus subscriber unit, for example, by means of a communication in which no process data are transmitted to the data bus subscriber units. The local bus master can transmit the instruction list to the data bus subscriber device, for example, in a communication data packet. The communication data packet does not contain process data. Advantageously, the communication data packet contains data, in particular for programming and/or controlling and/or monitoring and/or identifying the at least one data bus subscriber device. Advantageously, the communication data packet has an address assigned to at least one data bus subscriber device. Preferably, the data bus subscriber device is set up for evaluating the address. When the communication data packet contains a list of instructions, the data bus user device may store the list of instructions. In the process data packet, i.e. in the communication of the process data to the data bus subscriber device, an instruction list index is then prepended to the process data packet, which instruction list index indicates to the data bus subscriber device which instruction list is stored. An instruction list index is therefore associated with an instruction list or vice versa, so that the instruction list to be used can be identified by means of the instruction list index. For this purpose, the instruction list index preferably has a value assigned to an instruction list, for example, which points to the particular instruction list or to the storage location of the instruction list. For this purpose, the value itself may be a memory address, where the instruction list is stored or where at least one first instruction of the instruction list is stored. Alternatively or additionally, the values may also point to a memory area in which a corresponding instruction list is saved. The previously mentioned case may also be referred to as direct allocation. However, the value of the instruction list index may also be used as an input Lookup Table (LUT), for example. Here, the value of the instruction list index is an input value of the lookup table. The output value of the look-up table may be the memory address of the first instruction of the affiliated instruction list or may otherwise identify the instruction list. The look-up table can be in a logical form, for example, in software as well as in hardware, and makes a one-to-one conversion from an input value to an output value, wherein the output value gives an indication about the instruction list to be used. Here, how to establish an association between the instruction list index and the instruction list is related to the lookup table. The use of a look-up table may also be referred to as indirect allocation. In the case of direct and indirect allocation, however, the instruction list to be used by the data bus subscriber devices can be identified, i.e. located, one-to-one by the instruction list index.

The above-mentioned object is also achieved by a local bus having at least one first and one second data bus user device and a local bus master. The local bus master has means for transmitting data packets with process data. The means for transmitting may be a transmitter circuit or a transceiver circuit. The first data bus subscriber device has means for receiving data packets with process data and means for preprocessing at least one piece of process data of the received data packets and means for transmitting the data packets with at least one preprocessed piece of process data to the second data bus subscriber device. The device for receiving is a receiver circuit and the circuit for transmitting is a transmitter circuit, or both devices can be designed as one transceiver circuit or as two separate transceiver circuits. The device for preprocessing can be a processor, a microcontroller or an arithmetic circuit, which is formed in particular by the gate elements of an integrated circuit. The arithmetic circuit can also be embodied as a digital logic, which is embodied at least in particular as a component of a semiconductor chip. The circuit may be implemented in an application specific integrated circuit (english: ASIC) or in a field programmable (logic) gate array (english: FPGA).

The second data bus subscriber device has a means for receiving a data packet with at least one preprocessed process data and a means for further processing the at least one preprocessed process data. The device for receiving data packets is here a receiver circuit or a transceiver circuit. The means for further processing may be a processor, a microcontroller or an arithmetic circuit, which is formed in particular by gate elements of an integrated circuit. The arithmetic circuit can also be embodied as a digital logic, which is embodied at least in particular as a component of a semiconductor chip. The circuit may be implemented in an ASIC or FPGA.

In a preferred embodiment of the local bus according to the invention, the transmitted and received data packets have a plurality of symbols, wherein only one symbol of a data packet is applied to the respective data bus subscriber device at each given time. The device for transmitting data packets with process data and the device for transmitting data packets with at least one preprocessed process data are therefore suitable for symbol-by-symbol transmission. Accordingly, the means for receiving the data packets with the process data and the means for receiving the at least one process data are adapted to receive symbol by symbol. That is, a symbol of a data packet remains on a data bus subscriber device only for a certain time until the data bus subscriber device receives a new symbol from an upstream data bus subscriber device and transmits the just remaining symbol to a downstream data bus subscriber device. The passage of the data packets symbol by symbol through the data bus subscriber can be determined by the operating clock of the data bus subscriber, for example, by continuing the transmission after two operating clocks, or by triggering the continuation only by the reception signal.

The object is also achieved according to the invention by a method for the distributed processing of process data in a local bus, in particular a ring bus, having at least two data bus user devices and a local bus. The method comprises determining a load of the first data bus subscriber device. The load indicates whether the first data bus subscriber device can execute a preprocessing of the process data for the second data bus subscriber device within the operating clock provided for the first data bus subscriber device. That is, if the first data bus subscriber receives, for example, a symbol of a data packet and contains process data in the symbol, which do not cause a control or mediation at the first data bus subscriber or the data bus subscriber does not have to write data collected by its sensor input into the symbol, the load of the first data bus subscriber with respect to the symbol is equal to zero. The first data bus subscriber device and its computation capacity are correspondingly free for the dwell time of the symbols (measured, for example, during the working clock) and can be used for preprocessing. That is, the first data bus subscriber device can execute a preprocessing with the process data in the symbol. In order to indicate to the first data bus subscriber device the respective preprocessing to be performed, at least one instruction list is generated, wherein the at least one instruction list has a set of instructions for preprocessing the process data by the first data bus subscriber device, wherein the instructions for preprocessing are relevant for determining the load. The more idle the computing power of the first data bus subscriber device, the more preprocessing it performs with symbols inside the data packet. The generated instruction list has not only instructions for preprocessing but also instructions for processing the process data specified for the first data bus subscriber device. That is to say, the generated instruction list has instructions for some symbols which cause preprocessing, and for other symbols, in particular process data which are intended for the first data bus subscriber device, cause processing of the corresponding process data.

The generated instruction list is then transmitted to the first data bus subscriber, for example in asynchronous communication, for example in communication data packets. The process data packet with the process data is then transmitted via the local bus master to the local bus.

The first data bus subscriber device then executes the instructions of the instruction list, wherein the instructions are executed for each symbol, or even for each bit in the respective symbol, wherein the instructions either cause a processing or a preprocessing.

The object is also achieved by a local bus master having at least two local buses of data bus user devices, in particular a ring bus. The local bus master has means for determining a load of the first data bus user device, wherein the load indicates whether the first data bus user device can execute a preprocessing of the process data for the second data bus user device within an operating clock provided for the first data bus user device. The local bus master furthermore has means for generating at least one instruction list, wherein the at least one instruction list has a set of instructions for preprocessing process data by the first data bus subscriber device, wherein the instructions for preprocessing relate to the determination of the load. The means for determining and the means for generating may be a processor, a microcontroller or an arithmetic circuit, which is formed in particular by gate elements of an integrated circuit. The arithmetic circuit can also be embodied as a digital logic, which is embodied at least in particular as a component of a semiconductor chip. The circuit may be implemented in an ASIC or FPGA.

The local bus master furthermore has means for transmitting at least one instruction list, for example in a communication data packet, to the first data bus subscriber device and means for transmitting a data packet with process data, for example a process data packet, to the local bus. The means for transmitting the instruction list and the means for transmitting the data packet may be the same means or two separate means and the means for transmitting may be configured as a transmitter circuit or a transceiver circuit.

Drawings

The invention is further illustrated below with the aid of examples and figures. Further details, features and advantages of the solution according to the invention emerge from the described embodiments. In the figure:

FIG. 1 shows a schematic block diagram of an exemplary automation system having a memory programmable controller and an exemplary ring bus;

FIG. 2 is a schematic diagram of a data packet used by a local bus master with process data;

FIG. 3 illustrates an exemplary time flow diagram presenting an exemplary data bus user device for the data packet illustrated in FIG. 2 across the ring bus illustrated in FIG. 1; and

FIG. 4a shows an instruction list of an exemplary data bus user device of the ring bus shown in FIG. 1 for processing process data of the data packets shown in FIG. 2; and

fig. 4b shows a schematic representation of a memory in an exemplary data bus user device of the ring bus shown in fig. 1, said memory being used for retaining process data.

Detailed Description

Fig. 1 shows a schematic block diagram of an automation system. Those skilled in the art realize that the illustrated automation system is merely exemplary and that all elements, modules, components, user devices and units belonging to the automation system may be constructed differently, but still achieve the basic functionality described herein.

The automation system shown in fig. 1 has a higher-level controller 1, which can be implemented, for example, by means of a programmable memory controller, PLC. Such a PLC1 is principally used for controlling and regulating processes performed by an automation system. However, at present, the PLC1 in the automation system also assumes a wide range of functions, such as, for example, visualization, alarm and recording of all process-related data, and the PLC1 itself functions as a man-machine interface. There are PLCs 1 with different performance levels with different specifications (computing power, storage power, number and type of inputs and outputs, and interfaces) that enable the PLC1 to implement control and regulation of the processes of the automation system. The PLC1 generally has a modular design and comprises individual components that each perform different tasks. The PLC1 generally includes a central computing component (having one or more central processors and memory modules) and a plurality of components having inputs and outputs. The PLC1 thus constructed modularly can be simply expanded by supplementing the components. In this case, the complexity of the process and the complexity of the construction of the automation system is a function of which components need to be integrated in the PLC 1. In today's automation systems, PLC1 is no longer a stand-alone system, but rather PLC1 is connected to the internet or an intranet via a corresponding interface (not shown here).

This means that the PLC1 is part of a network from which it can obtain information, instructions, and programs. For example, PLC1 may receive data conveyed in a process via a connection to a computer located in an intranet or internet so that, for example, the number and state of the process may be optimally controlled via such information. It is also contemplated that PLC1 may be controlled by a user's access from an intranet or the internet. Thus, a user, for example, with the aid of a computer (also referred to as a host), can access the PLC1 and check, alter, and modify their user programs. Accordingly, the PLC1 may be accessed from one or more remote control stations or dispatch centers. If necessary, the host computer can have a visualization device for presenting the process flow.

To control the processes of the automation system, the PLC1 interfaces with automation devices. In order to keep the wiring costs low, a bus system is used for this connection. In the exemplary embodiment shown in fig. 1, the PLC1 is connected to the local bus master 3 of the lower local bus system by means of a higher bus 2, which in the exemplary embodiment shown here can be a field bus. However, not only the local bus master 3 of the local vertical, as in the exemplary embodiment shown here, but also any other user (not shown here) configured for communication with the PLC1, can be connected to the higher-level bus 2.

In the exemplary embodiment shown here, the higher bus 2 is connected to a local bus master 3. For this purpose, the local bus master 3 has a first interface 4, which is designed such that it can be connected to the higher-level bus 2. For this purpose, the interface 4 may have a receiving end in the form of a socket, for example, and the higher-level bus 2 may have a plug which can be received by the socket. The plugs and sockets can be, for example, modular plugs and modular sockets, i.e., each core of the higher-level bus 2 is electrically or optically connected in a modular socket with a certain connection. However, other possibilities for designing the interface 4 are known to the person skilled in the art, so that the local bus master 3 can be electrically or optically connected to the higher-level bus 2. Screw connections, snap connections or plug connections are known to the person skilled in the art, by means of which electrical or optical connections can be established. In this case, the male plug is usually received by the female fitting. This accommodation not only establishes an electrical or optical connection, but also ensures a mechanical coupling of the two components and can be detached again with only a certain force. However, it is also conceivable for the higher-level bus 2 to be permanently connected to the interface 4.

The local bus master 3 in the exemplary embodiment shown here has a further, second interface for connecting the local bus master 3 to the local bus. The data bus user devices 7a, 7b, … …, 7n are connected or formed on a local bus. The local bus is advantageously designed in such a way that data packets sent by the local bus master 3 are transmitted via all data bus subscriber devices 7a, 7b, … …, 7n connected to the local bus and back to the local bus master 3. In this case, a data bus subscriber 7a, 7b, … …, 7n always receives only a part of the data packets from its upstream data bus subscriber 7a, 7b, … …, 7 n. The data contained in this portion is processed by the data bus user devices 7a, 7b, … …, 7n, after which time period the portion is passed on to the downstream data bus user devices 7a, 7b, … …, 7n and at the same time a new portion of the data packet is received from the upstream data bus user devices 7a, 7b, … …, 7 n. All parts of the data packet pass in this way successively through all data bus user devices 7a, 7b, … …, 7 n. The local bus is advantageously configured as a ring-type structure. Such a local bus may also be referred to as a ring bus 6. Alternatively, the local bus may be configured as a line or star or from a combination or hybrid of the foregoing. In this case, the transmission and reception of data packets takes place via the second interface of the local bus master 3. In the embodiment shown here, the second interface is divided into a first part 5a and a second part 5 b. The first part 5 of the second interface establishes a downstream connection in the ring bus 6 and the second part 5b of the second interface establishes an upstream connection in the ring bus 6.

In the exemplary embodiment shown, the ring bus 6 has data bus user devices 7a, 7b, … …, 7n, the data transmission direction of which is shown by the arrows in the exemplary embodiment shown in fig. 1. In the exemplary embodiment shown here, the data bus subscriber devices 7a, 7b, … …, 7n each have an interface 8 in order to receive data from upstream or upstream data bus subscriber devices 7a, 7b, … …, 7 n. In the case of a data bus subscriber 7a, this receives data from the upstream local bus master 3 via the interface 8. Furthermore, in the exemplary embodiment shown here, the data bus subscriber devices 7a, 7b, … …, 7n each have an interface 9 in order to forward data to downstream or downstream data bus subscriber devices 7a, 7b, … …, 7 n. In the case of the data bus user device 7a, the data are transmitted via the interface 9 to the downstream data bus user device 7 b. The interfaces 8 and 9 are used for transmitting data in the downstream direction of the ring bus 6, i.e. away from the local bus masters 3. Furthermore, in this exemplary embodiment, the data bus subscriber devices 7a, 7b, … …, 7n also have interfaces 10 and 11 for data propagation in the upstream direction of the ring bus 6, i.e. towards the local bus masters 3. In the case of a data bus user device 7a, the interface 10 is designed here to receive data from a downstream or downstream data bus user device 7b, and the interface 11 is designed to forward the data to an upstream or upstream data bus user device (here the local bus master 3). Thus, it can also be said that the interfaces 9 and 11 are transmitting interfaces, while the interfaces 8 and 10 are receiving interfaces.

In the exemplary embodiment shown here, the connection of the interface to the PLC1 or the data bus subscriber devices 7a, 7b, … …, 7n is effected by means of cables or circuit boards for direct or indirect contacting by means of electrical contacts. Another alternative is that the individual connections are established wirelessly and that the interfaces each provide the necessary conversion to the wireless standard used.

Even if the local bus master 3 and the respective data bus user devices 7a, 7b, … …, 7n are in the exemplary embodiment shown here spaced apart from one another, i.e. the local bus master 3 and the data bus user devices 7a, 7b, … …, 7n are arranged non-centrally, it is clear to the person skilled in the art that the data bus user devices 7a, 7b, … …, 7n and the local bus master 3 (also a data bus user device of the ring bus 6) can also be connected directly to one another. In this case, the contacts of one of the data bus subscriber devices can, for example, act on corresponding receiving terminals or receiving contacts of directly adjacent data bus subscriber devices in order to thus establish an electrical connection between the data bus subscriber devices, so that data can be transmitted in the upstream and downstream directions. The data bus subscriber devices 7a, 7b, … …, 7n can have, for example, receiving ends on the side facing away from the master control device and contact points on the side facing the master control device. Thus, if the data bus subscriber devices 7a, 7b, … …, 7n are arranged in series in each case, the contacts of one of the data bus subscriber devices 7a, 7b, … …, 7n engage in the receiving ends of the other data bus subscriber device 7a, 7b, … …, 7n in each case and an electrical connection can be produced. The local bus master 3 then has corresponding contacts on the side acting on the receiving side of the first data bus subscriber device 7a, in order to thus produce an electrical connection between the interfaces 5a and 8 or the interfaces 5b and 11. However, other possibilities for establishing an electrical or optical connection between two data bus subscriber devices 7a, 7b, … …, 7n arranged directly next to one another are also known to the person skilled in the art, for example pressure contacts, knife contacts and fork contacts.

If the data bus subscriber devices 7a, 7b, … …, 7n and the local bus master 3 are connected directly to one another, they can also have mechanical receiving terminals or mechanical fastening means, with which the data bus subscriber devices 7a, 7b, … …, 7n and the local bus master 3 can be connected to one another. The data bus subscriber devices 7a, 7b, … …, 7n can have, for example, a projection on one side and a lateral recess on the other side. Thus, if the data bus subscriber devices 7a, 7b, … …, 7n are arranged in series, one of the projections engages in an undercut of the other data bus subscriber device 7a, 7b, … …, 7n, so that a mechanical coupling is produced. For the serial arrangement of the data bus subscriber devices 7a, 7b, … …, 7n, these data bus subscriber devices can also be arranged on a common receiving terminal, for example a mounting rail. For fastening to the mounting rail, the data bus subscriber devices 7a, 7b, … …, 7n can have corresponding fastening means. Alternatively or additionally, the data bus subscriber devices 7a, 7b, … …, 7n can also have, for example, detachably connectable fastening means, with which the data bus subscriber devices 7a, 7b, … …, 7n can be fastened to the mounting rail or to another receiving end. For this purpose, the detachably connectable fastening means are exchangeable, and corresponding fastening means for the desired receiving end can be connected with the data bus user devices 7a, 7b, … …, 7n, so that these can be fastened on the desired receiving end.

Furthermore, the data bus subscriber devices 7a, 7b, … …, 7n also have a processing unit 12 in the exemplary embodiment shown in fig. 1. The processing unit 12 may be an arithmetic logic unit or another type of computing device by means of which data may be processed. The processing unit 12 is preferably an integral component of the data bus subscriber devices 7a, 7b, … …, 7n, in order to ensure particularly rapid and time-synchronized processing of the data.

The processing unit 12 may also be referred to as a bus of a data bus user device. That is, the processing means 12 receives data via the inputs 8 and 10 and outputs data onto the outputs 9 and 11. Furthermore, the processing means 12 may receive or output data from input/ output terminals 13 and 14. Furthermore, the processing unit 12 can access a memory (not shown here) of the data bus subscriber devices 7a, 7b, … …, 7n, in which, for example, data, process data or instruction lists are stored.

The processing unit 12 may be designed for processing received data as well as for outputting data. The data to be processed can be received from an upstream data bus user device or from the input 13 of the data bus user device 7a, 7b, … …, 7 n. The inputs 13 of the data bus subscriber devices 7a, 7b, … …, 7n are connected to sensors 15, which transmit, for example, measurement data, status data, etc. The processed data can be output to downstream data bus user devices or to the output 14 of the data bus user devices 7a, 7b, … …, 7 n. The output 14 of the data bus subscriber devices 7a, 7b, … …, 7n can be connected to an actuator 16, which can execute a specific action, for example, by means of the data it sends.

For the sake of simplicity, in the exemplary embodiment shown here, the data bus subscriber devices 7a, 7b, … …, 7n are only shown with one input 13 and one output 14, and the data bus subscriber device 7b is also only connected to the sensor 15 and the actuator 16. It is clear to the person skilled in the art that the databus user devices 7a, 7b, … …, 7n can have a plurality of inputs and outputs 13 and 14 and can be connected to a plurality of different sensors 15 and actuators 16. The sensor 15 is here characterized in that the sensor 15 receives data or signals and transmits them to the data bus user devices 7a, 7b, … …, 7n, while the actuator 16 receives data or signals from the data bus user devices 7a, 7b, … …, 7n and performs actions on the basis of these data or signals.

Alternatively, the interfaces 8, 9, 10 and 11 can be integrated in a modular unit and the data bus user devices 7a, 7b, … …, 7n can be plugged onto said modular unit. The module unit can also be referred to as the basic element of the ring bus 6. In this case, the ring infrastructure is built up from modular units and the data bus user devices 7a, 7b, … …, 7n are exchangeable, so that the ring bus 6 can be built up with any data bus user devices 7a, 7b, … …, 7 n. By means of the modular units it is also ensured that even if one data bus user device 7a, 7b, … …, 7n is removed, the communication between the remaining data bus user devices 7a, 7b, … …, 7n is not interrupted, since this communication is performed by the remaining modular units in the ring bus.

The data bus user devices 7a, 7b, … …, 7n shown in this exemplary embodiment are also often referred to as I/O modules, based on their inputs and outputs 13, 14 connected to sensors 15 or actuators 16. Even if the databus user devices 7a, 7b, … …, 7n are present in the exemplary embodiment shown here as being spatially separate from the sensor 15 or the actuator 16, the sensor 15 or the actuator 16 can be integrated in the I/O module.

The databus user devices 7a, 7b, … …, 7n are used for controlling or monitoring the process, in particular by outputting control signals, for example, to the actuators 16 and/or by receiving measurement signals, for example, by the sensors 15. The data bus subscriber devices 7a, 7b, … …, 7n convert the control signals and/or measurement signals into process data of the local bus 6 or vice versa.

The ring bus 6 shown in the embodiment shown here is based on cyclic frame communication. A cyclic frame can be defined here, for example, as a periodic (cyclic), preferably equidistant time slot in which data can be transmitted on the ring bus 6. The cyclic frame has, for example, at least one start identifier (SOC) and a time domain for transmitting data. In this case, the start identifiers (SOCs) of successive loop frames are advantageously spaced apart from one another at equal intervals in time. The so-called time domain is set for the transmission of data, which can be transmitted in the form of data packets within a cyclic frame. The start identifier (SOC) and the data packet are transmitted via the ring bus 6 and pass through all data bus user devices 7a, 7b, … …, 7 n. Advantageously, the loop frame starts via the local bus master 3 in the ring bus 6. The start identifier (SOC) can be transmitted separately, i.e. as a separate symbol, or advantageously contained in a start data packet (SOC-packet).

One or more data packets are not transmitted, or transmitted in the time domain of the cyclic frame. Idle Data (Idle-Data), in particular contiguous to at least one Data packet, is advantageously inserted in the cyclic frame. Advantageously, the transmission of data packets and/or idle data causes an uninterrupted signal on the ring bus 6. Such a signal enables the data bus subscriber devices 7a, 7b, … …, 7n to achieve synchronization in time for the signal. Advantageously, the loop frame additionally has a frame end. The end of frame has a variable length and follows a time domain for data transmission that preferably does not exceed a subsequent start identifier (SOC) of the next cycle frame. Advantageously, the end of frame has idle data.

The data packets are transmitted from the local bus master 3 in a cyclic frame. The local bus master 3 here transmits, for example, a part of the data packets in the downstream direction to the first data bus subscriber 7a of the ring bus 6. The first data bus subscriber device 7a receives a first part of a data packet via the interface 8. Such portions of a data packet are also subsequently referred to as fragments or units. The data bus user devices 7a, 7b, … …, 7n then perform this part of the processing and then forward this part via the interface 9 on to the next data bus user device 7a, 7b, … …, 7n, which first data bus user device 7a, 7b, … …, 7n preferably receives the second part of the data packet at the same time, and so on. The size of this part of the data packet, i.e. the segmentation of the data packet, is dependent on the reception capacity of the data bus subscriber devices 7a, 7b, … …, 7n, for example, a fixed number of Bits, for example 8 Bits (Bits), of the data packet can be present simultaneously on the data bus subscriber devices 7a, 7b, … …, 7n for processing. If process data are contained in this part of the data packet, the data bus subscriber devices 7a, 7b, … …, 7n process the instruction list according to these process data. This part (8 bits) of the data packet is then transmitted from the interface 9 to the next data bus subscriber device 7a, 7b, … …, 7n, in the exemplary embodiment shown here the data bus subscriber device 7 b. The data bus subscriber device 7b in turn has its own instruction list for processing this part of the process data, the instruction lists of the data bus subscriber devices 7a and 7b differing. Here, the timing of the processing time depends on the timing predetermined by the local bus master 3. The internal clock generators of the data bus user devices 7a, 7b, … …, 7n are synchronized with the timing of the local bus master 3.

Correspondingly, the data packets of the loop frame pass through the data bus subscriber devices 7a, 7b, … …, 7n in units, segments or intervals (for example, partially or with 8-bit symbols). The part of the data packet processed by the last data bus user device (in the exemplary embodiment shown here, the data bus user device 7n) then passes in the upstream direction through the ring bus 6, so that it is transmitted upstream from the last data bus user device 7n again through all data bus user devices 7a, 7b, … …, 7n toward the local bus master 3. For this purpose, either the last data bus subscriber device 7n has a controllable bridge, which connects the interface 9 to the interface 10, or a controllable bridge (not shown here) is connected to the last data bus subscriber device 7n, which takes on the function of transmitting parts of the cyclic frame from the interface 9 to the interface 10. Alternatively, the interface 10 of the data bus user device 7n is also connected directly to the interface 5b of the local bus master 3 by means of a bypass line (not shown here).

As in the exemplary embodiment shown here, the units of the cycle frame or of the data packet can be returned in the upstream direction via the respective data bus subscriber device 7a, 7b, … …, 7n to the local bus master 3 without further processing taking place. It is also conceivable, however, for the processing of the units to take place again in the upstream direction, so that the units can process twice, once in the downstream direction towards the last data bus user device 7n and once in the upstream direction towards the local bus master 3.

In the upstream direction, this can be handled, for example, by signal refreshing and/or phase shifting.

The processing of the data packets is carried out by means of an instruction list (for example, as shown in fig. 4 a) which contains instruction sets which can be executed by the processing units 12 of the data bus user devices 7a, 7b, … …, 7 n. The command list itself is sent by the local bus master 3 to the individual data bus user devices 7a, 7b, … …, 7n in the initialization phase. The instruction list has instruction groups which define the processing and preprocessing to be performed by the data bus user devices 7a, 7b, … …, 7 n. The processing of the process data can be distributed to a plurality of data bus user devices 7a, 7b, … …, 7n by means of the instruction list.

An exemplary embodiment of such a distributed processing of process data is described subsequently with the aid of fig. 2 to 4. The embodiment described herein is only to be understood as an example and a person skilled in the art realises that it may be varied from this embodiment without departing from the basic idea of the invention.

Fig. 2 shows a schematic illustration of a data packet 17 generated by the local bus master 3, which has process data P1, P2, P3. The data packet 17 is shown to have at least one usual header portion, an information portion and a checksum portion (CRC value).

The header portion contains a field 18 that contains a unique one-time bit pattern IDE, which may also be referred to as a codeword or identifier. The number and arrangement of the unique bit patterns or code words is dependent on the code used on the ring bus 6. Alternatively or additionally, however, special bit patterns or code words can also be defined in the bus protocol used. In this case, it is merely intended that the data bus subscriber devices 7a, 7b, … …, 7n can recognize the type of the data packet 17 one-to-one from the bit pattern or code word of the field 18. In the embodiment shown here, the data bus user devices 7a, 7b, … …, 7n know that when receiving the field 18 with bit pattern IDE, it is the data packet 17 carrying the process data P1, P2, P3.

The header portion may also contain other information indicating, for example, whether the data packet 17 is moving in the upstream or downstream direction. For this purpose, the last data bus subscriber device 7n can, for example, write into the header part information that the data packet 17 has already passed through this data bus subscriber device 7n and is sent back towards the local bus master 3. The header part may also contain information about the length of the data packet 17, so that the data bus user devices 7a, 7b, … …, 7n check the integrity of the data packet 17 or know how many parts of the data packet 17 are to be received from the data bus user devices 7a, 7b, … …, 7n before starting a new data packet 17. Other fields which can be written into the header part of the data packet 17 are also known to the person skilled in the art and these can be used automatically for control or fault detection by the data bus user devices 7a, 7b, … …, 7 n.

The information part of the data packet 17 may first have an instruction list index field 19(ILI) which indicates which instruction list the data bus subscriber device 7a, 7b, … …, 7n should use. For example, it can be provided in normal operation of the ring bus 6 that all data bus subscriber devices 7a, 7b, … …, 7n use their first instruction list, whereas in the event of a fault the second instruction list is used. The instruction list index may point directly to a storage location of the instruction list stored in the data bus user devices 7a, 7b, … …, 7n, or the instruction list index may have a value, which the data bus user devices 7a, 7b, … …, 7n can use to find the corresponding instruction list, for example, via a look-up table. The information part also has actual process data P1, P2, and P3. These process data P1, P2 and P3 are shown in different patterns in the embodiment shown here. In the exemplary embodiment shown here, the process data P1 is intended for the data bus user devices 7a in the ring bus 6, the process data P2 is intended for the data bus user devices 7b in the ring bus 6 and the process data P3 is intended for the data bus user devices 7n in the ring bus 6. The process data P3 are divided into three parts P3a, P3b, P3 c.

The positioning of the process data P1, P2 and P3 in the information portion of the data packet 17 is predetermined by the local bus master 3. For example, the local bus master 3 copies the process data P1, P2, and P3 contained by the controller 1 into the data packet 17 without changing the order. That is, the local bus master 3 does not perform the change of the order of the process data P1, P2, and P3 in order to speed up the conversion of the data stream contained in the controller 1 into the data packets 17.

In the embodiment shown here, the data packet 17 is divided into 8-bit symbols each. In this way, the data packets 17 are received and processed by the data bus subscriber devices 7a, 7b, … …, 7 n. That is, the local bus master 3 first transmits the symbol or field IDE18 to the first data bus user device 7a, after a previously determined time, the local bus master 3 transmits a further symbol of the header part of the data packet 17 to the data bus user device 7a, which in turn transmits the symbol or field IDE18 to the data bus user device 7 b. All parts of the data packets 17 pass through the respective data bus user devices 7a, 7b, … …, 7n in this way, wherein each data bus user device 7a, 7b, … …, 7n always only retains and therefore processes one block or part of the data packet 17 at each given time.

The data packet 17 also has a field 20 in the information portion, which can be designed as a counter value and which can be incremented or decremented by each data bus subscriber device 7a, 7b, … …, 7n which has transmitted this portion of the data packet 17. The counter value of the field 20 can be used by the local bus master 3 to check whether the data packet 17 passes through all data bus user devices 7a, 7b, … …, 7 n.

For the data bus subscriber 7n, the symbol-by-symbol passage of the data packets 17 through the data bus subscriber 7a, 7b, … …, 7n means, for example, that the data bus subscriber first receives the process data P3a in one symbol, the process data P3b in another symbol and the process data P3c in yet another symbol. If the data bus user devices 7n only perform control, regulation and processing together with the process data P3a and P3b, the data bus user devices 7n first have to buffer the process data P3a, after which the process data P3b also exist with the reception of a further symbol. When process data P3b are present, the data bus user devices 7n must first use the computing power and the operating clock for reading the cached process data P3a from the memory before processing.

With the preprocessing according to the invention, this additional cost (expenditure) for the data bus user devices 7n can be minimized, as shown in fig. 3, by preprocessing the process data P3a by the data bus user devices 7a, 7b located upstream of the data bus user devices 7n in the ring bus 6.

Fig. 3 shows schematically in a time-flow diagram how the symbols of the information part of a data packet 17 (as shown in fig. 2) pass through the exemplary data bus user devices 7a, 7b, … …, 7n of the ring bus 6 and which of the preprocessing steps or preprocessing steps are carried out by the respective data bus user devices 7a, 7b, … …, 7 n.

At time τ equal to 1, only data bus user device 7a receives process data P2 from local bus master 3. In the embodiment shown here, the process data P2 fills the entire symbol of the data packet 17. However, the data bus subscriber 7a does not execute processing or preprocessing with the process data P2. It can also be said that the process data P2 are not intended for the data bus subscriber device 7 a. For the process data P2, the data bus subscriber 7a accordingly has a "SKIP" ("SKIP") instruction in its instruction list, or a "SKIP" ("SKIP") instruction or no instruction for each bit of the symbol. However, the process data P2 remain on the data bus user device 7a for a predetermined time, whereas the data bus user device 7a continues to transmit the process data P2 to the data bus user device 7 b. This ensures a certain characteristic of the ring bus 6, i.e. a predictable temporal characteristic of the ring bus 6, since each symbol is retained on the respective data bus user device 7a, 7b, … …, 7n for a predetermined time, wherein the predetermined time is preferably the same in all data bus user devices 7a, 7b, … …, 7n and may depend on a predetermined timing of the local bus master 3. If the process data P2 were sent to the data bus subscriber 7b at τ 2, the data bus subscriber 7a receives the process data P3a in a further symbol of the data packet 17. In the exemplary embodiment shown here, the process data P3a or the process data P3a correspond only to a certain part of the symbols of the data packet 17. The process data P3a may be, for example, only one bit in a symbol.

That is to say, at τ 2, the process data P2 has already passed through the data bus user device 7a and this data bus user device temporarily retains the symbol with the process data P3a, the data bus user device 7b retaining the process data P2. Since the process data P2 are intended for this data bus user device 7b, this data bus user device 7b reads the process data P2 and carries out the control, regulation or processing in turn. The reading of the process data P2 is represented by "R" (read). The data bus user device 7b then transmits the symbol of the data packet 17 with the process data P2 to the subsequent data bus user device, for example the data bus user device 7 n.

When τ is 3, the data bus subscriber 7a receives the next symbol of the data packet 17 from the local bus master 3. The symbol contains process data P3b and process data P1. Since the process data P1 is intended for the data bus user device 7a, this data bus user device reads the process data P1. In this case, either the data bus user device 7a reads the entire symbol or the instructions in the instruction list indicate to the data bus user device 7a that the part of the symbol containing the process data P3b is not to be read and instead only the part containing the process data P1 is to be read. The reading of the process data P1 is indicated by an "R". The process data P1 can cause control, regulation on the data bus user device 7a or the data bus user device 7a can carry out processing with the process data P1. At the same time, a symbol with process data P3a is present in data bus user device 7 b. This symbol with the process data P3a is sent by the data bus user device 7a to the data bus user device 7 b. However, even if the process data P3a is not specified for the data bus user device 7b, this data bus user device has at least one instruction for the symbol in its instruction list, which instruction causes the data bus user device 7b to read and store the one process data P3a or the plurality of process data P3a in the symbol. The reading of the process data P3a is indicated by "R".

When τ is 4, the data bus subscriber 7a receives the next symbol of the data packet 17 from the local bus master 3. The symbol contains process data P3 c. The data bus subscriber 7a does not carry out processing with the process data P3c, i.e. the data bus subscriber 7a has a corresponding "SKIP" ("SKIP") instruction for the symbol or for each bit of the symbol in its instruction list. At the same time, the data bus user device 7b receives symbols with the process data P1 and P3b from the data bus user device 7 a. The instructions of the data bus subscriber 7b can cause the data bus subscriber to write the read process data P3a into the temporary symbol at time τ of 3. The writing is denoted by "W" (write). In the embodiment shown here, the process data P3a is written in symbols in the process data P3 b. For this purpose, the process data P1 is overwritten. This is possible because the process data P1 has already been read by the data bus user device 7a and is no longer required. However, it is also clear to the skilled person that overlaying the process data can be prevented by known mechanisms. However, it is also possible to implement the overwriting of no process data occurring or at least to ensure that only process data which are no longer required are overwritten when the instruction list is generated. After the process data P3a has been written to the symbol by the data bus user device 7b, the changed symbol is transferred via the ring bus 6.

The restoration of the process data P3a by the data bus subscriber 7b is a preprocessing according to the invention. The data bus user device 7b processes process data which are not intended for this data bus user device 7b, but the restoring of the process data saves the operating clock of the downstream data bus user device (in the exemplary embodiment shown here, the data bus user device 7n) since it does not need to perform a restoring operation. This is evident in the continuation of the time flow diagram.

When τ is n, the data bus subscriber 7n receives the first symbol of the data packet 17. Since the first symbol does not contain process data which are intended for the data bus subscriber 7n, the data bus subscriber 7n can skip this symbol.

The instruction list of the data bus subscriber device 7n can therefore have one or more corresponding "SKIP" ("SKIP") instructions.

When τ is n +1, the data bus subscriber 7n receives a further symbol of the data packet 17, i.e. the symbol with the process data P3 a. However, the process data P3a are not read by the data bus user device 7n, since the process data have already been stored by the data bus user device 7b in the following symbol. That is, the data bus subscriber device 7n does not need to read the process data P3a using the operating clock provided when τ n +1, but rather the data bus subscriber device 7n additionally uses the spare capacity, for example for executing processing or for executing preprocessing for the local bus master 3, the data bus subscriber device 7n transmitting a symbol return to the data bus subscriber device 7 n.

When τ is equal to n +2, the data bus user device 7n receives the symbol of the data packet 17 changed by the data bus user device 7b and stores the process data P3a in this data bus user device. The data bus user devices 7n then read the process data P3a and P3b from the symbols. The reading of the process data P3a and P3b is indicated by "R". The data bus user devices thus read the process data P3a and P3b in one step.

When τ is n +3, the data bus subscriber 7n then receives a further symbol of the data packet 17, from which symbol the data bus subscriber 7n reads the process data P3 c. The reading is denoted by "R".

Fig. 4a shows an instruction list 21a, 21b, 21n of a data bus subscriber device 7a, 7b, … …, 7 n. In the embodiment shown here, the instruction lists 21a, 21b, 21n are presented as tables. In the exemplary embodiment shown here, each row of the table contains two instructions which can be executed with the symbol of the data packet 17 which is just pending on the two instructions of the data bus subscriber devices 7a, 7b, … …, 7 n. However, those skilled in the art will appreciate that even though only two instructions for two operating clocks are shown here by way of example, other numbers of instructions may be executed per symbol. Furthermore, it is clear to the person skilled in the art that the instruction list 21a, 21b, 21n may also have a separate instruction for each bit in the symbol of the process data. The assignment of the corresponding instructions to each bit is omitted here for the sake of simplicity and clarity only.

The first line of the instruction list 21a of the data bus subscriber 7a is empty, which is denoted by "-". That is, the data bus user device 7a does not perform processing with the first symbol of the data packet 17 received by this data bus user device 7a, since no instruction is present. Instead of an empty instruction, the instruction list 21a may also have a "SKIP" ("SKIP") instruction at this time. The second line of the instruction list 21a is also empty, i.e. no processing is performed with the second symbol received by the data bus subscriber device 7 a. The first two symbols of the data packet 17 are therefore only reserved on the data bus subscriber 7a for a predetermined time without processing being carried out. The instruction list 21a has instructions only for the third symbol received, i.e. reads "R", more precisely the process data P1. The process data P1 is specified here as, for example, one bit or a bit field of, for example, at most 8 bits according to the symbol of the data packet 17. As a second instruction to be executed for this symbol, instruction list 21a has a write "W", to be precise a write of read process data P1 into the memory of data bus user device 7a, to be precise at memory address 0x 00. Further, the instruction list 21a has no other instruction. That is, the data bus subscriber 7a reads process data P1 from the third symbol received by this data bus subscriber 7a and writes said process data into its memory. The other lines shown in the instruction list 21a are empty, that is, no other processing is performed. Those skilled in the art will appreciate that the instructions shown herein are only schematically understood and may also include other instructions of the instruction list 21 a.

The instruction list 21b is stored in the data bus user device 7 b. The instruction list has two instructions directly in the first row, namely read "R" and write "W", that is to say read the process data P2 from the first symbol and write the read process data P2 into the memory at the memory address 0x 00. Those skilled in the art will appreciate that even though the process data is referred to herein for simplicity by the reference numeral of the process data in FIG. 2, the instructions may accurately indicate the bit region in the symbol that should be read, or the process data P2 could otherwise be identified. After completion of the two instructions, the symbol is transmitted further to the downstream data bus user device 7n and at the same time a new symbol is received from the upstream data bus user device 7 a. The instruction list 21b of the data bus user device 7b has for this second symbol the instructions read "R" and write "W", to be precise the process data P3a read is written into the memory at the memory address 0x 01. After completion of the two instructions, the symbol is transmitted further to the downstream data bus user device 7n and at the same time a new symbol is received from the upstream data bus user device 7 a. For the symbol, the instruction list again includes two instructions, namely read "R" and write "W", more precisely, read process data P3a from the memory at storage address 0x01 and write the read process data P3a into the symbol at storage address 0x 00. In this case, it can be indicated where the process data P3a should be written to the symbol. That is, data bus subscriber 7a performs the restoring of process data P3a into data packet 17, i.e. from the symbol of data packet 17 into another symbol of data packet 17. For this purpose, the data bus subscriber 7b first buffers the process data P3a and writes it to the next symbol. Even though shown here as being restored to the immediately following symbol, one skilled in the art will appreciate that it may also be restored to any subsequent symbol. Furthermore, it is clear to the person skilled in the art that even if only a renewed memory is shown here, the data bus user device 7b can carry out any possible processing within the scope of the predetermined operating clock with the process data P3 a. The processing includes, for example, the association of "and" or "of the process data P3 a. The other rows of the instruction list are empty, so that the data bus subscriber device 7b does not perform further processing. However, this is also merely for clarity of the embodiments shown herein and should not be construed restrictively.

The instruction list 21n is stored in the data bus user device 7 n. The first two rows of the instruction list 21n are empty, so that the data bus subscriber device 7n does not perform processing for the first two symbols of the data packet 17. The two symbols are still correspondingly retained on the data bus subscriber device 7n for a certain predetermined time, after which the data bus subscriber device transmits the symbols back to the local bus master 3, either via the data bus subscriber devices 7a and 7b or via the bypass line. For the third symbol received by the data bus user device 7n, the instruction list 21n has only the corresponding instruction, i.e. read "R", more precisely the process data P3a and P3 b. The process data P3a and P3b can now be read from one of the symbols, since the process data P3a have already been stored back into the corresponding symbol by the data bus user device 7 b. This enables the data bus user device 7n to additionally use the provided operating clock in the second symbol in which the data bus user device 7n must additionally read the process data P3 a. The read process data P3a and P3b are then written into the memory by way of the command "W", i.e. write, to be precise at the memory address 0x 00. After completion of the two commands, the symbol is further transmitted to the local bus master 3 and at the same time a new symbol is received from the upstream data bus user device 7 b. The data bus user devices 7n read the process data P3c from the symbol by means of the command "R" and write the process data P3a into their memory by means of the command "W" at the memory address 0x 01. The instruction list 21n may also contain any other instructions.

It is clear to the person skilled in the art that even if the instruction list 21a, 21b, 21n is given as a readable table in the embodiment shown here, the instruction list 21a, 21b, 21n can be designed to be of high or low complexity, i.e. from program code in a high-level programming language to machine language, i.e. instructions that can be executed directly by the processing unit 12 of the data bus user device 7a, 7b, … …, 7n, depending on the use of the memory in the data bus user device 7a, 7b, … …, 7 n. Here, the machine code includes a set of bytes or statements, which may represent commands as well as data. The local bus master 3 can, when generating the instruction list, immediately send the instruction list to the respective data bus user device 7a, 7b, … …, 7n in machine code or send the instruction list to the data bus user device in the form of program code, which can be assembled individually by the data bus user devices 7a, 7b, … …, 7n and converted into machine language. If the local bus master 3 sends the instruction list immediately to the data bus user devices 7a, 7b, … …, 7n in the form of a machine language, this has the following advantages: the data bus user devices 7a, 7b, … …, 7n do not require an expensive processing unit 12, since they do not have to have the capability to assemble the instruction list contained. However, if more complex data bus user devices 7a, 7b, … …, 7n are used, it is advantageous to assemble on the data bus user devices 7a, 7b, … …, 7n themselves, since in this case the local bus master 3 does not have to have knowledge about the hardware of the data bus user devices 7a, 7b, … …, 7 n. Those skilled in the art will appreciate that the complexity of the instruction list can be adapted to the complexity of the data bus user devices 7a, 7b, … …, 7 n.

It is also clear to the person skilled in the art that even if individual instructions, which always correspond to the entire symbol, are given here only for each process data in the symbol, i.e. for each bit, there can be a single instruction. In this case, it can also be said that bit-by-bit processing or preprocessing is performed.

The process data P1, P2, P3 read by the command lists 21a, 21b and 21n are written into the memories of the data bus user devices 7a, 7b, … …, 7n, more precisely at the memory addresses defined by the commands. An example of a memory 22a, 22b, 22c of a data bus user device 7a, 7b, … …, 7n is shown in fig. 4 b.

The process data P1 read by the data bus user device 7a from the third symbol of the data packet 17 are stored here at the memory address 0x00 of the memory 22 a.

The process data P2 read by the data bus user device 7b from the first symbol of the data packet 17 are stored here at the memory address 0x00 of the memory 22 b. The process data P3a read from the second symbol of data packet 17 is stored here at memory address 0x01 of memory 22 b. After the process data P3a has been written into the third symbol of the data packet 17, the memory address is released again and the process data P3a at the memory address is cleared or subsequently overwritten.

The process data P3a which were read by the data bus user device 7n from the third symbol of the data packet 17 and which were previously placed in the data packet 17 by the data bus user device 7b are stored here, like the process data P3b, at the memory address 0x00 of the memory 22 n. The process data P3c read from the fourth symbol of the data packet 17 is stored at the memory address 0x01 of the memory 22 n.

Those skilled in the art will appreciate that the storage locations and read and write process data P1, P2, P3a, P3b, P3c shown herein are exemplary only.

It will also be understood by those skilled in the art that when reference is made herein to memory, the memory includes all types of reservations. The only important thing here is that the data bus subscriber devices 7a, 7b, … …, 7n can access the received data, i.e. for example access the memory. Accordingly, the data can be stored in the data bus user devices 7a, 7b, … …, 7n themselves, for example in the memories 22a, 22b, 22c of the data bus user devices 7a, 7b, … …, 7n or in memories connected separately or jointly to the data bus user devices 7a, 7b, … …, 7 n. The connection between the data bus subscriber devices 7a, 7b, … …, 7n and the memories 22a, 22b, … …, 22n can be effected here either by wire or wirelessly. It is also conceivable that the memories 22a, 22b, … …, 22n are additional modules which can be connected to the data bus user device.

List of reference numerals

1 memory programmable controller (PLC)

2 upper bus

3 local bus master control device

4 first interface

5a, 5b second interface

6-ring bus

7a, 7b, 7n data bus user equipment

8 first downlink data interface

9 second downstream data interface

10 first uplink data interface

11 second uplink data interface

12 processing unit

13. 14 input/output terminal

15 sensor

16 actuator

17 data packet with process data

18 IDE code word

19 instruction list indexing

P1, P2, P3 Process data

20 counter value

21a, 21b, 21n instruction list

22a, 22b, 22n memory

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