Charge pump

文档序号:1689278 发布日期:2020-01-03 浏览:30次 中文

阅读说明:本技术 电荷泵 (Charge pump ) 是由 林圣颖 于 2019-06-27 设计创作,主要内容包括:本发明提供一种电荷泵,其包含一电源产生电路与一频率控制电路。电源产生电路包含至少一储能元件,并对该至少一储能元件充电以产生一供应电压。及频率控制电路耦接该至少一储能元件,输出一操作讯号至电源产生电路。频率控制电路依据该至少一储能元件储存的电量而调整操作讯号的一操作频率,以控制该至少一储能元件的充电而增加储存的电量。(The invention provides a charge pump, which comprises a power supply generating circuit and a frequency control circuit. The power generation circuit comprises at least one energy storage element and charges the at least one energy storage element to generate a supply voltage. And the frequency control circuit is coupled with the at least one energy storage element and outputs an operation signal to the power supply generating circuit. The frequency control circuit adjusts an operation frequency of the operation signal according to the electric quantity stored by the at least one energy storage element so as to control the charging of the at least one energy storage element and increase the stored electric quantity.)

1. A charge pump, comprising:

a power generation circuit, including at least one energy storage element, and charging the energy storage element to generate a supply voltage; and

the frequency control circuit is coupled with the at least one energy storage element and outputs an operation signal to the power supply generation circuit, and the frequency control circuit adjusts an operation frequency of the operation signal according to the electric quantity stored by the at least one energy storage element so as to control the charging of the at least one energy storage element and increase the stored electric quantity.

2. The charge pump of claim 1, wherein a charging frequency of the at least one energy storage element is equal to the operating frequency.

3. The charge pump of claim 1, wherein the charge pump comprises:

and the voltage stabilizing circuit comprises a first input end and a second input end, the first input end is coupled with an output end of the charge pump, the second input end is coupled with a reference voltage, the voltage stabilizing circuit generates a voltage stabilizing signal according to the supply voltage and the reference voltage, and the power supply generating circuit outputs the supply voltage according to the voltage stabilizing signal and the electric quantity of the at least one energy storage element.

4. The charge pump of claim 1, wherein the power generation circuit comprises:

a switching circuit, coupled to the at least one energy storage element, for turning on or off a charging path or a discharging path of the at least one energy storage element.

5. The charge pump of claim 1, wherein the power generation circuit comprises:

a detection circuit coupled to the frequency control circuit and a voltage stabilizing signal generated by a voltage stabilizing circuit, for detecting the voltage stabilizing signal to generate a detection signal to the frequency control circuit, wherein the frequency control circuit controls the operating frequency of the operating signal according to the detection signal.

6. The charge pump of claim 1, wherein the at least one energy storage element comprises a first electrode terminal and a second electrode terminal, the first electrode terminal is coupled to a charging voltage and an output terminal of the power generation circuit via a switching circuit, the second electrode terminal is coupled to the switching circuit and the frequency control circuit, the second electrode terminal is coupled to a ground terminal via the switching circuit, and the power generation circuit stops outputting the supply voltage when the charging voltage charges the at least one energy storage element.

7. The charge pump of claim 1, wherein the at least one energy storage element comprises:

a first energy storage element coupled to a charging voltage, a ground terminal and an output terminal of the power generation circuit via a switching circuit; and

the second energy storage element is coupled with the charging voltage, the grounding end and the output end of the power generation circuit through the switching circuit, when the power generation circuit outputs the supply voltage by the electric quantity of the second energy storage element, the charging voltage charges the first energy storage element, and when the power generation circuit outputs the supply voltage by the electric quantity of the first energy storage element, the charging voltage charges the second energy storage element.

8. The charge pump of claim 1, comprising:

a first energy storage element coupled to a charging voltage, a ground terminal and an output terminal of the power generation circuit via a switching circuit;

a second energy storage element coupled to the charging voltage, the ground terminal and the output terminal of the power generation circuit via the switching circuit;

a third energy storage element coupled to the charging voltage, the ground terminal and the output terminal of the power generation circuit via the switching circuit; and

and a fourth energy storage element coupled to the charging voltage, the ground terminal and the output terminal of the power generation circuit via the switching circuit, wherein when the power generation circuit outputs the supply voltage with the electric quantity of the second energy storage element, the charging voltage charges the first energy storage element, the third energy storage element and the fourth energy storage element, and when the power generation circuit outputs the supply voltage according to the electric quantity of the third energy storage element, the charging voltage charges the first energy storage element, the second energy storage element and the fourth energy storage element.

9. The charge pump of claim 1, comprising:

a clock generator coupled to a comparator of the frequency control circuit, receiving a comparison signal and generating a plurality of switching signals according to the comparison signal, and coupled to the power generation circuit and outputting the switching signals to the power generation circuit to control the switching timing sequence in the power generation circuit.

10. The charge pump of claim 1, wherein the frequency control circuit comprises:

the comparator is coupled with a voltage-stabilizing threshold voltage and a voltage-stabilizing signal generated by a voltage-stabilizing circuit, the voltage-stabilizing threshold voltage and the voltage-stabilizing signal are compared to generate a comparison signal, the frequency control circuit generates the operation signal according to the comparison signal, and the operation frequency is related to the frequency of the comparison signal.

11. The charge pump of claim 1, wherein the power generation circuit comprises:

the charging circuits are respectively coupled with a plurality of control signals generated by the frequency control circuit and an output end of the power generation circuit, the charging circuits generate a plurality of output voltages according to the control signals, the power generation circuit generates the supply voltage according to the output voltages, the charging circuits generate a plurality of detection signals to the frequency control circuit, and the frequency control circuit generates the control signals according to the detection signals.

12. The charge pump of claim 1, wherein the frequency control circuit comprises:

the flip-flops comprise a plurality of input ends, a plurality of output ends, a plurality of inverted output ends and a plurality of control ends, wherein the input end of a first-stage flip-flop of the flip-flops is coupled with the inverted output end of a last-stage flip-flop, the output ends of the flip-flops between the first-stage flip-flop and the last-stage flip-flop are sequentially connected with the input ends in series, the control ends are coupled with the operation signal, the operation signal controls the flip-flops to sequentially output a pulse signal to a next-stage flip-flop, and the flip-flops generate a plurality of control signals according to the pulse signals.

Technical Field

The present invention relates to a charge pump, and more particularly, to a charge pump capable of automatically controlling an operating frequency.

Background

A charge pump (charge pump) is a DC-DC converter (DC-DC converter) that generates an output voltage greater than an input voltage and may also generate a negative output voltage. The charge pump has the basic principle of charging and discharging of a capacitor, and can be realized by adopting different connection modes, such as parallel charging, serial discharging, serial charging, parallel discharging and the like, so as to complete voltage conversion functions of boosting, reducing voltage, negative voltage and the like. The general charge pump needs to receive the operation signal from the outside, and the operation signal is a fixed operation frequency. In order to achieve a high load driving capability of the charge pump, the fixed operating frequency is usually set high. However, when the load is changed from a heavy load to a light load, the proportion of power consumption inside the charge pump is significantly increased, resulting in unnecessary power consumption. Furthermore, when the output voltage of the charge pump is to be adjusted, the transmission of the operation signal to the charge pump is usually stopped. However, in this way, the operation signal cannot control the response of the charge pump quickly during the load transition, which results in a large output voltage ripple of the charge pump. In view of the above problems, the present invention provides a charge pump capable of automatically controlling an operating frequency, which generates a power-saving operating frequency by detecting an internal state of the charge pump according to a load. Moreover, the charge pump of the invention achieves the characteristics of small output voltage ripple, quick response and the like.

Disclosure of Invention

The present invention is directed to a charge pump capable of automatically controlling an operating frequency, which reduces electromagnetic interference caused during operation.

The invention provides a charge pump, which comprises a power supply generating circuit and a frequency control circuit. The power generation circuit comprises at least one energy storage element and charges the at least one energy storage element to generate a supply voltage. And the frequency control circuit is coupled with the at least one energy storage element and outputs an operation signal to the power supply generating circuit. The frequency control circuit adjusts an operation frequency of the operation signal according to the electric quantity stored by the at least one energy storage element so as to control the charging of the at least one energy storage element and increase the stored electric quantity.

Drawings

FIG. 1: which is a circuit diagram of a first embodiment of the charge pump of the present invention;

FIG. 2: which is a circuit diagram of a first embodiment of the power generating circuit of the present invention;

FIG. 3: it is a waveform diagram of the detection signal related to the energy storage capacity in fig. 2;

FIG. 4: which is a waveform diagram of the operation signal of fig. 2 with respect to the output load;

FIG. 5: which is a circuit diagram of a second embodiment of the power generating circuit of the present invention;

FIG. 6: it is a circuit diagram of an embodiment of the detection circuit of the present invention;

FIG. 7: it is a waveform diagram of the detection signal related to the energy storage capacity in fig. 5;

FIG. 8: which is a waveform diagram of the operation signal of fig. 5 with respect to the output load;

FIG. 9: which is a circuit diagram of a third embodiment of the power generating circuit of the present invention;

FIG. 10: which is a circuit diagram of a second embodiment of the charge pump of the present invention;

FIG. 11: which is a circuit diagram of an embodiment of the frequency control circuit of figure 10; and

FIG. 12: which are waveforms of the operation signals and the control signals of fig. 10.

[ brief description of the drawings ]

10 charge pump

12 charge pump

20 power supply generating circuit

21 energy storage element

22 switching circuit

23 detection circuit

24 charging circuit

30 frequency control circuit

31 comparator

32 multiplexer

33 time pulse generator

40 voltage stabilizing circuit

50 impedance element

a switching signal

b switching signal

C control terminal

C1 first energy storage element

C2 second energy storage element

C3 third energy storage element

C4 fourth energy storage element

CLK 1 control signal

CLK 2 control signal

CLK 3 control signal

CLK 4 control signal

CLK [ N-1] control signal

CLK [ N ] control signal

CLK 1: N control signal

CLKPUMPOperating signal

D input terminal

D1 drain electrode

D2 drain electrode

Discharge period

F1 flip-flop

F2 flip-flop

F3 flip-flop

FN flip-flop

G1 grid electrode

G2 grid electrode

GND ground terminal

Heavy load

IN1 first input terminal

IN2 second input terminal

Light load

OUT output terminal

Output loading Output load

Q output end

/Q inverting output terminal

During charging

Response time

S1 Source

S2 Source

SW1 change-over switch

SW2 change-over switch

SW3 change-over switch

SW4 change-over switch

SW5 change-over switch

SW6 change-over switch

SW7 change-over switch

SW8 change-over switch

SW9 change-over switch

SW10 change-over switch

SW11 change-over switch

SW12 change-over switch

SW13 change-over switch

SW14 change-over switch

time t1

time t2

time t3

time t4

TFT1 first transistor

TFT2 second transistor

V1 output voltage

V2 output voltage

V3 output voltage

VN-1 output voltage

VN output voltage

VCAP detection signal

VCAP1 first detection signal

VCAP2 second detection signal

VCAP [1] detection signal

VCAP2 detection signal

VCAP [3] detection signal

VCAP [ N-1] detection signal

VCAP [ N ] detection signal

VCAP [1: N ] detection signal

Upper limit voltage of VDD

VDDA charging voltage

VFB feedback voltage

VOUT supply voltage

VR stabilized threshold voltage

VREF reference voltage

VREG voltage stabilization signal

Detailed Description

In order to provide a further understanding and appreciation for the structural features and advantages achieved by the present invention, the following detailed description of the presently preferred embodiments is provided:

although certain terms are used herein to refer to particular elements, those skilled in the art will understand that various terms are used herein to describe the same element, either individually or collectively, and not by way of limitation. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Furthermore, the term "coupled" is intended to include any direct or indirect connection. Thus, if a first device couples to a second device, that connection may be through a direct connection, or through an indirect connection via other devices and other connections.

Please refer to fig. 1, which is a circuit diagram of a charge pump according to a first embodiment of the present invention. As shown, the charge pump 10 includes a power generating circuit 20 and a frequency control circuit 30. The frequency control circuit 30 is coupled to the power generation circuit 20 and receives a detection signal VCAP, and outputs an operation signal CLK according to the detection signal VCAPPUMPTo the power generation circuit 20, in which the operation signal CLK isPUMPIs a frequency signal. The power generation circuit 20 outputs a supply voltage VOUT. Furthermore, the charge pump 10 further includes a voltage regulator 40. The voltage regulator 40 includes a first input terminal coupled to an output terminal of the charge pump 10 and a second input terminal coupled to a reference voltage VREF. Thus, the regulator 40 generates a regulator signal VREG according to the supply voltage VOUT and the reference voltage VREF. The power generating circuit 20 is coupled to the regulator 40 and receives the regulated voltage signal VREG. In addition, the voltage regulation circuit 40 may be coupled to the output terminal of the charge pump 10 through an impedance element 50.

Please refer to fig. 2, which is a circuit diagram of a power generating circuit according to a first embodiment of the present invention. As shown, the power generating circuit 20 includes at least one energy storage device 21, and outputs the supply voltage VOUT according to the power of the energy storage device 21. Furthermore, the power generating circuit 20 includes a switching circuit 22. The switching circuit 22 is coupled to at least one energy storage device 21, and turns on or off a charging path or a discharging path of the energy storage device 21. The switching circuit 22 includes four switching switches SW1, SW2, SW3 and SW4, which are controlled by a plurality of switching signals a and b. A plurality of switching signals a, b according to the operation signal CLKPUMPGenerated, e.g. by a clock generator 33, in dependence on the operating signal CLKPUMPGenerates the switching signal a or the switching signal b, and the switching signal a and the switching signal b can be mutually inverse signals, i.e. the switching signal a is equivalent to the operation signal CLKPUMPThe switching signal b corresponds to the inverted operation signal CLKPUMP. Wherein the clock generator 33 controls the time when the switching signal a and the switching signal b are at the high level and the low level, the real-time clock generator 33 determines the switches SW1, SW2, SW3,The on-time and off-time of SW 4. Therefore, the frequency control circuit 30 raises or lowers the operation signal CLKPUMPThe charging frequency and the discharging frequency of the energy storage device 21 are increased or decreased accordingly. Thus, the charging frequency and the discharging frequency of the energy storage element 21 can be equal to the operating frequency. Furthermore, the power generating circuit 20 outputs the supply voltage VOUT according to the amount of power of the at least one energy storage device 21.

When the switching signal a is high and the switching signal b is low, the switching signal a controls two switches SW1 and SW2 to be turned on to form a charging path, and the switching signal b controls the other two switches SW3 and SW4 to be turned off. Thus, a charging voltage VDDA is charged to the energy storage device 21 through the charging circuit, and the energy storage device 21 is coupled between the charging voltage VDDA and a ground GND. When the switching signal a is at a low level and the switching signal b is at a high level, the switching signal a controls two switches SW1 and SW2 to be turned off, and the switching signal b controls the other two switches SW3 and SW4 to be turned on to form a discharge path. Thus, the regulator signal VREG generated by the regulator 40 is transmitted to the energy storage device 21. The power generating circuit 20 outputs the supply voltage VOUT according to the regulated voltage signal VREG and the electric quantity of the energy storage device 21.

As shown in fig. 2, the energy storage device 21 can be a capacitor, and therefore, when the switches SW1 and SW2 are turned on to form a charging path, the two terminals of the energy storage device 21 are at the level of the charging voltage and the level of the ground GND. When the switches SW3 and SW4 are turned on to form a discharging path, the two terminals of the energy storage device 21 are at the level of the charging voltage and the level of the regulated voltage signal VREG. The energy storage device 21 comprises a first electrode terminal coupled to the charging voltage VDDA and an output terminal of the power generation circuit 20 via the switching circuit 22 (the switches SW1 and SW4), and a second electrode terminal coupled to the switching circuit 22 and the frequency control circuit 30, the second electrode terminal coupled to the ground GND via the switching circuit 22 (the switch SW 2). Therefore, when the energy storage device 21 is charged by the charging voltage VDDA, the power generation circuit 20 stops outputting the supply voltage VOUT.

Referring to fig. 2 and fig. 3, fig. 3 is a waveform diagram of the detection signal of fig. 2 related to the energy storage capacity. As shown in the figure, before the time t1, the switching signal a is at the high level, the switching signal b is at the low level, so the switches SW1 and SW2 are turned on, the energy storage device 21 is charged by the charging voltage VDDA, and the detection signal VCAP is at the level of the ground GND. During the time t1 (during the discharging period (Discharge) of the energy storage device 21), the switching signal a is at the low level, and the switching signal b is at the high level, so the switches SW3 and SW4 are turned on, and the power generation circuit 20 starts to output the supply voltage VOUT according to the electric quantity of the energy storage device 21. Since the load to which the charge pump 10 is connected consumes the power of the energy storage element 21, the power of the energy storage element 21 gradually decreases. At this time, the voltage regulator 40 detects the supply voltage VOUT and generates the voltage regulation signal VREG according to the level of the supply voltage VOUT. That is, when the regulator 40 compares a feedback voltage VFB with the reference voltage VREF, it is detected whether the energy storage device 21 is insufficient for the power required by the load. If the energy storage device 21 is not enough to supply the required power, the voltage stabilizing signal VREG generated by the voltage stabilizing circuit 40 compensates for the insufficient energy storage device 21.

Therefore, during the time t1, the power of the energy storage device 21 gradually decreases, the level of the voltage stabilizing signal VREG gradually increases, and thus the level of the detection signal VCAP also gradually increases. When the level of the detection signal VCAP rises to an upper compensation limit, the energy storage device 21 needs to be charged again. The compensation capability of the compensation upper limit related voltage regulating circuit 40 is compensated, and the compensation upper limit of the embodiment of FIG. 3 is set to an upper limit voltage VDD. Therefore, when the level of the detection signal VCAP rises to about the level of the upper limit voltage VDD (VDD), the energy storage device 21 transitions to the charging period (Recharge), i.e., a time t 2. The switching signal a is again at the high level, the switching signal b is again at the low level, the charging voltage VDDA starts to charge the energy storage device 21 again, and the detection signal VCAP is converted to the level of the ground GND. Therefore, since the voltage regulator 40 detects the supply voltage VOUT to quickly compensate for the deficiency of the energy storage device 21, the supply voltage VOUT output by the charge pump 10 of the present invention has a small ripple phenomenon and achieves the features of fast response. The voltage regulator circuit 40 may be an error amplifier.

The level of the detection signal VCAP varies with the level of the regulator signal VREG, and the level of the regulator signal VREG varies with the amount of electricity (or the amount of electricity) stored in the energy storage device 21Therefore, the level of the detection signal VCAP changes with the change of the amount of power stored in the energy storage element 21. The detection signal VCAP is transmitted to the frequency control circuit 30, so that the frequency control circuit 30 adjusts the operation signal CLK according to the variation of the power stored in the energy storage device 21PUMPThe operating frequency of (c). In various circuit embodiments, if the charge pump 10 does not include the voltage regulator circuit 40, the frequency control circuit 30 can adjust the operation signal CLK directly according to the variation of the power stored in the energy storage device 21PUMPOperating frequency of

The frequency control circuit 30 may include a comparator 31, and the comparator 31 is coupled to the clock generator 33 and outputs a comparison signal to the clock generator 33. The comparator 31 is coupled to a regulated threshold voltage VR and the detection signal VCAP, so that the comparator 31 is coupled to the regulated threshold voltage VR and the regulated signal VREG generated by the regulator 40. The comparator 31 compares the regulated threshold voltage VR with the regulated signal VREG to generate a comparison signal, and the frequency control circuit 30 generates the operation signal CLK according to the comparison signalPUMPWherein the operation signal CLKPUMPThe operating frequency of (a) is related to the frequency of the comparison signal. Furthermore, the regulated threshold voltage VR is related to the compensation capability of the regulator 40, i.e. the level of the regulated threshold voltage VR may be equal to the level of the upper limit voltage VDD, or related to the level of the upper limit voltage VDD, for example, the level of the regulated threshold voltage VR is 90% of the level of the upper limit voltage VDD. Therefore, the frequency control circuit 30 can detect whether the output of the regulator 40 is close to the upper limit of the compensation capability, and control the energy storage device 21 to be charged again.

As shown in fig. 3, when the detection signal VCAP rises to the vicinity of the upper limit voltage VDD, the comparator 31 of the frequency control circuit 30 compares the detection signal VCAP with the regulated threshold voltage VR to control the comparison signal to transition to the low level. The frequency control circuit 30 can generate the operation signal CLK according to the comparison signalPUMPAlternatively, the frequency control circuit 30 may directly output the comparison signal as the operation signal CLK when the comparison signal is not processed otherwisePUMP. Therefore, the switching signals a, b are based on the operation signal CLKPUMPAnd then the switching signal a, b is changed to high or low level according to the comparison signal. Thus, storeThe energy storage device 21 increases or decreases the stored electric energy according to the charging or discharging of the switching signals a, b, i.e. the energy storage device 21 is according to the operation signal CLKPUMPThe stored electric quantity is increased or decreased by charging or discharging, or the stored electric quantity is increased or decreased by charging or discharging the energy storage element 21 according to the comparison signal.

Furthermore, the consumption rate of the energy stored in the energy storage element 21 is related to the demand of the load of the charge pump 10 for power. Therefore, as shown in FIG. 4, it is a waveform diagram of the operation signal of FIG. 2 with respect to the output load. When the output load (output load) is Light load (Light load), the demand for power is low, and the power stored in the energy storage element 21 is consumed at a low speed, which means that the discharge time of the energy storage element 21 is long. Therefore, the level of the regulator signal VREG generated by the regulator circuit 40 also rises slowly, and the level of the detection signal VCAP also rises slowly to a level near the upper limit voltage VDD. Therefore, as shown in fig. 4, the period of time t1 during the light load period is longer than the period of time t3 during the Heavy load (Heavy load). That is, during the heavy load, the energy stored in the energy storage element 21 is consumed at a high speed.

Therefore, the energy stored in the energy storage element 21 is consumed at a slower speed, and the energy storage element 21 is slowly transited to the charging cycle (time t 1-time t 2). The energy stored in the energy storage device 21 is consumed faster, and the energy storage device 21 is converted into a charging cycle faster (time t 3-time t 4). The charging periods t2 and t4 of the embodiment of fig. 4 may be a fixed time, which may be determined by the equivalent impedances (e.g., impedance (R) and capacitive reactance (C)) of the energy storage element 21. Thus, the frequency control circuit 30 can automatically control the operation signal CLK according to different loads (light load and heavy load) by detecting the internal state of the charge pump 10PUMPThe operating frequency of (c). As shown in fig. 4, the operating frequency of the charge pump 10 at light load is lower than that at heavy load, i.e. the operating frequency from time t1 to time t2 is lower than that from time t3 to time t 4. The operating frequency can be regarded as the charging frequency. Therefore, the charge pump 10 can generate a power-saving operation frequency without receiving a plurality of signals with different frequencies from the outside or receiving a signal with an adjustable frequency from the outside, and control the charging and discharging time in the charge pump.

Referring back to fig. 4, during the period of the output load changing from the light load to the heavy load, the energy storage device 21 consumes the stored energy rapidly in a short time, and the level of the detection signal VCAP detected by the frequency control circuit 30 rises to the level of the upper limit voltage VDD rapidly, so that the frequency control circuit 30 controls the operation signal CLK in a short timePUMPWhen the voltage level is again changed to the low level, the energy storage device 21 is charged again. Thus, the operation signal CLK is asserted during the Response time (Response time) of the load transitionPUMPIs significantly higher than the operating frequency during light and heavy loads, and the operating signal CLK is used when the power generating circuit 20 stably supplies the power required by the output loadPUMPTo an operating frequency of time t 3-time t 4. Therefore, the charge pump 10 can automatically generate the operation signal CLK with various operation frequencies according to the variation speed of the electric quantity stored in the energy storage device 21PUMPThe power consumption inside the charge pump 10 is appropriately controlled.

Please refer to fig. 5, which is a circuit diagram of a power generating circuit according to a second embodiment of the present invention. As shown, the energy storage element 21 of the embodiment of fig. 2 is replaced by a first energy storage element C1 and a second energy storage element C2. The first energy storage element C1 and a second energy storage element C2 are coupled to the charging voltage VDDA, the ground GND and the output terminal of the power generation circuit 20 through the switching circuit 22. Compared with the switch circuit 22 of fig. 2, the switch circuit 22 of the embodiment of fig. 5 has four switches SW5, SW6, SW7 and SW8 on the right side. Thus, the state of the charge pump 10 of the embodiment of fig. 2 can be changed from single-phase (one of charging or discharging) to dual-phase (both charging and discharging) as in the embodiment of fig. 5. That is, the charge pump 10 of the embodiment of fig. 2 stops outputting the supply voltage VOUT when the energy storage element 21 is charged. The charge pump 10 of the embodiment of fig. 5 charges the right second energy storage device C2 when outputting the supply voltage VOUT according to the charge of the left first energy storage device C1 (discharging the first energy storage device C1), and charges the left first energy storage device C1 when outputting the supply voltage VOUT according to the charge of the right second energy storage device C2 (discharging the second energy storage device C2). In other words, when the power generation circuit 20 outputs the supply voltage VOUT according to the amount of power of the second energy storage device C2, the charging voltage VDDA charges the first energy storage device C1. When the power generation circuit 20 outputs the supply voltage VOUT according to the power of the first energy storage device C1, the charging voltage VDDA charges the second energy storage device C2.

Furthermore, the charge pump 10 of the embodiment of fig. 5 further includes a detection circuit 23. The detecting circuit 23 is coupled to the frequency control circuit 30 and the voltage regulator signal VREG generated by the voltage regulator circuit 40, for detecting the voltage regulator signal VREG to generate a detecting signal VCAP to the frequency control circuit 40. The frequency control circuit 40 controls the operation signal CLK according to the detection signal VCAP generated by the detection circuit 23PUMPThe operating frequency of (c). Please refer to fig. 6, which is a circuit diagram of a detection circuit according to an embodiment of the present invention. As shown, the detecting circuit 23 includes a first transistor TFT1 and a second transistor TFT 2. The gate G1 of the first transistor TFT1 is coupled to a second input terminal IN2 and the source S2 of the second transistor TFT2, the source S1 of the first transistor TFT1 is coupled to a first input terminal IN1 and the gate G2 of the second transistor TFT2, and the drain D1 of the first transistor TFT1 is coupled to an output terminal OUT of the detection circuit 23. The source S2 of the second transistor TFT2 is coupled to the second input terminal IN2, the drain D2 of the second transistor TFT2 is coupled to the output terminal OUT of the detecting circuit 23, and the gate G2 of the second transistor TFT2 is coupled to the first input terminal IN 1. The detecting circuit 23 can be replaced by a counter and a switch, that is, the counter is used to count the charging and discharging time of the energy storage element, and then the state of the switch is changed.

When the voltage level of the first input terminal IN1 is low, it indicates that the first energy storage device C1 is charging, and when the voltage level of the second input terminal IN2 is high, it indicates that the second energy storage device C2 is discharging. Thus, when the voltage level of the first input terminal IN1 is at the low level and the voltage level of the second input terminal IN2 is at the high level, the second transistor TFT2 is turned on and the first transistor TFT1 is turned off. Since the second transistor TFT2 is turned on, the level of the detection signal VCAP is the voltage level of the second input terminal IN 2. On the contrary, when the voltage level of the first input terminal IN1 is high and the voltage level of the second input terminal IN2 is low, the first transistor TFT1 is turned on and the second transistor TFT2 is turned off. Since the first transistor TFT1 is turned on, the level of the detection signal VCAP is the voltage level of the first transistor TFT 1.

Referring to fig. 5, fig. 6 and fig. 7, fig. 7 is a waveform diagram of the detection signal of fig. 5 related to the energy storage capacity. As shown in fig. 5, the first detection signal VCAP1 is related to the power of the left first capacitor C1, and the second detection signal VCAP2 is related to the power of the right second energy storage device C2. At time t1 in fig. 7, the first capacitor C1 starts to discharge, the level of the first detection signal VCAP1 starts to gradually rise, the second energy storage element C2 starts to charge, and the second detection signal VCAP2 is at the level of the ground GND. Conversely, at time t2 in fig. 7, the first capacitor C1 starts to charge, the level of the first detection signal VCAP1 is the level of the ground GND, the second energy storage element C2 starts to discharge, and the second detection signal VCAP2 starts to gradually rise. Therefore, the charge pump 10 can operate in two phases (charge and discharge) at the same time (t1 or t 2). In addition, since the voltage regulator signal VREG outputted by the voltage regulator circuit 40 has the default lowest voltage level of 1/2VDD, the lowest voltage level of the detection signal VCAP detected by the frequency control circuit 30 is 1/2 VDD. The rest of the technical contents are as described in fig. 3, and will not be described again here.

Please refer to fig. 8, which is a waveform diagram of the operation signal of fig. 5 with respect to the output load. As shown, the waveforms of fig. 8 are similar to those of fig. 4, with the difference that fig. 4 is a waveform diagram associated with the single-phase charge pump 10, and fig. 8 is a waveform diagram associated with the two-phase charge pump 10. Therefore, during the light load period shown in fig. 8, the power required by the output load is the same, and the speed of consuming the power of the energy storage device 21 is the same, i.e., the time for the level of the detection signal VCAP to rise to the level near the upper limit voltage VDD is the same, so that the operation signal CLK is appliedPUMPThe time for changing from high level to low level or from low level to high level is the same. In other words, in the embodiment of the two-phase charge pump 10, when the first capacitor C1 (the second energy storage element C2) is charged, the operation signal CLK still needs to wait for the electric quantity of the second energy storage element C2 (the first capacitor C1) to decrease to a certain degreePUMPThe second energy storage element C2 (the first energy storage element C1) is turned to a high level or a low level according to the charge. In fig. 5, the charging time of the first energy storage element C1 on the left side is approximately equal to the charging time of the second energy storage element C2 on the right side.

Please refer to fig. 9, which is a circuit diagram of a power generating circuit according to a third embodiment of the present invention. As shown in the drawings, the at least one energy storage device 21 shown in fig. 2 and 5 is replaced by a first energy storage device C1, a second energy storage device C2, a third energy storage device C3 and a fourth energy storage device C4. The four energy storage devices C1-C4 may be four capacitors C1-C4 coupled to the charging voltage VDDA, the ground GND and an output terminal of the power generation circuit 20 via the switching circuit 22. The switch circuit 22 of the embodiment of fig. 9 includes a plurality of switches SW1, SW2, SW3, SW4, SW5, SW6, SW7, SW8, SW9, SW10, SW11, SW12, SW13 and SW 14. Therefore, when the switching signal a is high and the switching signal b is low, the charging voltage VDDA charges the left first energy storage element C1, the second energy storage element C2 discharges, and the charging voltage VDDA charges the right third energy storage element C3 and the fourth energy storage element C4. Therefore, if the charging voltage VDDA is one time higher than the first voltage, the first energy storage element C1, the third energy storage element C3 and the fourth energy storage element C4 store one time higher than the first voltage. Furthermore, when the switching signal a is turned to the low level and the switching signal b is turned to the high level, the charge of the first energy storage device C1 and the charging voltage VDDA charge the second energy storage device C2, the third energy storage device C3 discharges, and the charging voltage VDDA charges the fourth energy storage device C4 on the right side. The second energy storage element C2 and the fourth energy storage element C4 store electric energy with twice the voltage.

Therefore, when the switching signal a returns to the high level and the switching signal b returns to the low level, the second energy storage element C2 discharges, so the supply voltage VOUT is generated according to the power of the second energy storage element C2 and the voltage stabilizing signal VERG. In the embodiment of fig. 9, the level of the supply voltage VOUT can be up to 3 times the level of the voltage, i.e., twice the charging voltage VDDA plus one time the voltage regulator signal VREG. Therefore, through the operation of the charge pump 10, the supply voltage VOUT can also generate three times the voltage according to the third energy storage device C3 and the regulated voltage signal VREG. Therefore, when the power generation circuit 20 outputs the supply voltage VOUT according to the amount of power of the second energy storage device C2, the charging voltage VDDA charges the first energy storage device C1, the third energy storage device C3 and the fourth energy storage device C4. When the power generation circuit 20 outputs the supply voltage VOUT according to the power of the third energy storage device C3, the charging voltage VDDA charges the first energy storage device C1, the second energy storage device C2 and the fourth energy storage device C4. As described in the embodiment of fig. 9, the charge pump 10 of the embodiments of fig. 2 and 5 can output a supply voltage VOUT of two times.

Please refer to fig. 10, which is a circuit diagram of a charge pump according to a second embodiment of the present invention. The power generation circuit 20 may be a single set of single or dual phase circuits as in the embodiments of fig. 2, 5 and 9, or may be multiple sets of single or dual phase circuits as in fig. 10, as shown. That is, the power generation circuit 20 includes a plurality of charging circuits 24. The charging circuits 24 are respectively coupled to a plurality of control signals CLK [1], CLK [2], CLK [3] … CLK [ N-1], CLK [ N ] generated by the frequency control circuit 30 and an output terminal of the power generation circuit 20. The charging circuits 24 generate output voltages V1, V2, V3 … VN-1, VN according to the control signals CLK [ 1-N ]. The power generation circuit 20 generates the supply voltage VOUT according to the output voltages V1-N. The charging circuits 24 generate a plurality of detection signals VCAP [1], VCAP [2], VCAP [3] … VCAP [ N-1], VCAP [ N ] to the frequency control circuit 30, and the frequency control circuit 30 generates the control signals CLK [ 1-N ] according to the detection signals VCAP [ 1-N ]. Each of the charging circuits 24 in the embodiment of fig. 10 may be as in the embodiments of the power generating circuit 20 in fig. 2, 5 and 9, and therefore, the technical contents of the charging circuits 24 will not be repeated. The frequency control circuit 30 receives each detection signal VCAP [ 1-N ] through a plurality of transmission lines, and receives the control signals CLK [ 1-N ] through a plurality of transmission lines.

Furthermore, the charge pump 12 further includes a plurality of flip-flops F1, F2, F3 … FN, the flip-flops F [ 0-N ]]The timing of the switching in the charging circuit 24 may be controlled by a clock generator 33 as described above, and the flip-flops F [ 0-N ] in this embodiment]May be implemented as a johnson counter. The flip-flops F0-N]Comprises a plurality of input terminals D, a plurality of output terminals Q, a plurality of inverted output terminals/Q and a plurality of control terminals C. The flip-flops F1-N]The input D of a first stage flip-flop F1 is coupled to the inverted output/Q of the last stage flip-flop FN. The flip-flops F2, F3 … F [ N-1] between the first stage flip-flop F1 and the last stage flip-flop FN]The output terminals Q are connected with the input terminals D in series. The control terminals C are coupled to the operation signal CLKPUMPAn operation signal CLKPUMPControlling the flip-flops F1-N]Sequentially outputting a pulse signal to the next stage of flip-flops F [ 0-N ]]Generates the control signals CLK [ 1-N ] according to the pulse signals]。

Therefore, the first stage flip-flop F1 outputs a pulse signal to the second stage flip-flop F2, and the first stage flip-flop F1 outputs the pulse signal as the control signal CLK [1] of the first stage charging circuit (1)24]. Thus, the first stage charging circuit (1)24 is based on the control signal CLK [1]]Discharged or charged. Furthermore, after the first stage charging circuit (1)24 discharges, the second stage flip-flop F2 outputs a pulse signal to the third stage flip-flop F3 as the control signal CLK [2]]The second stage charging circuit (2)24 is based on the control signal CLK [2]]And (4) discharging. By analogy, the CLK signal is operatedPUMPThrough the flip-flops F1-N]The discharging and charging of each charging circuit 24 can be controlled in sequence. Thus, the charging circuits 24 in the charge pump 12 can reduce the generation of electromagnetic interference due to non-simultaneous switching states, i.e., non-simultaneous switching of charging and discharging states. In addition, the flip-flops F [ 1-N ]]Can be disposed in the frequency control circuit 30, i.e. the frequency control circuit 30 outputs the control signals CLK [ 1-N ]]Controls the discharge and charge of each charging circuit 24.

Please refer to fig. 11, which is a circuit diagram of an embodiment of the frequency control circuit of fig. 10. As shown, the frequency control circuit 30 further includes a multiplexer 32. The multiplexer 32 receives the control signals CLK [ 1-N ]]And the detection signals VCAP [ 1-N]And according to the control signals CLK [ 1-N ]]Outputs the detection signals VCAP [ 1-N ]]E.g. detection signal VCAP [1]]. That is, the charge pump 12 follows the control signals CLK [ 1-N]It can be determined which charging circuit 24 is providing power to output the supply voltage VOUT. Therefore, the frequency control circuit 30 outputs the operation signal CLKPUMPTo control the charging and discharging of the charging circuits 24.

Referring to fig. 10 and 12, fig. 12 is a waveform diagram of the operation signals and the control signals of fig. 10. As shown, the operation signal CLKPUMPBy controlling the flip-flops F1-N]The control terminals C of the clock signal flip-flop the control signals CLK [ 1-N ]]A whileTransition to high level. I.e. the flip-flops F1-N are initialized]The output end Q of the output stage outputs the pulse signal with low level, so that the inverted output end/Q of the final stage flip-flop FN outputs the pulse signal with high level. Thus, the input terminal D of the first stage flip-flop F1 receives the high level pulse signal outputted from the last stage flip-flop FN. Thereafter, by operating the signal CLKPUMPEach stage of flip-flops F1 to N]According to the pulse signal of the output high level. For example, the flip-flops F [ 1-N ] are initialized]The output of the output Q of 0000, the output of the inverted output/Q of the last stage flip-flop FN is 1, and the input D of the first stage flip-flop F1 receives 1. Therefore, as shown in fig. 12, the outputs of the output terminals Q of the four flip-flops are changed to 1000, 1100, 1110, 1111, and at this time, the output of the inverted output terminal/Q of the last stage flip-flop FN is 0. Therefore, the input end D of the first stage flip-flop F1 receives 0, and the outputs Q of the four flip-flops change to 0111, 0011, 0001, and 0000.

In addition, at the state transition of the output load, the operation signal CLK changes due to the change of the power consumption speed of the charge pump 12PUMPAlso the operating frequency of (c) varies. Thus, the control signals CLK [ 1-N ]]The frequency of the same with the operation signal CLKPUMPIs changed.

In summary, the present invention discloses a charge pump, which includes a power generating circuit and a frequency control circuit. The power generation circuit comprises at least one energy storage element and charges the at least one energy storage element to generate a supply voltage. And the frequency control circuit is coupled with at least one energy storage element and outputs an operation signal to the power supply generating circuit. The frequency control circuit adjusts an operation frequency of the operation signal according to the electric quantity stored by the at least one energy storage element so as to control the charging of the at least one energy storage element to increase the stored electric quantity.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, which is defined by the appended claims.

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