阅读说明：本技术 具有高隔离度的低功率高动态范围的基于有源混频器的微波下变频器 (Low power high dynamic range active mixer based microwave down converter with high isolation ) 是由 Y·达瓦赫卡 A·巴蒂亚 S·玛克赫吉 于 2019-06-04 设计创作，主要内容包括：本申请公开一种具有高隔离度的低功率高动态范围的基于有源混频器的微波下变频器。一种下变频器(100),其包括：第一(140A)和第二(140B)偏置电路；混频器(120)；以及变压器(150),其被耦合以接收放大器输出信号(RF信号115)。第一和第二偏置电路分别各自包括偏置晶体管(M1；M4)以及第一(111)和第二(121)节点。混频器包括耦合到第一节点的第一(M2)和第二(M3)晶体管以及耦合到第二节点的第三(M5)和第四(M6)晶体管。第二和第四晶体管耦合到第三节点(131)。第一和第三晶体管耦合到第四节点(141)。混频器还包括耦合到第四节点及电源电压节点(Vdd 105)的第一电阻器(R1)以及耦合到第三节点及电源电压节点的第二电阻器(R2)。变压器包括：初级绕组(154),其被耦合以接收放大器输出信号并且耦合到电源电压(Vdd105)；以及次级绕组(156),其在第一节点处耦合到混频器和第一偏置电路,并且在第二节点处耦合到混频器和第二偏置电路。(an active mixer based microwave down converter with low power and high dynamic range with high isolation is disclosed. A down converter (100), comprising: first (140A) and second (140B) bias circuits; a mixer (120); and a transformer (150) coupled to receive the amplifier output signal (RF signal 115). The first and second bias circuits each include a bias transistor (M1; M4) and first (111) and second (121) nodes, respectively. The mixer includes first (M2) and second (M3) transistors coupled to a first node and third (M5) and fourth (M6) transistors coupled to a second node. The second and fourth transistors are coupled to a third node (131). The first and third transistors are coupled to a fourth node (141). The mixer also includes a first resistor (R1) coupled to the fourth node and the supply voltage node (Vdd105) and a second resistor (R2) coupled to the third node and the supply voltage node. The transformer includes: a primary winding (154) coupled to receive the amplifier output signal and coupled to a supply voltage (Vdd 105); and a secondary winding (156) coupled to the mixer and the first bias circuit at a first node and to the mixer and the second bias circuit at a second node.)

1. a down converter, comprising:

a first bias circuit including a first bias transistor and a first node;

A second bias circuit including a second bias transistor and a second node;

a mixer, comprising:

A first resistor for a first electric power source,

A second resistor is provided on the first side of the substrate,

A first transistor and a second transistor coupled together at the first node and to the first bias circuit,

A third transistor and a fourth transistor coupled together at the second node and to the second bias circuit,

wherein the second transistor and the fourth transistor are coupled together at a third node, the first transistor and the third transistor are coupled together at a fourth node, the first resistor is coupled to the fourth node and to a supply voltage node, and the second resistor is coupled to the third node and to the supply voltage node; and

a transformer coupled to receive an amplifier output signal and to the mixer, the transformer including a primary winding and a secondary winding, wherein the primary winding is coupled to receive the amplifier output signal and to a supply voltage, and the secondary winding is coupled to the mixer and the first bias circuit at the first node and to the mixer and the second bias circuit at the second node.

2. The downconverter of claim 1, wherein the first biasing circuit further comprises a first filter coupled to the first biasing transistor and the first node, and the second biasing circuit further comprises a second filter coupled to the second biasing transistor and the second node.

3. The downconverter of claim 2, wherein the first filter includes a first inductor coupled to the first node and a first capacitor, and the first capacitor is further coupled to a ground node, and the second filter includes a second inductor coupled to the second node and a second capacitor, and the second capacitor is further coupled to the ground node.

4. The downconverter of claim 2, wherein the first filter and the second filter are located on the same semiconductor die as the mixer.

5. The downconverter of claim 1, wherein a base terminal of the first transistor and a base terminal of the fourth transistor are coupled to receive a first signal from an oscillator, and a base terminal of the second transistor and a base terminal of the third transistor are coupled to receive a second signal from the oscillator.

6. The downconverter of claim 1, further comprising an oscillator to provide a first oscillator signal to the base terminals of the first and fourth transistors and a second oscillator signal to the base terminals of the second and third transistors, wherein the oscillator is located on the same semiconductor die as the downconverter.

7. A down converter as recited in claim 1, wherein a voltage of the intermediate frequency signal is output at the third node and the fourth node.

8. A down converter, comprising:

An amplifier coupled to receive a radio frequency input signal and to generate an amplified output signal;

A first bias circuit comprising a first bias transistor and a first node configured to be coupled to a mixer;

A second bias circuit comprising a second bias transistor and a second node configured to be coupled to the mixer; and

A transformer including a primary winding and a secondary winding, wherein the primary winding is coupled to the amplifier and to a supply voltage node, and the secondary winding is coupled to the first bias circuit at the first node and to the second bias circuit at the second node.

9. The downconverter of claim 8, further comprising the mixer, the mixer comprising:

A first resistor;

A second resistor;

a first transistor and a second transistor coupled to the first bias circuit at the first node; and

Third and fourth transistors coupled to the second bias circuit at the second node; and is

Wherein the second transistor and the fourth transistor are coupled together at a third node,

the first transistor and the third transistor are coupled together at a fourth node,

The first resistor is coupled to the fourth node and to a supply voltage node, an

The second resistor is coupled to the third node and to the supply voltage node.

10. the downconverter of claim 9, wherein a base terminal of the first transistor and a base terminal of the fourth transistor are coupled to receive a first signal from an oscillator, and a base terminal of the second transistor and a base terminal of the third transistor are coupled to receive a second signal from the oscillator.

11. A down converter as recited in claim 10, wherein the oscillator is located on a same semiconductor die as the transformer.

12. A down converter as recited in claim 9, wherein a voltage of the intermediate frequency signal is output at the third node and the fourth node.

13. The downconverter of claim 8, wherein the first biasing circuit further comprises a first filter coupled to the first biasing transistor and the first node, and the second biasing circuit further comprises a second filter coupled to the second biasing transistor and the second node.

14. The downconverter of claim 13, wherein the first filter includes a first inductor coupled to the first node and a first capacitor, and the first capacitor is further coupled to a ground node, and the second filter includes a second inductor coupled to the second node and a second capacitor, and the second capacitor is further coupled to the ground node.

15. the downconverter of claim 13, wherein the first filter and the second filter are located on the same semiconductor die as the amplifier.

16. a down converter, comprising:

An amplifier coupled to receive an input signal and to generate an amplified output signal;

a first bias circuit comprising a first bias transistor coupled to a first inductor;

a second bias circuit comprising a second bias transistor coupled to a second inductor;

A mixer including first and second resistors and first, second, third, and fourth transistors, wherein the first and second transistors are coupled to the first inductor of the first bias circuit at a first node, the third and fourth transistors are coupled to the second inductor of the second bias circuit at a second node, the first resistor is coupled to the first and third transistors and to a supply voltage node, and the second resistor is coupled to the second and fourth transistors and to the supply voltage node; and

A transformer comprising a primary winding and a secondary winding, wherein the primary winding is coupled to receive the amplified output signal and the secondary winding is coupled to the first node and to the second node to output the amplified output signal to the mixer.

17. The downconverter of claim 16, wherein a base terminal of the first transistor and a base terminal of the fourth transistor are coupled to receive a first signal from an oscillator, and a base terminal of the second transistor and a base terminal of the third transistor are coupled to receive a second signal from the oscillator.

18. a down converter as recited in claim 17, wherein the oscillator is located on a same semiconductor die as the mixer.

19. The downconverter of claim 17, wherein a third node interconnecting the first resistor to the first transistor and the third transistor provides an intermediate frequency signal that is referenced to a voltage on a fourth node interconnecting the second resistor to the second transistor and the fourth transistor.

20. The downconverter of claim 16, wherein the first bias circuit further comprises a first capacitor coupled to the first inductor and to a ground node, and the second bias circuit further comprises a second capacitor coupled to the second inductor and to the ground node.

background

Radio frequency down converters are typically affected by low dynamic range, high power consumption, and poor local oscillator port-to-radio frequency port isolation. Current commutated Gilbert (Gilbert) cell mixers provide excellent switching speeds by being driven with low amplitude local oscillator signals, which makes them attractive for microwave or millimeter wave operation. However, these mixers are noisy and therefore accompanied by a Low Noise Amplifier (LNA) to keep the overall noise within the system budget. Conventional solutions have difficulty achieving good dynamic range characterized by Input-referenced Third-Order-Intercept Point (Input-referenced Third-Order-Intercept Point) minus noise figure (IIP3-NF) while maintaining low power consumption and Local Oscillator (LO) port to Radio Frequency (RF) port isolation.

Disclosure of Invention

in some examples, a down converter includes an amplifier, a mixer, a first bias circuit, a second bias circuit, and a transformer. The amplifier is configured to receive a radio frequency input. The transformer includes a primary winding and a secondary winding. The primary winding is coupled to receive the amplifier output signal and to a supply voltage. The secondary winding is coupled to the mixer and the first bias circuit at a first node and to the mixer and the second bias circuit at a second node. The first bias circuit includes a first bias transistor and a first node configured to be coupled to the mixer. In some examples, the first bias circuit further comprises a first filter. The second bias circuit includes a second bias transistor and a second node configured to be coupled to the mixer. In some examples, the second bias circuit further comprises a second filter. The mixer includes: a first transistor and a second transistor coupled to the first bias circuit at a first node; third and fourth transistors coupled to the second bias circuit at a second node; and a first resistor and a second resistor. The second transistor and the fourth transistor are coupled to a third node. The first transistor and the third transistor are coupled to a fourth node. The first resistor is coupled to the fourth node and the supply voltage node, and the second resistor is coupled to the third node and the supply voltage node.

Drawings

for a detailed description of various examples, reference will now be made to the accompanying drawings in which:

FIG. 1 illustrates an exemplary active mixer-based microwave down converter, according to one embodiment.

FIG. 2 illustrates an example configuration of an active mixer-based microwave down converter in accordance with one embodiment.

FIG. 3 illustrates an additional example configuration of an active mixer-based microwave down converter, according to one embodiment.

FIG. 4 illustrates another example configuration of an active mixer-based microwave down converter in accordance with one embodiment.

FIG. 5 illustrates another example configuration of an active mixer-based microwave down converter in accordance with one embodiment.

Detailed Description

described herein are examples of active mixer based microwave down converters. In a disclosed example, a down converter includes a mixer, a Low Noise Amplifier (LNA), a transformer, and two bias circuits. The disclosed mixer is a derivative of the Gilbert cell mixer and is used as an active mixer. The disclosed mixer is magnetically coupled to the LNA through a transformer. Each bias circuit includes a transistor biased to operate as a current source in a saturation region and a filter for reducing noise of the transistor serving as the current source. Some downconverters include an isolation transformer with a secondary winding coupled to the gate of an input transistor that feeds into a switching core of the mixer. However, in the disclosed example, the isolation transformer is coupled such that the secondary winding is coupled to the emitter of the switch port transistor of the mixer.

Arranging the transformer in the disclosed down converter allows for improved biasing of the mixer and isolation of the LNA and mixer domain signal currents. The noise of each tail current source (bias transistor) is attenuated by a low pass filter without compromising the signal bandwidth. The current gain from the inter-stage transformer improves the signal-to-noise ratio (SNR) of the input signal to be mixed with the associated input signal from the oscillator. As a result, the disclosed down converter provides a relatively high dynamic range while achieving relatively low power consumption, and also provides improved isolation between the LNA and the mixer.

FIG. 1 shows an example of an active mixer-based microwave downconverter 100, the microwave downconverter 100 downconverting a Radio Frequency (RF) signal 115. In this example, the down-converter 100 includes a mixer 120 that is an active mixer. The disclosed mixer 120 is magnetically coupled to a Low Noise Amplifier (LNA)130 through a transformer 150 and includes transistors M2, M3, M5, and M6, and resistors R1 and R2. Downconverter 100 also includes two bias circuits 145A and 145B. The first bias circuit 145A includes M1 coupled to the filter 140A. The second bias circuit 145B includes M4 and a filter 140B. The transistors M1 and M4 function as bias transistors and operate in the saturation region to function as current sources. The filters 140A and 140B attenuate noise from the tail current sources M1 and M4. In some implementations, bias circuits 145A and 145B introduce relatively little noise to downconverter 100. LNA130 amplifies RF signal 115. The mixer 120 mixes or multiplies the output of the LNA130 with an oscillator signal, such as a Local Oscillator (LO) signal 118.

as described above, the LNA130 receives the radio frequency input signal 115. The transformer 150 magnetically couples the LNA130 to the mixer 120 and amplifies the current from the LNA130 based on a comparison of the number of windings in the primary winding 154 and the number of windings in the secondary winding 156. Magnetic coupling through transformer 150 isolates LNA130 from mixer 120 and provides independent current paths through each of LNA130 and mixer 120. This isolation reduces the LO coupling through the system. Transformer 150 is powered by a supply voltage VDD provided on supply voltage node 105. In some examples, transformer 150 is a balun transformer (balun), which is a type of transformer used to connect a balanced line with two conductors and equal current in opposite directions to an unbalanced line with a single conductor and ground.

As shown, one terminal of the secondary winding 156 of transformer 150 is connected at node 111 to inductor L1 of filter 140A of bias circuit 145A and to the emitters of M2 and M3 from mixer 120. Similarly, the other terminal of secondary winding 156 is connected at node 121 to inductor L2 of filter 140B of bias circuit 145B and to the emitters of M5 and M6 from mixer 120. The transistors M2, M3, M5, and M6 in the example of fig. 1 include Bipolar Junction Transistors (BJTs). Each transistor comprises a control input (base) and a pair of current terminals (collector and emitter). In other examples, the transistors M2, M3, M5, and M6 are implemented as n-type metal oxide semiconductor field effect transistors (NMOS) or p-type metal oxide semiconductor field effect transistors (PMOS). As a field effect transistor, the control input is a gate terminal and the current terminals are a source terminal and a drain terminal.

as previously discussed, the transistors M1 and M4 from the bias circuits 145A and 145B act as bias transistors and operate in the saturation region to act as tail current sources. In this example, transistors M1 and M4 comprise NMOS transistors and include a control input and a pair of current terminals. As a field effect transistor, the control input comprises a gate terminal and the current terminal comprises a source terminal and a drain terminal. In other examples, transistors M1 and M4 may be implemented as Bipolar Junction Transistors (BJTs), and in these examples, the control input includes a base terminal and the current terminal includes an emitter terminal and a collector terminal. The source terminals of M1 and M4 are connected to ground node 110, while the gates of M1 and M4 are connected to a bias voltage Vb. The bias voltage Vb is selected so that the transistors M1 and M4 operate in the saturation region. The drain terminals of bias transistors M1 and M4 are connected to filters 140A and 140B, respectively.

As previously discussed, filters 140A and 140B reduce noise of tail bias current Itail. In this example, filters 140A and 140B include inductors and capacitors. Filter 140A includes inductor L1 and capacitor C1. Filter 140B includes inductor L2 and capacitor C2. In other examples, filters 140A and 140B include resistors and capacitors. The architecture of the filter and the values of the filter components are such that the filter achieves a frequency response that reduces noise without affecting the radio frequency input signal 115. Inductor L1 and capacitor C1 are connected together and to the drain of M1. Capacitor C1 is connected to ground node 110. Inductor L2 and capacitor C2 are connected together and to the drain of M4. Capacitor C2 is connected to ground node 110.

As previously discussed, the emitters of M2 and M3 are connected together at node 111, while the emitters of M5 and M6 are connected together at node 121. The base terminals of M2 and M6 are connected to the oscillator and receive the LO signal 118. The oscillator may be located on the same chip as the mixer 120 or separate from the mixer 120 on a different chip. The base terminals of M3 and M5 are connected to each other and receiveSignal 116.Represents the local oscillator signal and is reciprocal (reciprocal) with respect to LO signal 118. The collectors of M2 and M5 are connected to resistor R1 at node 141. The collectors of M3 and M6 are connected to resistor R2 at node 131. Resistors R1 and R2 are connected to the supply voltage node 105 (VDD). Voltage of intermediate frequency signal IF in VIF⁺and VIF^-And (6) outputting. The intermediate frequency signal represents the mixed LO signal 118,Signal 116 and RF input signal 115.

In some examples, the down converter 100 is fabricated on a single semiconductor die ("chip"). For example, fig. 1 shows that mixer 120, LNA130, transformer 150, and bias circuits 145A and 145B are fabricated on a single semiconductor die 125. In other examples, as in fig. 2-5, the downconverter 100 includes components provided on different semiconductor dies. In the example of fig. 2, mixer 120, bias circuits 145A and 145B, and transformer 150 are disposed on a common semiconductor die 202, while LNA130 is disposed on a separate semiconductor die 204. In the example of fig. 3, LNA130, transformer 150, bias circuits 145A and 145B are disposed on die 304, while mixer 120 is disposed on a separate die 302. In the example of fig. 4, LNA130, transformer 150, mixer 120, and bias transistors M1 and M4 are disposed on die 402, while filters 140A and 140B are disposed on a different die 404. In the example of fig. 5, the transformer coupling 150 and the bias transistors M1 and M4 are arranged on a single semiconductor die 502, while the LNA130, the filters 140A and 140B, and the mixer 120 are disposed on one or more separate dies 504.

as previously described, the example downconverter 100 provides a relatively high dynamic range. For readability purposes, dynamic range will be discussed with respect to Dynamic Range Inverse (DRI):DRI can be represented by the equationWhere XGM represents the amplitude of the LNA130 referenced to the input third order intercept point of the input of the LNA, XM represents the amplitude of the mixer 120 referenced to the input third order intercept point of the input of the mixer 120, IGM represents the noise current of the input transistor of the LNA130, and IM represents the noise current of the mixer 120 referenced to the input of the mixer 120. The example downconverter 100 provides a relatively high dynamic range due to noise reduction, increased input reference third order intercept points, and low current operation of the overall downconverter. The noise in the down-converter is relatively low because the LNA130 operates at a lower current, the mixer 120 operates at an improved current, the transformer coupling 150 provides current gain, and the noise from the tail current Itail is filtered by the filters 140A and 140B. As the number of active devices in the path of the RF signal 115 is reduced, the input reference third order intercept point is higher, thereby reducing intermodulation (intermodulation) generation. As previously discussed with respect to noise, the LNA130 and the mixer 120 operate at an improved current. This, in turn, allows the example downconverter 100 to operate at lower currents.

Certain terms have been used throughout the description and claims to refer to particular system components. As one skilled in the art will appreciate, different parties may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the present disclosure and claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "including, but not limited to. Furthermore, the term "coupled" means either an indirect or direct wired or wireless connection. Thus, if a first device couples to a second device, that connection may be through a direct connection or through an indirect connection via other devices and connections.

The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.