Filter chip packaging structure and method for packaging filter chip
阅读说明：本技术 滤波器芯片封装结构及用于滤波器芯片封装的方法 (Filter chip packaging structure and method for packaging filter chip ) 是由 不公告发明人 于 2021-09-23 设计创作，主要内容包括：本申请涉及体声波谐振器技术领域,公开一种滤波器芯片封装结构,包括：滤波器晶圆和滤波器盖体；通过在滤波器盖体上设置有第一通孔、第二通孔,第一金属层位于第一通孔内的部分被限定成第一凹槽,第二金属层位于第二通孔内的部分被限定成第二凹槽；第一凹槽内填充有第一金属填充层,第二凹槽内填充有第二金属填充层；第一金属层穿过第一通孔连接滤波器晶圆；第二金属层穿过第二通孔连接滤波器晶圆；在第一金属填充层上设置有第一焊锡凸点；在第二金属层上设置有第二焊锡凸点。这样,由于滤波器盖体设置的通孔被金属填充层填满,使得通孔的导热能力更好,从而散热效果更好。本申请还公开一种用于滤波器芯片封装的方法。(The application relates to the technical field of bulk acoustic wave resonators, and discloses a filter chip packaging structure, including: a filter wafer and a filter cover; the filter cover body is provided with a first through hole and a second through hole, the part of the first metal layer, which is positioned in the first through hole, is defined as a first groove, and the part of the second metal layer, which is positioned in the second through hole, is defined as a second groove; a first metal filling layer is filled in the first groove, and a second metal filling layer is filled in the second groove; the first metal layer penetrates through the first through hole to be connected with the filter wafer; the second metal layer penetrates through the second through hole to be connected with the filter wafer; a first soldering tin salient point is arranged on the first metal filling layer; a second solder bump is disposed on the second metal layer. Like this, because the through-hole that the filter lid set up is filled up by the metal filling layer for the heat conductivility of through-hole is better, and thus the radiating effect is better. The application also discloses a method for packaging the filter chip.)
1. A filter chip package structure, comprising:
the filter wafer is connected with the filter cover body; the filter wafer and the filter cover body form a cavity;
the filter cover body is provided with a first through hole and a second through hole at the part which does not form the cavity with the filter wafer;
the first metal layer is positioned on the first through hole and the surface of the filter cover body at the periphery of the first through hole; the part of the first metal layer, which is positioned in the first through hole, is defined as a first groove; the first metal layer penetrates through the first through hole to be connected with the filter wafer;
the second metal layer is positioned on the second through hole and the surface of the filter cover body at the periphery of the second through hole; the part of the second metal layer, which is positioned in the second through hole, is defined as a second groove; the second metal layer penetrates through the second through hole to be connected with the filter wafer;
the first metal filling layer is positioned in the first groove, and a first soldering tin bump is arranged on the first metal filling layer;
and the second metal filling layer is positioned in the second groove, and a second soldering tin bump is arranged on the second metal filling layer.
2. The filter chip package structure according to claim 1, wherein the filter cover is formed with a third groove; the filter cover body forms the cavity through the third groove and the filter wafer.
3. The filter chip package structure of claim 2, wherein the filter cover comprises:
the first substrate is connected with the filter wafer through a bonding layer; the first substrate is provided with a third through hole and a fourth through hole;
the bonding layer is defined as a hollow structure, and a hollow part of the bonding layer is defined as a third groove of the filter cover body; a fifth through hole and a sixth through hole are formed in the periphery of the third groove; the fifth through hole is communicated with the third through hole to form a first through hole; and the sixth through hole is communicated with the fourth through hole to form a second through hole.
4. The filter chip packaging structure according to any one of claims 1 to 3, wherein the filter wafer is a bulk acoustic wave resonator or a surface acoustic wave resonator.
5. The filter chip packaging structure according to claim 3, wherein the bonding layer is made of silicon oxide, silicon nitride or an organic film material.
6. The filter chip packaging structure according to claim 3, wherein the first substrate is made of one or more of silicon, silicon carbide, aluminum oxide, and silicon dioxide.
7. A method for filter chip packaging, comprising:
providing a filter wafer;
forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer; the first through hole and the second through hole are exposed out of the filter wafer; the filter cover body and the filter wafer form a cavity through the third groove;
arranging a first solder ball in the first through hole; and arranging a second solder ball in the second through hole.
8. The method for filter chip packaging of claim 7, wherein the filter wafer is a bulk acoustic wave resonator; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer, and the method comprises the following steps:
providing a first substrate;
etching to form a fourth groove and a fifth groove on the first substrate;
depositing a bonding layer having a hollow structure on the first substrate;
etching the bonding layer to expose the fourth groove and the fifth groove, and forming a filter cover body formed by the first substrate and the bonding layer; a hollow portion of the bonding layer is defined as a third groove of the filter cover;
the filter cover body is bonded to the filter wafer through the bonding layer, the fourth groove is communicated with the lower electrode layer of the bulk acoustic wave resonator, and the fifth groove is communicated with the upper electrode layer of the bulk acoustic wave resonator;
thinning the first substrate to expose the fourth groove as a first through hole of the filter cover body; and exposing the fifth groove to be a second through hole of the filter cover body.
9. The method for filter chip packaging of claim 7, wherein the filter wafer is a surface acoustic wave resonator; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer, and the method comprises the following steps:
providing a first substrate;
etching to form a fourth groove and a fifth groove on the first substrate;
depositing a bonding layer having a hollow structure on the first substrate;
etching the bonding layer to expose the fourth groove and the fifth groove, and forming a filter cover body formed by the first substrate and the bonding layer; the hollow part of the bonding layer is defined as a third groove of the filter cover body;
the filter cover body is bonded to the filter wafer through the bonding layer, the fourth groove is communicated with the first electrode of the surface acoustic wave resonator, and the fifth groove is communicated with the second electrode of the surface acoustic wave resonator;
thinning the first substrate to expose the fourth groove as a first through hole of the filter cover body; and exposing the fifth groove to be a second through hole of the filter cover body.
10. The method for packaging a filter chip according to claim 8 or 9, wherein a first solder ball is provided in the first through hole; disposing a second solder ball in the second via, comprising:
depositing a metal layer to be etched on one side of the first substrate far away from the bonding layer; the part of the metal layer to be etched in the first through hole is defined into a sixth groove; the part of the metal layer to be etched in the second through hole is limited into a seventh groove;
forming a first solder ball extending into the sixth groove; forming a second solder ball extending into the seventh groove;
and removing the metal except the seventh groove and the sixth groove in the metal layer to be etched to form a first metal layer extending into the first through hole and a second metal layer extending into the second through hole.
Technical Field
The present disclosure relates to the field of bulk acoustic wave resonator technology, and for example, to a filter chip package structure and a method for packaging a filter chip.
Background
With the continuous development of communication technology, the requirements on filters are higher and higher, and common filter devices include bulk acoustic wave filters and surface acoustic wave filters. In the manufacturing process of the filter, the filter wafer needs to be packaged, but the existing filter wafer packaging structure has a poor heat dissipation effect and needs to be solved urgently.
Disclosure of Invention
The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview nor is intended to identify key/critical elements or to delineate the scope of such embodiments but rather as a prelude to the more detailed description that is presented later.
The embodiment of the invention provides a filter chip packaging structure and a method for packaging a filter chip, which can improve the heat dissipation effect of a filter wafer packaging structure.
In some embodiments, a filter chip package structure, comprises: the filter wafer is connected with the filter cover body; the filter wafer and the filter cover body form a cavity; the filter cover body is provided with a first through hole and a second through hole at the part which does not form the cavity with the filter wafer; the first metal layer is positioned on the first through hole and the surface of the filter cover body at the periphery of the first through hole; the part of the first metal layer, which is positioned in the first through hole, is defined as a first groove; the first metal layer penetrates through the first through hole to be connected with the filter wafer; the second metal layer is positioned on the second through hole and the surface of the filter cover body at the periphery of the second through hole; the part of the second metal layer, which is positioned in the second through hole, is defined as a second groove; the second metal layer penetrates through the second through hole to be connected with the filter wafer; the first metal filling layer is positioned in the first groove, and a first soldering tin bump is arranged on the first metal filling layer; and the second metal filling layer is positioned in the second groove, and a second soldering tin bump is arranged on the second metal filling layer.
In some embodiments, a method for filter chip packaging, comprises: providing a filter wafer; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer; the first through hole and the second through hole are exposed out of the filter wafer; the filter wafer forms a cavity through the third groove; arranging a first solder ball in the first through hole; and arranging a second solder ball in the second through hole.
The filter chip packaging structure and the method for packaging the filter chip provided by the embodiment of the invention can realize the following technical effects: the filter cover body is provided with a first through hole and a second through hole, the part of the first metal layer, which is positioned in the first through hole, is defined as a first groove, and the part of the second metal layer, which is positioned in the second through hole, is defined as a second groove; a first metal filling layer is filled in the first groove, and a second metal filling layer is filled in the second groove; the first metal layer penetrates through the first through hole to be connected with the filter wafer; the second metal layer penetrates through the second through hole to be connected with the filter wafer; a first soldering tin salient point is arranged on the first metal filling layer; and a second solder bump is arranged on the second metal filling layer. Like this, because the through-hole that the wave filter lid set up is filled up by the metal filling layer for the heat conductivility of through-hole is better, thereby promotes wave filter chip packaging structure's radiating effect, and then is favorable to improving the operating power of wave filter.
The foregoing general description and the following description are exemplary and explanatory only and are not restrictive of the application.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the accompanying drawings and not in limitation thereof, in which elements having the same reference numeral designations are shown as like elements and not in limitation thereof, and wherein:
fig. 1 is a schematic cross-sectional view of a filter chip package structure according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional view of another filter chip package structure according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a method for packaging a filter chip according to an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view of a first substrate according to an embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of a first substrate with a fourth recess and a fifth recess according to an embodiment of the present invention;
fig. 6 is a schematic cross-sectional view of a first substrate with a fourth groove and a fifth groove and a bonding layer according to an embodiment of the present invention;
fig. 7 is a schematic cross-sectional view of a first substrate bonded to a filter wafer via a bonding layer according to an embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view of a thinned first substrate according to an embodiment of the present invention;
FIG. 9 is a schematic cross-sectional view of a bonding layer deposited with a metal layer to be etched after thinning a first substrate according to an embodiment of the present invention;
FIG. 10 is a schematic cross-sectional view of a solder ball formed according to an embodiment of the present invention;
fig. 11 is a schematic diagram of a filter input-output power curve according to an embodiment of the present invention.
Reference numerals:
600: a first substrate; 610: a bonding layer; 620: a first metal layer; 630: a second metal layer; 640: a first metal filling layer; 650: a second metal filling layer; 660: a first solder bump; 670: a second solder bump; 680: a second substrate; 690: a lower electrode layer; 700: a piezoelectric layer; 710: an upper electrode layer; 720: a third substrate; 730: a first electrode; 740: an interdigital transducer structure; 750: a second electrode.
Detailed Description
So that the manner in which the features and aspects of the embodiments of the present invention can be understood in detail, a more particular description of the embodiments of the invention, briefly summarized above, may be had by reference to the embodiments, some of which are illustrated in the appended drawings. In the following description of the technology, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may be practiced without these details. In other instances, well-known structures and devices may be shown in simplified form in order to simplify the drawing.
The terms "first," "second," and the like in the description and in the claims, and in the drawings, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the invention described herein may be used. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.
In the embodiments of the present invention, the terms "upper", "lower", "inner", "middle", "outer", "front", "rear", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe embodiments of the invention and its embodiments, and are not intended to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation. Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. Specific meanings of these terms in the embodiments of the present invention may be understood by those skilled in the art according to specific situations.
In addition, the terms "disposed," "connected," and "secured" are to be construed broadly. For example, "connected" may be a fixed connection, a detachable connection, or a unitary construction; can be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intervening media, or may be in internal communication between two devices, elements or components. Specific meanings of the above terms in the embodiments of the present invention can be understood by those of ordinary skill in the art according to specific situations.
The term "plurality" means two or more unless otherwise specified.
In the embodiment of the present invention, the character "/" indicates that the preceding and following objects are in an or relationship. For example, A/B represents: a or B.
The term "and/or" is an associative relationship that describes objects, meaning that three relationships may exist. For example, a and/or B, represents: a or B, or A and B.
It should be noted that, in the case of no conflict, the embodiments of the present invention and features of the embodiments may be combined with each other.
Referring to fig. 1, an embodiment of the present invention provides a filter chip package structure, including: the filter wafer and the filter cover body filter wafer are connected with the filter cover body; the filter wafer and the filter cover body form a cavity; the filter cover body is provided with a first through hole and a second through hole at the part which does not form a cavity with the filter wafer; a first metal layer 620 on the first via hole and the surface of the filter cover at the periphery of the first via hole; a portion of the first metal layer 620 located within the first via is defined as a first groove; the first metal layer 620 passes through the first via to connect the filter wafer; a second metal layer 630 on the second via hole and the surface of the filter cover at the periphery of the second via hole; the portion of the second metal layer 630 located within the second via is defined as a second groove; the second metal layer 630 is connected to the filter wafer through the second via; a first metal filling layer 640 located in the first groove, wherein a first solder bump 660 is disposed on the first metal filling layer 640; and a second metal filling layer 650 positioned in the second groove, wherein a second solder bump 670 is disposed on the second metal filling layer 650.
The filter chip packaging structure provided by the embodiment of the invention can realize the following technical effects: the filter cover body is provided with a first through hole and a second through hole, the part of the first metal layer, which is positioned in the first through hole, is defined as a first groove, and the part of the second metal layer, which is positioned in the second through hole, is defined as a second groove; a first metal filling layer is filled in the first groove, and a second metal filling layer is filled in the second groove; the first metal layer penetrates through the first through hole to be connected with the filter wafer; the second metal layer penetrates through the second through hole to be connected with the filter wafer; a first soldering tin salient point is arranged on the first metal filling layer; and a second solder bump is arranged on the second metal filling layer. Like this, because the through-hole that the wave filter lid set up is filled up by the metal filling layer for the heat conductivility of through-hole is better, thereby promotes wave filter chip packaging structure's radiating effect, and then is favorable to improving the operating power of wave filter.
Optionally, the filter cover body is formed with a third groove; the filter cover body and the filter wafer form a cavity through the third groove.
Optionally, the filter cover includes: a first substrate 600 connected to the filter wafer by a bonding layer 610; the first substrate 600 is provided with a third through hole and a fourth through hole; a bonding layer 610 defined as a hollow structure, a hollow portion of the bonding layer 610 being defined as a third groove of the filter cover; a fifth through hole and a sixth through hole are formed in the periphery of the third groove; the fifth through hole is communicated with the third through hole to form a first through hole; the sixth through hole is communicated with the fourth through hole to form a second through hole.
In some embodiments, the opening sizes of the third and fourth vias are greater than the opening sizes of the fifth and sixth vias by more than 3 microns. In this way, a first through hole formed by vertically aligning the fifth through hole and the third through hole has a step structure, and a second through hole formed by vertically aligning the sixth through hole and the fourth through hole has a step structure; the etching metal layer can be deposited in the first through hole and the second through hole to be fully paved on the whole side wall of the first through hole and the whole side wall of the second through hole, and the circuit is not easy to break.
Optionally, the filter wafer is a bulk acoustic wave resonator or a surface acoustic wave resonator.
In some embodiments, as shown in fig. 1, the filter wafer is a bulk acoustic wave resonator, and the bulk acoustic wave resonator includes: a second substrate 680, and an upper electrode layer 710, a piezoelectric layer 700, and a lower electrode layer 690 formed on the second substrate 680, the piezoelectric layer 700 being between the lower electrode layer 690 and the upper electrode layer 710, a first metal layer 620 connected to the lower electrode layer 690, and a second metal layer 630 connected to the upper electrode layer 710. Alternatively, the upper electrode layer is made of one or more of metal materials having conductive properties such as molybdenum Mo, aluminum Al, copper Cu, platinum Pt, tantalum Ta, tungsten W, palladium Pd, and ruthenium Ru. The lower electrode layer is made of molybdenum Mo and aluminum with conductive performanceOne or more of metal materials such as Al, copper Cu, platinum Pt, tantalum Ta, tungsten W, palladium Pd and ruthenium Ru. The piezoelectric layer is made of AlN, ZnO and LiNbO with piezoelectric property3Lithium tantalate LiTaO3Lead zirconate titanate (PZT), Barium Strontium Titanate (BST), and the like.
In some embodiments, as shown in fig. 2, the filter wafer is a surface acoustic wave resonator, and the surface acoustic wave resonator includes a first electrode 730, an interdigital transducer structure 740, and a second electrode 750 formed on the third substrate 720, wherein the first electrode 730 is connected to one end of the interdigital transducer structure 740, and the second electrode 750 is connected to the other end of the interdigital transducer structure 740. Optionally, the third substrate is made of lithium niobate and/or lithium tantalate. For example, the first substrate of the surface acoustic wave resonator is formed by bonding lithium niobate or lithium tantalate on the fourth substrate. The fourth substrate is made of silicon, aluminum oxide, or silicon carbide. Optionally, a buried silicon oxide layer is between the lithium niobate and the substrate. Optionally, a buried silicon oxide layer is between the lithium tantalate and the substrate. Alternatively, the first electrode is made of one or more of metal materials having conductive properties such as molybdenum Mo, aluminum Al, copper Cu, platinum Pt, tantalum Ta, tungsten W, palladium Pd, and ruthenium Ru. The second electrode is made of one or more of metal materials with conductive performance such as molybdenum Mo, aluminum Al, copper Cu, platinum Pt, tantalum Ta, tungsten W, palladium Pd and ruthenium Ru.
Optionally, the bonding layer is made of silicon oxide, silicon nitride or an organic film material.
Optionally, the organic film material comprises: dry Film, Die Attach Film, and the like.
In some embodiments, the bonding layer made of silicon oxide can provide better moisture barrier capability and better package reliability than the bonding layer made of organic film.
Optionally, the first substrate is made of one or more of silicon, silicon carbide, alumina and silicon dioxide.
Optionally, the first metal filling layer and the first solder bump are made of the same material, such as tin-silver alloy.
Optionally, the second metal filling layer and the second solder bump are made of the same material, such as tin-silver alloy.
Optionally, the first metal-filled layer is made of one or more of Ti, Al, Cu, Au, Ag, Pt, Ta, Ni, Co, Sn, W, Pd, Ru, and the first solder bump is made of Sn-Ag alloy.
Optionally, the second metal-filled layer is made of one or more of Ti, Al, Cu, Au, Ag, Pt, Ta, Ni, Co, Sn, W, Pd, Ru, and the second solder bump is made of Sn-Ag alloy.
In some embodiments, the first solder bump and the second solder bump are both hemispherical in shape.
Optionally, the first metal layer and the second metal layer are made of one or more of aluminum Al, copper Cu, gold Au, titanium Ti, tungsten W, platinum Pt, and the like.
Like this, because first substrate uses rigid material and the material of the not permeable to water vapour that is difficult for deformation such as silicon, carborundum, aluminium oxide and silicon dioxide to the filter lid of constituteing by first substrate and bonding layer is difficult to take place deformation, and packaging structure has better reliability. Simultaneously, the through-hole of filter lid forms the metal level of treating of being injectd into the recess in the through-hole of filter lid, fills metal filling layer in treating the sculpture metal level, forms soldering tin bump on metal filling layer for the soldering tin ball that soldering tin bump and metal filling layer constitute has higher reliability, simultaneously, because whole through-hole is filled up by metal filling layer, makes the through-hole structure more firm, and the reliability is better. The rigid first substrate also enables the subsequent PCB (Printed Circuit Board) substrate level Package to be more flexible, and the first substrate does not need to be worried about collapse during the Package injection Molding process, so that the device failure caused by cavity deformation is avoided, and the flexibility of product design, the reliability of the product and the System In Package (SIP) integration capability of the System In Package are improved. Meanwhile, solder balls are directly formed in the through holes, and an RDL (Redistribution Layer) manufacturing process is not needed, so that the manufacturing cost is reduced.
Referring to fig. 3, an embodiment of the present invention provides a method for packaging a filter chip, including:
step S301, providing a filter wafer;
step S302, forming a filter cover body with a first through hole, a second through hole and a third groove on a filter wafer; the first through hole and the second through hole are exposed out of the filter wafer; the filter cover body and the filter wafer form a cavity through the third groove;
step S303, arranging a first solder ball in the first through hole; and arranging a second solder ball in the second through hole.
According to the method for packaging the filter chip, provided by the embodiment of the invention, the through hole is formed in the filter cover body, and the solder ball is arranged in the through hole. Therefore, the filter chip packaging structure defined by the method has the advantages that the through holes formed in the filter cover body are filled with the metal filling layers, so that the heat conducting capacity of the through holes is better, the heat radiating effect of the filter chip packaging structure is improved, and the working power of the filter is favorably improved.
As shown in fig. 4 to 8, optionally, the filter wafer is a bulk acoustic wave resonator; the bulk acoustic wave resonator includes: a second substrate 680 and an upper electrode layer 710, a piezoelectric layer 700, and a lower electrode layer 690 formed on the second substrate 680, the piezoelectric layer 700 being between the lower electrode layer 690 and the upper electrode layer 710; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer, comprising: providing a first substrate 600; etching the first substrate 600 to form a fourth groove and a fifth groove; depositing a bonding layer 610 having a hollow structure on the first substrate 600; etching the bonding layer 610 to expose the fourth groove and the fifth groove, and forming a filter cover body composed of the first substrate 600 and the bonding layer 610; the hollow portion of the bonding layer 610 is defined as a third groove of the filter cover; the filter cover body is bonded to the filter wafer through the bonding layer 610, the fourth groove is communicated with the lower electrode layer 690 of the bulk acoustic wave resonator, and the fifth groove is communicated with the upper electrode layer 710 of the bulk acoustic wave resonator; thinning the first substrate to expose the fourth groove as a first through hole of the filter cover body; and exposing the fifth groove to be a second through hole of the filter cover body. The bulk acoustic wave resonator includes: a second substrate 680, and an upper electrode layer 710, a piezoelectric layer 700, a lower electrode layer 690, and the like formed on the second substrate 680.
Optionally, etching the bonding layer to expose the fourth groove and the fifth groove includes: and etching the bonding layer to form a fifth through hole and a sixth through hole, wherein the fifth through hole is communicated with the fourth groove, and the sixth through hole is communicated with the fifth groove, so that the fourth groove and the fifth groove are exposed.
Optionally, the first substrate is thinned by one or more of a grinding process, a plasma etching process and a wet chemical etching process. Therefore, the first through hole and the second through hole are directly formed by thinning the first substrate, and compared with a process of bonding the complete first substrate and the bonding layer together and etching to form the through holes, the process is simpler.
As shown in fig. 1, 9 and 10, optionally, a first solder ball is disposed in the first through hole; disposing a second solder ball in the second via, comprising: depositing a metal layer to be etched on one side of the first substrate far away from the bonding layer; the part of the metal layer to be etched in the first through hole is defined into a sixth groove; the part of the metal layer to be etched in the second through hole is limited into a seventh groove; forming a first solder ball extending into the sixth groove; forming a second solder ball extending into the seventh groove; and removing the metal in the metal layer to be etched except the seventh groove and the sixth groove to form a first metal layer 620 extending into the first through hole and a second metal layer 630 extending into the second through hole.
Optionally, forming a first solder ball extending into the sixth recess includes: filling the sixth groove with the first metal filler to form a first metal filling layer 640; the first solder bump 660 is electroplated on the first metal filling layer 640 to form a first solder ball extending into the sixth groove.
Optionally, forming a first solder ball extending into the seventh recess includes: filling the seventh groove with a second metal filler to form a second metal filling layer 650; the second solder bump 670 is electroplated on the second metal filling 650 to form a second solder ball extending into the seventh recess.
Optionally, the first and second metal fillers are each made of one or more of titanium Ti, aluminum Al, copper Cu, gold Au, silver Ag, platinum Pt, tantalum Ta, nickel Ni, cobalt Co, tin Sn, tungsten W, palladium Pd, and ruthenium Ru.
Optionally, the first solder bump and the second solder bump are both made of a tin-silver alloy.
Optionally, the filter wafer is a bulk acoustic wave resonator; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer, comprising: providing a first substrate; etching the first substrate to form a fourth groove and a fifth groove; depositing a bonding layer with a hollow structure on the filter wafer; etching the bonding layer to expose the fourth groove and the fifth groove, and bonding the first substrate to the filter wafer through the bonding layer; forming a filter cover body formed by a first substrate and a bonding layer; the hollow part of the bonding layer is defined as a third groove of the filter cover body; the fourth groove is communicated with the lower electrode layer of the bulk acoustic wave resonator, and the fifth groove is communicated with the upper electrode layer of the bulk acoustic wave resonator; thinning the first substrate to expose the fourth groove as a first through hole of the filter cover body; and exposing the fifth groove to be a second through hole of the filter cover body.
As shown in fig. 2, optionally, the filter wafer is a surface acoustic wave resonator; the surface acoustic wave resonator comprises a first electrode 730, an interdigital transducer structure 740 and a second electrode 750 which are formed on a third substrate 720 and the third substrate 720, wherein the first electrode 730 is connected with one end of the interdigital transducer structure 740, and the second electrode 750 is connected with the other end of the interdigital transducer structure 740; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer, comprising: providing a first substrate 600; etching the first substrate 600 to form a fourth groove and a fifth groove; depositing a bonding layer 610 having a hollow structure on the first substrate 600; etching the bonding layer 610 to expose the fourth groove and the fifth groove, and forming a filter cover body composed of the first substrate 600 and the bonding layer 610; the hollow portion of the bonding layer 610 is defined as a third groove of the filter cover; the filter cover body is bonded to the filter wafer through the bonding layer 610, the fourth groove is communicated with the first electrode 730 of the surface acoustic wave resonator, and the fifth groove is communicated with the second electrode 750 of the surface acoustic wave resonator; thinning the first substrate 600 to expose the fourth groove as a first through hole of the filter cover; and exposing the fifth groove to be a second through hole of the filter cover body.
Optionally, the etching is performed by a plasma etching process and/or a wet chemical etching process.
Alternatively, the Deposition is performed by a CVD (Chemical Vapor Deposition) process and/or a PVD (physical Vapor Deposition) process.
Optionally, the filter wafer is a surface acoustic wave resonator; forming a filter cover body with a first through hole, a second through hole and a third groove on the filter wafer, comprising: providing a first substrate; etching the first substrate to form a fourth groove and a fifth groove; depositing a bonding layer with a hollow structure on the filter wafer; etching the bonding layer to expose the fourth groove and the fifth groove, and bonding the first substrate to the filter wafer through the bonding layer; forming a filter cover body formed by a first substrate and a bonding layer; the hollow part of the bonding layer is defined as a third groove of the filter cover body; the fourth groove is communicated with the first electrode of the surface acoustic wave resonator, and the fifth groove is communicated with the second electrode of the surface acoustic wave resonator; thinning the first substrate to expose the fourth groove as a first through hole of the filter cover body; and exposing the fifth groove to be a second through hole of the filter cover body.
Referring to fig. 11, fig. 11 is a schematic diagram of an input/output power curve of a filter, where a curve a is a filter input/output power curve corresponding to a conventional RDL WLP (Wafer Level Packaging), and a curve B is a filter input/output power curve corresponding to a WLP package in which metal is filled in Through Silicon Vias (TSVs). When the output power is reduced, the filter is "burned out", curve B from fig. 11 is burned out at a higher power than curve a, and thus, the WLP package with TSV (Through Silicon Via) filled with metal has better power capability than the conventional RDL WLP package.
The above description and drawings sufficiently illustrate embodiments of the invention to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. The examples merely typify possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in or substituted for those of others. Furthermore, the words used in the specification are words of description only and are not intended to limit the claims. As used in the description of the embodiments and the claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this application is meant to encompass any and all possible combinations of one or more of the associated listed. Furthermore, the terms "comprises" and/or "comprising," when used in this application, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Without further limitation, an element defined by the phrase "comprising an …" does not exclude the presence of other like elements in a process, method or apparatus that comprises the element. In this document, each embodiment may be described with emphasis on differences from other embodiments, and the same and similar parts between the respective embodiments may be referred to each other. For methods, products, etc. of the embodiment disclosures, reference may be made to the description of the method section for relevance if it corresponds to the method section of the embodiment disclosure.