阅读说明：本技术 一种vdmos器件 (A kind of VDMOS device ) 是由 任敏 胡玉芳 马怡宁 李泽宏 张波 于 2019-09-04 设计创作，主要内容包括：本发明提供一种VDMOS器件,属于半导体器件技术领域。在桥式电路等需要二极管续流的应用场景,本发明提供的VDMOS器件,可利用沟道区作为续流通道,不需要再为VDMOS增加外部的反并联二极管,因此可以减小系统体积。同时利用VDMOS的沟道进行续流,对漂移区没有过剩载流子注入,不存在常规VDMOS的体二极管续流的反向恢复问题,不会带来器件漏电增加和高温特性变差等问题,也不会额外增加器件面积且工艺简单。(The present invention provides a kind of VDMOS device, belongs to technical field of semiconductor device.The application scenarios of diode continuousing flow are needed in bridge circuit etc., VDMOS device provided by the invention does not need again to be the anti-paralleled diode outside VDMOS increase, therefore can reduce system bulk using channel region as afterflow channel.Afterflow is carried out using the channel of VDMOS simultaneously, there is no excess carriers injection to drift region, there is no the reverse-recovery problems of the body diode afterflow of conventional VDMOS, and element leakage will not be brought to increase the problems such as being deteriorated with hot properties, will not additionally increase device area and simple process.)

1. a kind of VDMOS device, including metallization drain electrode (1), the first conduction type half being cascading from bottom to up The highly doped substrate of conductor (2), the first conductive type semiconductor doped drift region (3), spacer medium layer (11) and metallization source electricity Pole (12)；

There is trench gate structure (8), the second conductive type semiconductor body area in first conductive type semiconductor doped drift region (3) (4), the highly doped contact zone of the second conductive type semiconductor (5) and the highly doped source region of the first conduction type (6)；

Second conductive type semiconductor body area (4) is located at the two sides of trench gate structure (8), and the second conductive type semiconductor is highly doped What contact zone (5) and the highly doped source region of the first conduction type (6) side contacted with each other is located at the second conductive type semiconductor body area (4) on, and it is located at the two sides of trench gate structure (8)；

Spacer medium layer (11) is located in the first part and trench gate structure (8) of the highly doped source region of the first conduction type (6)；Gold Categoryization source electrode (12) be located at the highly doped source region of the first conduction type (6) second part and the second conductive type semiconductor it is highly doped On miscellaneous contact zone (5), and its side and the contact of the side of spacer medium layer (11)；

It is characterized in that, having first between the second conductive type semiconductor body area (4) and trench gate structure (8) of at least side Conductive type semiconductor lightly doped district (31), the side of trench gate structure (8) and the first conductive type semiconductor doped drift region (3), the side face contact of the first conductive type semiconductor lightly doped district (31) and the highly doped source region of the first conduction type (6), the The another side of one conductive type semiconductor lightly doped district (31) and the one side in the second conductive type semiconductor body area (4) connect Touching, the bottom surface of the first conductive type semiconductor lightly doped district (31) is concordant with the bottom surface in the second conductive type semiconductor body area (4), And its depth is less than the bottom surface depth of gate electrode (10) in trench gate structure (8)；

Work function of the work function of gate electrode (10) less than the first conductive type semiconductor lightly doped district (31), and the first conductive-type The width W of type semiconductor lightly doped district (31) meets: W is less thanWherein N₁、N₂It is respectively The doping concentration of first conductive type semiconductor lightly doped district (31) and the second conductive type semiconductor body area (4),WithPoint It is not the work function of the first conductive type semiconductor lightly doped district (31) and gate electrode (10), ε_sIt is semiconductor permittivity, n_iIt is Semiconductor intrinsic carrier concentration, q are electronic charges, and k is Boltzmann constant, and T is temperature.

2. a kind of VDMOS device according to claim 1, which is characterized in that the trench gate structure (8) includes that grid is situated between Matter layer (9) and the gate electrode (10) being arranged in grid oxic horizon (9).

3. a kind of VDMOS device according to claim 2, which is characterized in that the gate dielectric layer (9) is gate oxidation Layer.

4. a kind of VDMOS device according to claim 1, which is characterized in that first conduction type is N-type, described Second conduction type is p-type.

5. a kind of VDMOS device according to claim 1, which is characterized in that first conduction type is p-type, described Second conduction type is N-type.

Technical field

The invention belongs to power semiconductor device technology fields, and in particular to a kind of VDMOS device.

Background technique

Power device is essential electronic component in power control circuit and power switch circuit, power MOSFET Leading position is occupied in power semiconductor market always by its excellent performance.Power MOSFET is needed in many applications Afterflow is carried out with diode.For example, power MOSFET device is usually used in the half-bridge of electric energy conversion application as switching device In circuit.Due to the presence of switch time delay, when one of power MOSFET grid signal becomes low, it can't be at once Shutdown, if another power tube is connected at this moment, can be both turned on because of two pipes and generate very big electric current and make to device At damage.Therefore it must stay another power MOSFET after having enough time so that a power MOSFET safe shutdown just can be with It opens, this time is known as dead time.In dead time, the electric current on inductive load needs to make it with diode come afterflow Electric current can change more gentlely, and device is avoided to damage.

In the prior art, usually using the anti-paralleled diode outside power MOSFET or using the body of power MOSFET Diode solves the problems, such as this.For the anti-parallel diodes outside power MOSFET, device count can be made to increase, increase system System volume.Using the body diode of power MOSFET come afterflow, can be introduced during body diode forward conduction excessive Nonequilibrium carrier increases the reverse recovery time of body diode, influences the switching speed of device, while making Reverse recovery mistake Loss in journey increases.Optimize the body diode of power MOSFET, scheme usually has lifetime control techniques and integrated schottky two Pole pipe.It although can reduce the storage charge of diode by lifetime control techniques, but element leakage would generally be brought to increase The problems such as being deteriorated with hot properties.The method of integrated schottky diode will lead to device area increase and complex process.

Summary of the invention

The technical problem to be solved by the present invention is in view of the problems of the existing technology, provide a kind of VDMOS device.

In order to solve the above technical problems, the embodiment of the present invention provides a kind of VDMOS device, including stack gradually from bottom to up The metallization drain electrode of setting, the highly doped substrate of the first conductive type semiconductor, the first conductive type semiconductor doped drift region, Spacer medium layer and metallization source electrode；

In first conductive type semiconductor doped drift region have trench gate structure, the second conductive type semiconductor body area, The highly doped contact zone of second conductive type semiconductor and the highly doped source region of the first conduction type；

Second conductive type semiconductor body area is located at the two sides of trench gate structure, and the second conductive type semiconductor is highly doped to be connect What touching area and the highly doped source region side of the first conduction type contacted with each other is located in the second conductive type semiconductor body area, and is located at The two sides of trench gate structure；

Spacer medium layer is located in the first part and trench gate structure of the highly doped source region of the first conduction type；Metallization source Electrode is located on the second part and the highly doped contact zone of the second conductive type semiconductor of the highly doped source region of the first conduction type, and Its side and the contact of the side of spacer medium layer；

At least between the second conductive type semiconductor body area and trench gate structure of side there is the first conduction type partly to lead Body lightly doped district, the side of trench gate structure and the first conductive type semiconductor doped drift region, the first conductive type semiconductor The side face contact of lightly doped district and the highly doped source region of the first conduction type, the first conductive type semiconductor lightly doped district it is another The side face contact of side and the second conductive type semiconductor body area, the bottom surface of the first conductive type semiconductor lightly doped district and the The bottom surface in two conductive type semiconductor body areas is concordant, and its depth is less than the bottom surface depth of gate electrode in trench gate structure；

Work function of the work function of gate electrode less than the first conductive type semiconductor lightly doped district, and the first conduction type half The width W of conductor lightly doped district meets: W is less thanWherein N₁、N₂It is the first conduction respectively The doping concentration of type semiconductor lightly doped district and the second conductive type semiconductor body area,WithIt is the first conductive-type respectively The work function of type semiconductor lightly doped district and gate electrode, ε_sIt is semiconductor permittivity, n_iIt is semiconductor intrinsic carrier concentration, q It is electronic charge, k is Boltzmann constant, and T is temperature.

Based on the above technical solution, the present invention can also be improved as follows.

Further, the trench gate structure includes gate dielectric layer and the gate electrode that is arranged in grid oxic horizon.

Further, the gate dielectric layer is grid oxic horizon.

Further, first conduction type is N-type, and second conduction type is p-type.

Further, first conduction type is p-type, and second conduction type is N-type.

The beneficial effects of the present invention are: the application scenarios of diode continuousing flow are needed in bridge circuit etc., it is provided by the invention VDMOS device does not need again to be the anti-paralleled diode outside VDMOS increase, therefore using channel region as afterflow channel It can reduce system bulk.Afterflow is carried out using the channel of VDMOS simultaneously, does not have excess carriers injection to drift region, does not deposit In the reverse-recovery problems of the body diode afterflow of conventional VDMOS, element leakage increases and hot properties is deteriorated etc. will not be brought Problem will not additionally increase device area and simple process.

Detailed description of the invention

Fig. 1 is a kind of structural schematic diagram of VDMOS device of first embodiment of the invention；

Fig. 2 is the initial energy band diagram of the embodiment of the present invention；

Fig. 3 is a kind of structural schematic diagram of VDMOS device of second embodiment of the invention.

In attached drawing, parts list represented by the reference numerals are as follows:

1, metallize drain electrode, the 2, first highly doped substrate of conductive type semiconductor, and the 3, first conductive type semiconductor is mixed Miscellaneous drift region, the 4, second conductive type semiconductor body area, the 5, second highly doped contact zone of conductive type semiconductor, 6, first is conductive The highly doped source region of type, 8, trench gate structure, 9, gate dielectric layer, 10, gate electrode, 11, spacer medium layer, 12, metallization source Electrode, the 31, first conductive type semiconductor lightly doped district.

Specific embodiment

The principle and features of the present invention will be described below with reference to the accompanying drawings, and the given examples are served only to explain the present invention, and It is non-to be used to limit the scope of the invention.

As shown in Figure 1, a kind of VDMOS device that first embodiment of the invention provides, including stack gradually set from bottom to up The highly doped substrate 2 of metallization drain electrode 1, the first conductive type semiconductor set, the first conductive type semiconductor doped drift region 3, spacer medium layer 11 and metallization source electrode 12；

There is trench gate structure 8, the second conductive type semiconductor body area in first conductive type semiconductor doped drift region 3 4, the highly doped contact zone 5 of the second conductive type semiconductor and the highly doped source region 6 of the first conduction type；

Second conductive type semiconductor body area 4 is located at the two sides of trench gate structure 8, and the second conductive type semiconductor is highly doped What contact zone 5 and highly doped 6 side of source region of the first conduction type contacted with each other is located in the second conductive type semiconductor body area 4, And it is located at the two sides of trench gate structure 8；

Spacer medium layer 11 is located in the first part and trench gate structure 8 of the highly doped source region 6 of the first conduction type；Metal Change second part and the highly doped contact of the second conductive type semiconductor that source electrode 12 is located at the highly doped source region 6 of the first conduction type In area 5, and its side and the contact of the side of spacer medium layer 11；

There is the first conductive type semiconductor between second conductive type semiconductor body area 4 of two sides and trench gate structure 8 Lightly doped district 31, the side of trench gate structure 8 are partly led with the first conductive type semiconductor doped drift region 3, the first conduction type The side face contact of body lightly doped district 31 and the highly doped source region 6 of the first conduction type, the first conductive type semiconductor lightly doped district The side face contact of 31 another side and the second conductive type semiconductor body area 4, the first conductive type semiconductor lightly doped district 31 bottom surface is concordant with the bottom surface in the second conductive type semiconductor body area 4, and its depth is less than gate electrode 10 in trench gate structure 8 Bottom surface depth；

Work function of the work function of gate electrode 10 less than the first conductive type semiconductor lightly doped district 31, and the first conductive-type The width W of type semiconductor lightly doped district 31 meets: W is less thanWherein N₁、N₂It is respectively The doping concentration of one conductive type semiconductor lightly doped district 31 and the second conductive type semiconductor body area 4,WithIt is respectively The work function of first conductive type semiconductor lightly doped district 31 and gate electrode 10, ε_sIt is semiconductor permittivity, n_iIt is semiconductor sheet Carrier concentration is levied, q is electronic charge, and k is Boltzmann constant, and T is temperature.

In above-described embodiment, VDMOS device provided by the invention does not need again using channel region as afterflow channel For VDMOS increase outside anti-paralleled diode, therefore can reduce system bulk.Continued simultaneously using the channel of VDMOS Stream, does not have excess carriers injection to drift region, there is no the reverse-recovery problems of the body diode afterflow of conventional VDMOS, no Element leakage can be brought to increase the problems such as being deteriorated with hot properties, will not additionally increase device area and simple process.

The working principle that the present invention will be described in detail by taking N-channel VDMOS as an example below, at this point, the first conductive type semiconductor Lightly doped district 31 is N-type semiconductor lightly doped district, and the second conductive type semiconductor body area 4 is P-type semiconductor area, the first conductive-type Type semiconductor doping drift region 3 is N-type drift region.Concrete principle is as follows:

Shown in initial energy band diagram such as Fig. 2 (a) of first conductive type semiconductor lightly doped district 31.When device is without applying bias When, due to the work function of gate electrode 10Less than the work function of N-type semiconductor lightly doped districtThe work function official post first is led The energy band that electric type semiconductor lightly doped district 31 is located near 9 interface of gate dielectric layer is up bent, and forms depletion region, should Width of depletion region isFirst conductive type semiconductor lightly doped district 31 and the second conductive type semiconductor body area 4 There is also PN junction depletion region, the width of depletion region for contact position isSince the first conductive type semiconductor is light The width W of doped region 31 is less thanFirst conductive type semiconductor lightly doped district 31 is complete Portion is depletion region, as shown in Fig. 2 (b).

When N-channel VDMOS is in MOS operating mode, working principle is identical with conventional MOS device.When grid electricity When 10 zero bias of pole, since the first conductive type semiconductor lightly doped district 31 is completely depleted, device does not have electric current at this time, works as gate electrode 10 add forward bias, and metallize 1 positively biased of drain electrode, and when metallization source electrode 12 is grounded, the first conductive type semiconductor is lightly doped 31 surface energy band of area is bent downwardly, and forms electron accumulation layer, break-over of device.

When N-channel VDMOS is in freewheeling state, metallize 12 positively biased of source electrode, and metallization drain electrode 1 is grounded, grid electricity 10 zero bias of pole.At this point, raised with the current potential in the metallization equipotential second conductive type semiconductor body area 4 of source electrode 12, so that Depletion region in first conductive type semiconductor lightly doped district 31 reduces, and electron channel occurs, and electronics can leak electricity from metallization Pole 1 enters the metallization source electrode 12 of high potential through the first conductive type semiconductor lightly doped district 31, forms forward current.Due to The electric current is more electron currents, it is tired that few subproduct will not be formed in the first conductive type semiconductor doped drift region 3, therefore will not produce Raw few sub- storage effect.Since the channel region afterflow of VDMOS is utilized, do not increase the area of device, technique and routine VDMOS is also completely compatible, not will increase technology difficulty.

As shown in figure 3, second embodiment of the invention provides a kind of VDMOS device, the present embodiment is in first embodiment On the basis of, make that there is the first conductive type semiconductor between the second conductive type semiconductor body area 4 of side and trench gate structure 8 Lightly doped district 31.

In above-described embodiment, by adjusting the quantity of the first conductive type semiconductor lightly doped district 31, so as to adjust afterflow Aisle resistance, to achieve the purpose that adjust freewheel current.

Optionally, the trench gate structure 8 includes gate dielectric layer 9 and the gate electrode 10 being arranged in grid oxic horizon 9. Optionally, the gate dielectric layer 9 is grid oxic horizon.

Optionally, first conduction type is N-type, and second conduction type is p-type.

Optionally, first conduction type is p-type, and second conduction type is N-type.

VDMOS device of the invention does not need again to be outside VDMOS increase using channel region as afterflow channel Anti-paralleled diode, therefore can reduce system bulk.Afterflow is carried out using the channel of VDMOS simultaneously, was not had to drift region Surplus carrier injection, there is no the reverse-recovery problems of the body diode afterflow of conventional VDMOS, element leakage will not be brought to increase The problems such as being deteriorated with hot properties, will not additionally increase device area and simple process.

In the description of the present invention, it is to be understood that, term " center ", " longitudinal direction ", " transverse direction ", " length ", " width ", " thickness ", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom" "inner", "outside", " up time The orientation or positional relationship of the instructions such as needle ", " counterclockwise ", " axial direction ", " radial direction ", " circumferential direction " be orientation based on the figure or Positional relationship is merely for convenience of description of the present invention and simplification of the description, rather than the device or element of indication or suggestion meaning must There must be specific orientation, be constructed and operated in a specific orientation, therefore be not considered as limiting the invention.

In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or Implicitly include at least one this feature.In the description of the present invention, the meaning of " plurality " is at least two, such as two, three It is a etc., unless otherwise specifically defined.

In the present invention unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " fixation " etc. Term shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral；It can be mechanical connect It connects, is also possible to be electrically connected；It can be directly connected, can also can be in two elements indirectly connected through an intermediary The interaction relationship of the connection in portion or two elements, unless otherwise restricted clearly.For those of ordinary skill in the art For, the specific meanings of the above terms in the present invention can be understood according to specific conditions.

In the present invention unless specifically defined or limited otherwise, fisrt feature in the second feature " on " or " down " can be with It is that the first and second features directly contact or the first and second features pass through intermediary mediate contact.Moreover, fisrt feature exists Second feature " on ", " top " and " above " but fisrt feature be directly above or diagonally above the second feature, or be merely representative of First feature horizontal height is higher than second feature.Fisrt feature can be under the second feature " below ", " below " and " below " One feature is directly under or diagonally below the second feature, or is merely representative of first feature horizontal height less than second feature.

In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office It can be combined in any suitable manner in one or more embodiment or examples.In addition, without conflicting with each other, the skill of this field Art personnel can tie the feature of different embodiments or examples described in this specification and different embodiments or examples It closes and combines.

The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.