阅读说明：本技术 宽范围提高电参数修调精度电路 (Circuit for improving electric parameter trimming precision in wide range ) 是由 郑辰光 于翔 于 2020-05-07 设计创作，主要内容包括：一种宽范围提高电参数修调精度电路,通过在双电流镜电流比例系数调整实现单一点位修调的基础上,从检测电路采集感应电流进入第二电流判断模块,第二电流判断模块输出调整电流给修调开关阵列,修调开关阵列产生灌入第一电流镜的镜像MOS管的修调电流或从第二电流镜的被镜像MOS管拉入的修调电流,以形成对新增修调点的正负修调,由此在双修调点形成的宽范围上提高电参数修调精度。(On the basis of realizing single point location trimming by adjusting the current proportionality coefficient of double current mirrors, induced current is collected from a detection circuit and enters a second current judgment module, the second current judgment module outputs adjustment current to a trimming switch array, and the trimming switch array generates trimming current which is filled into a mirror image MOS (metal oxide semiconductor) tube of a first current mirror or trimming current which is pulled in by the mirror image MOS tube of a second current mirror so as to form positive and negative trimming of a newly added trimming point, so that the electrical parameter trimming precision is improved on the wide range formed by the double trimming points.)

1. The circuit for improving the electrical parameter trimming precision in a wide range is characterized by comprising a main circuit used for trimming a second trimming point and an additional circuit connected with the main circuit and used for trimming a first trimming point, wherein the main circuit comprises a detection circuit, a first current mirror, a second current mirror and a first current judgment module which are sequentially connected in series, the additional circuit comprises a trimming switch array and a second current judgment module, the series connection node of the first current mirror and the second current mirror is connected with the trimming switch array, the trimming switch array is connected with the second current judgment module, the second current judgment module determines whether to output an adjusting current according to an induced current collected from the detection circuit, the trimming switch array determines whether to generate a trimming current according to the adjusting current, and if the trimming current is generated, the trimming current is proportional to the adjusting current, the trimming current is pumped into the mirror image tube of the first current mirror or pulled in from the mirrored tube of the second current mirror to form positive and negative trimming of the first trimming point.

2. The circuit of claim 1, wherein the mirrored transistor of the first current mirror is a first NMOS transistor, the mirrored transistor of the first current mirror is a second NMOS transistor, the gate terminals of the first and second NMOS transistors are interconnected and then connected to the drain terminal of the first NMOS transistor, the drain terminal of the first NMOS transistor is connected to the detection circuit, and the source terminals of the first and second NMOS transistors are interconnected and then connected to the ground terminal.

3. The circuit for improving trimming accuracy of electrical parameters in a wide range according to claim 2, wherein the mirrored transistor of the second current mirror is a third PMOS transistor, the mirrored transistor of the second current mirror is a fourth PMOS transistor, the drain terminal of the second NMOS transistor is connected to the drain terminal of the third PMOS transistor, the gate terminal of the third PMOS transistor, and the gate terminal of the fourth PMOS transistor, respectively, the source terminal of the fourth PMOS transistor and the source terminal of the third PMOS transistor are both connected to the input voltage terminal, the drain terminal of the fourth PMOS transistor is connected to the first current determining module, and the first current determining module outputs the determining signal.

4. The circuit of claim 2, wherein the ratio of the drain-source current of the second NMOS transistor to the drain-source current of the first NMOS transistor is 1: K1, and K1 is greater than 1.

5. The circuit of claim 3, wherein a ratio of a source-drain current of the fourth PMOS transistor to a source-drain current of the third PMOS transistor is 1: K2, and K2 is greater than 1.

6. The circuit of claim 1, wherein the electrical parameter is a current parameter or a voltage parameter.

Technical Field

The invention relates to an electric parameter trimming technology of a chip circuit, in particular to a circuit for improving electric parameter trimming precision in a wide range.

Background

In some applications it is desirable that certain voltage or current parameters vary with the number of external components, such as the resistance of an external resistor. While hopefully the accuracy of the parameters in this range of variation is high. Therefore, a trimming (trim) scheme is required, i.e. a parameter (the target may be a voltage parameter or a current parameter) is trimmed under a certain bias condition, so that the trimming scheme meets the application requirement of high precision. Fig. 1 is a schematic diagram of a circuit structure for adjusting the precision of an electrical parameter. In fig. 1, for a fixed target voltage/current parameter from the detection circuit, the current determination module outputs a signal Y by adjusting K1 (a first current mirror scaling factor, where the ratio of the drain-source current of M2 to the drain-source current of M1 is 1: K1) or by adjusting K2 (a second current mirror scaling factor, where the ratio of the source-drain current of M4 to the source-drain current of M3 is 1: K2), so that single-point accurate adjustment is realized, but the adjustment accuracy of the target voltage/current parameter with wide variation is low. The current source circuit comprises a first current mirror and a second current mirror connected IN series with the first current mirror, wherein the first current mirror comprises a first NMOS (N-channel metal oxide semiconductor) tube M1 (mirrored tube) and a second NMOS tube M2 (mirrored tube), the second current mirror comprises a third PMOS tube M3 (mirrored tube) and a fourth PMOS tube M4 (mirrored tube), the gate ends of M1 and M2 are connected with each other and then connected with the drain end of M1, the drain end of M1 is connected with a detection circuit, the source ends of M1 and M2 are connected with each other and then connected with a ground end GND, the drain end of M2 is connected with the drain end of M3, the gate end of M3 and the gate end of M4, the source ends of M4 and M3 are both connected with an input voltage end IN, the drain end of M4 is connected with a current judgment module, and the current judgment module outputs a judgment signal Y. Fig. 2 is a schematic diagram showing a comparison between the distribution range difference between the ideal trimming value and the actual value of the electrical parameter obtained by using a single trimming point in fig. 1. In fig. 2, the accuracy is worse as the target voltage/current parameter is far from the trimming point once the target voltage/current parameter is widely changed, that is, the accuracy is the worst at the minimum value or the maximum value of the target parameter. In fig. 2, the y-axis represents a target voltage or current parameter and the x-axis represents a range of variation of some external component value (e.g., resistance value). The trimming point (denoted by T) in fig. 2 is an intersection of the lines, and both the broken lines to the left and right are in a divergent state deviating from the solid line. The inventor thinks that if the trimming points are newly added on the basis of realizing single point position trimming by adjusting the current proportionality coefficient of the double current mirrors, the electric parameter trimming precision can be improved in a wide range formed by the double trimming points. In view of the above, the present inventors have completed the present invention.

Disclosure of Invention

The invention provides a circuit for improving the electrical parameter trimming precision in a wide range aiming at the defects or shortcomings in the prior art, wherein on the basis of realizing single point location trimming by adjusting the current proportionality coefficient of double current mirrors, induced current is collected from a detection circuit and enters a second current judgment module, the second current judgment module outputs the trimming current to a trimming switch array, and the trimming switch array generates the trimming current which is filled into a mirror image MOS (metal oxide semiconductor) tube of a first current mirror or the trimming current which is pulled in from the mirror image MOS tube of the second current mirror so as to form positive and negative trimming of a newly added trimming point, so that the electrical parameter trimming precision is improved in the wide range formed by the double trimming points.

The technical scheme of the invention is as follows:

the circuit for improving the electrical parameter trimming precision in a wide range is characterized by comprising a main circuit used for trimming a second trimming point and an additional circuit connected with the main circuit and used for trimming a first trimming point, wherein the main circuit comprises a detection circuit, a first current mirror, a second current mirror and a first current judgment module which are sequentially connected in series, the additional circuit comprises a trimming switch array and a second current judgment module, the series connection node of the first current mirror and the second current mirror is connected with the trimming switch array, the trimming switch array is connected with the second current judgment module, the second current judgment module determines whether to output an adjusting current according to an induced current collected from the detection circuit, the trimming switch array determines whether to generate a trimming current according to the adjusting current, and if the trimming current is generated, the trimming current is proportional to the adjusting current, the trimming current is pumped into the mirror image tube of the first current mirror or pulled in from the mirrored tube of the second current mirror to form positive and negative trimming of the first trimming point.

The mirror image tube of the first current mirror is a first NMOS tube, the mirror image tube of the first current mirror is a second NMOS tube, the grid ends of the first NMOS tube and the second NMOS tube are connected with each other and then connected with the drain end of the first NMOS tube, the drain end of the first NMOS tube is connected with the detection circuit, and the source ends of the first NMOS tube and the second NMOS tube are connected with each other and then connected with the grounding end.

The current mirror comprises a first current mirror, a second current mirror, a third PMOS tube, a fourth PMOS tube, a drain end of a second NMOS tube, a gate end of the third PMOS tube and a gate end of the fourth PMOS tube, wherein a mirrored tube of the second current mirror is the third PMOS tube, a drain end of the second NMOS tube is respectively connected with the drain end of the third PMOS tube, the gate end of the third PMOS tube and the gate end of the fourth PMOS tube, a source end of the fourth PMOS tube and a source end of the third PMOS tube are both connected with an input voltage end, a drain end of the fourth PMOS tube is connected with a first current judgment module, and the first current judgment module outputs a judgment signal.

The ratio of the drain-source current of the second NMOS tube to the drain-source current of the first NMOS tube is 1: K1, and K1 is larger than 1.

The ratio of the source-drain current of the fourth PMOS tube to the source-drain current of the third PMOS tube is 1: K2, and K2 is greater than 1.

The electrical parameter is a current parameter or a voltage parameter.

The invention has the following technical effects: the circuit for improving the electrical parameter trimming precision in a wide range increases a new trimming point on the basis of the trimming point of the old scheme, namely, the chip is trimmed at two positions of T1 and T2 respectively. The new solution thus created will improve the overall accuracy in case of large variations in the value of the external element, which we can clearly see by the schematic curve in fig. 4. Of course, as the method is adopted, a plurality of trimming points can be added to further improve the precision of the trimmed target voltage or current parameters.

The invention has the following characteristics: 1. the detection current Isen can be judged to work in a proper range so as to prevent the two trimming points T1 and T2 from being too close. 2. The adjustment current Ib generated by the second current determination module is analog, i.e. it is inversely proportional to the difference between Isen and the first adjustment point T1. 3. The adjustment current Ib is the current source of the trimming current Itrim. And 4, realizing positive and negative trimming of the target current value at the first trimming point by the aid of the Itrim current drawing and filling characteristic. 5. When the target is a voltage parameter, a module for converting voltage into current can be added in the detection circuit, so that the scheme proposed by the invention is still effective.

Drawings

Fig. 1 is a schematic diagram of a circuit structure for adjusting the precision of an electrical parameter. In fig. 1, for a fixed target voltage/current parameter from the detection circuit, the current determination module outputs a signal Y by adjusting K1 (a first current mirror scaling factor, where the ratio of the drain-source current of M2 to the drain-source current of M1 is 1: K1) or by adjusting K2 (a second current mirror scaling factor, where the ratio of the source-drain current of M4 to the source-drain current of M3 is 1: K2), so that single-point accurate adjustment is realized, but the adjustment accuracy of the target voltage/current parameter with wide variation is low.

Fig. 2 is a schematic diagram showing a comparison between the distribution range difference between the ideal trimming value and the actual value of the electrical parameter obtained by using a single trimming point in fig. 1. In fig. 2, the accuracy is worse as the target voltage/current parameter is far from the trimming point once the target voltage/current parameter is widely changed, that is, the accuracy is the worst at the minimum value or the maximum value of the target parameter. The y-axis of fig. 2 represents the target voltage or current parameter, and the x-axis represents the range of variation of some external component value (e.g., resistance value) that determines the target voltage or current value. The trimming point (which may be denoted by T) in fig. 2 is the intersection of the lines, and both the broken lines to the left and right are divergent from the solid line.

FIG. 3 is a schematic diagram of a circuit for improving the electrical parameter trimming accuracy in a wide range. FIG. 3 is a diagram showing that, on the basis of FIG. 1, the original single trimming point (T) in FIG. 1 is replaced by two trimming points (T1 and T2), the original single trimming point rises to the position of a second trimming point T2 (still achieved by trimming K1 or K2), the current determination module in FIG. 1 becomes the first current determination module in FIG. 3, the first trimming point T1 enters the second current determination module by collecting an induced current Isen from the detection circuit, the second current determination module determines Isen, when Isen falls with an external component (as shown in FIG. 4) and approaches the first trimming point T1, an adjustment current Ib is output to the trimming switch array, and Ib varies inversely with the difference between Isen and the first trimming point T1, when the value of the external component on the x axis becomes smaller and Isen is much smaller than T1, the Ib reaches the maximum value and is constant, the trimming current Itrim generated by the trimming switch array is the drain current Itrim, i.e. the drain current of the I2 (i.e. the drain current increase 3) of the trimming switch array), and current can be pulled in from M3 (namely, the source-drain current of M3 is reduced), Itrim is in proportional relation with Ib, and the specific current value of the current to be pulled in or out is specified by an additional system control signal, so that the positive and negative trimming of the first trimming point T1 is realized. The electrical parameter is a current parameter or a voltage parameter, and the target voltage parameter is converted into a target current parameter in the detection circuit.

Fig. 4 is a schematic diagram showing a comparison between the distribution range difference of the ideal trimming value and the actual value of the electrical parameter obtained by using the dual trimming points (T1 and T2) in fig. 3. In fig. 4, the y-axis represents the target voltage or current parameter, and the x-axis represents the variation range of some external component value (e.g., resistance value), which determines the target voltage or current value. In contrast, T1 is arranged at the lower left of T, T2 is arranged at the upper right of T, and between T1 and T2, the target voltage or current parameter (y axis) is close to T1 from left or close to T2 from right, so that the invention enables the target voltage or current parameter (y axis) to be in a convergent state in a wide range along with the change of an external element value outside a chip, thereby realizing the wide range and improving the electric parameter trimming precision.

The reference numbers are listed below: IN-input voltage terminal; GND-ground; m1-first NMOS transistor; m2-second NMOS tube; m3-third PMOS tube; m4-fourth PMOS tube; the ratio of drain-to-source current of K1-M2 to that of M1 (where K1 is greater than 1); the ratio of the source-drain current of K2-M4 to the source-drain current of M3 (wherein K2 is greater than 1); y-current judging output signals or judging signals; isen-induced current; ib-adjusting the current; itrim-trimming current; t1 — first trim point; t2-second trimming point.

Detailed Description

The invention is described below with reference to the accompanying drawings (fig. 3-4).

FIG. 3 is a schematic diagram of a circuit for improving the electrical parameter trimming accuracy in a wide range. Fig. 4 is a schematic diagram showing a comparison between the distribution range difference of the ideal trimming value and the actual value of the electrical parameter obtained by using the dual trimming points (T1 and T2) in fig. 3. As shown in fig. 3 to 4, a circuit for improving trimming accuracy of an electrical parameter in a wide range includes a main circuit for a second trimming point trimming T2 and an additional circuit for a first trimming point trimming T1 connected to the main circuit, the main circuit including a detection circuit, a first current mirror, a second current mirror, and a first current judgment module connected in series in this order, the additional circuit including a trimming switch array and a second current judgment module, a series node of the first current mirror and the second current mirror being connected to the trimming switch array, the trimming switch array being connected to the second current judgment module, the second current judgment module determining whether to output a trimming current Ib according to an induced current Isen collected from the detection circuit, the trimming switch array determining whether to generate a trimming current Itrim according to the trimming current Ib (when the trimming switch array is understood only as an execution module, the trimming switch array generates and determines the magnitude of a trimming current Itrim in accordance with an additional system control signal, the trimming current Itrim being proportional to the trimming current Ib), the trimming current is proportional to the trimming current Ib if the trimming current Itrim is generated, the trimming current Itrim being pulled in through the mirrored tube sinking into the first current mirror or from the mirrored tube of the second current mirror to form a positive and negative trimming to a first trimming point T1. The mirrored transistor of the first current mirror is a first NMOS transistor M1, the mirrored transistor of the first current mirror is a second NMOS transistor M2, the gate ends of the first NMOS transistor M1 and the second NMOS transistor M2 are connected with the drain end of the first NMOS transistor M1 after being interconnected, the drain end of the first NMOS transistor M1 is connected with the detection circuit, and the source ends of the first NMOS transistor M1 and the second NMOS transistor M2 are connected with the ground end GND after being interconnected. The mirrored transistor of the second current mirror is a third PMOS transistor M3, the mirrored transistor of the second current mirror is a fourth PMOS transistor M4, the drain terminal of the second NMOS transistor M2 is connected to the drain terminal of the third PMOS transistor M3, the gate terminal of the third PMOS transistor M3 and the gate terminal of the fourth PMOS transistor M4, the source terminal of the fourth PMOS transistor M4 and the source terminal of the third PMOS transistor M4 are both connected to an input voltage terminal IN, the drain terminal of the fourth PMOS transistor M4 is connected to the first current judging module, and the first current judging module outputs a judging signal Y. The ratio of the drain-source current of the second NMOS tube M2 to the drain-source current of the first NMOS tube M1 is 1: K1, and K1 is greater than 1. The ratio of the source-drain current of the fourth PMOS tube M4 to the source-drain current of the third PMOS tube M3 is 1: K2, and K2 is greater than 1. The electrical parameter is a current parameter or a voltage parameter.

Referring to fig. 3 and 4, the following further description is made on the specific operation principle of the present invention by taking the target current as an example (and assuming that the new trimming point T1 is located in the low value range of the target current, such as the new trimming point T1 close to the origin of coordinates in fig. 4).

1. The target current detected by the detection circuit module flows into the drain terminal of M1.

M1(NMOS) and M2(NMOS) constitute a current mirror, with M1 drain-source current being proportional to M2 drain-source current.

And 3, the drain terminal of M2 and the drain terminal of M3(PMOS) are connected with the output terminal of the trimming switch array.

M3(PMOS) and M4(PMOS) constitute a current mirror, with M3 drain-source current being proportional to M4 drain-source current.

And 5, M4 drain-source current flows into a current judgment module 1, and the output signal of the current judgment module is Y.

Isen is the sense current, which is proportional to the target current, i.e. also proportional to the M1 drain-source current.

Isen inflow current decision 2 module.

8. The current judgment 2 module adjusts the output Ib according to the input Isen, when Isen is smaller than 10 times of the target current value corresponding to the new scheme trimming point T1, the Ib is larger than zero, and when Isen is smaller than 0.1 time of the target current value corresponding to the T1, the Ib reaches the maximum value.

9. The input current of the trimming switch array module is Ib, and the trimming switch array module receives an additional system control signal to change the internal trimming switch combination to generate an output current Itrim, namely the Itrim is from Ib, and the Itrim can be a drain terminal which is injected into M2 and can pull in current from the drain terminal of M3, so that the positive and negative trimming of a newly added trimming point T1 is realized.

In conclusion, when the target current falls into the range of the T1 trimming point along with the change of the external element value, the proposal of the invention starts to work, the precision of the target parameter is further improved, and simultaneously, the T1 does not influence the trimming of the T2 because the T2 is more than 10 times of the T1.

It is pointed out here that the above description is helpful for the person skilled in the art to understand the invention, but does not limit the scope of protection of the invention. Any such equivalents, modifications and/or omissions as may be made without departing from the spirit and scope of the invention may be resorted to.