阅读说明：本技术 一种Dickson开关电容电压转换器的驱动电路 (Drive circuit of Dickson switch capacitor voltage converter ) 是由 赵炜 于 2021-07-19 设计创作，主要内容包括：本发明属于电子电路技术领域,具体的说是涉及一种Dickson开关电容电压转换器的驱动电路。本发明在传统电路结构中,对电路的开关管及其驱动电路的供电方式进行改进,将驱动电路中的通路上的额外压降减小到零,从而消除这部分损耗。(The invention belongs to the technical field of electronic circuits, and particularly relates to a driving circuit of a Dickson switched capacitor voltage converter. In the traditional circuit structure, the power supply mode of the switching tube of the circuit and the driving circuit thereof is improved, and the extra voltage drop on the path in the driving circuit is reduced to zero, so that the loss of the part is eliminated.)

1. A drive circuit of a Dickson switch capacitor voltage converter comprises a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube, a first switch tube drive circuit, a second switch tube drive circuit, a third switch tube drive circuit, a fourth switch tube drive circuit, a fifth switch tube drive circuit, a sixth switch tube drive circuit, a seventh switch tube drive circuit, an eighth switch tube drive circuit, a first NMOS tube, a second NMOS tube, a third NMOS tube, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first current source, a second current source, a third current source, a first diode, a second diode, a third diode, a fourth diode, a first Zener diode, a second Zener diode, a third Zener diode and a booster charge pump, the boosting charge pump is used for generating a voltage with a value of VH (VIN + VDD) according to VIN; the drain electrode of the first switch tube is connected with an input voltage VIN, the grid electrode of the first switch tube is connected with an output signal of the first switch tube driving circuit, the power supply end of the first switch tube driving circuit is connected with a first power supply end BST1, and the BST1 is also connected with the ground end of the first switch tube driving circuit and the source electrode of the first switch tube through a first capacitor; the power supply end of the first switch tube driving circuit is also connected with a source electrode of a first NMOS tube, a drain electrode of the first NMOS tube is connected with an input voltage VIN through a first diode, a grid electrode of the first NMOS tube is connected with one end of a first current source through a second diode, the other end of the first current source is connected with a boosting charge pump, and one end of the first current source is also connected with a connection point of a first capacitor and the source electrode of the first switch tube through a first Zener diode; the drain electrode of the second switch tube is connected with the source electrode of the first switch tube, the grid electrode of the second switch tube is connected with an output signal of the second switch tube driving circuit, the power supply end of the second switch tube driving circuit is connected with the source electrode of the second NMOS tube, the drain electrode of the second NMOS tube is connected with an input voltage VIN, the grid electrode of the second NMOS tube is connected with one end of a second current source, and the other end of the second current source is connected with a boosting charge pump; one end of the second current source is connected with the ground end of the second switch tube driving circuit and the source electrode of the second switch tube through a second Zener diode; the drain electrode of the third switch tube is connected with the source electrode of the second switch tube, the grid electrode of the third switch tube is connected with an output signal of the third switch tube driving circuit, the power supply end of the third switch tube driving circuit is connected with the second power supply end BST2, the BST2 is connected with the ground end of the third switch tube driving circuit and the source electrode of the third switch tube through the second capacitor, and the BST2 is connected with the power supply ends of the BST3 and the fourth switch tube driving circuit through the third diode; the drain electrode of the fourth switch tube is connected with the source electrode of the third switch tube, the grid electrode of the fourth switch tube is connected with an output signal of the fourth switch tube driving circuit, the power supply end of the fourth switch tube driving circuit is connected with the third power supply end BST3, the ground end of the fourth switch tube driving circuit is connected with the source electrode of the fourth switch tube, and the BST3 is also connected with the drain electrode of the fourth switch tube through a fourth diode; the drain electrode of the fifth switching tube is connected with the source electrode of the fourth switching tube, the grid electrode of the fifth switching tube is connected with an output signal of the fifth switching tube driving circuit, the power supply end of the fifth switching tube driving circuit is connected with the source electrode of the third switching tube, a third capacitor is arranged between the power supply end and the ground end of the fifth switching tube driving circuit, and the ground end of the fifth switching tube driving circuit is connected with the source electrode of the fifth switching tube; one end of the third capacitor, which is connected with the ground end of the fifth switching tube driving circuit, is also connected with the first capacitor through a fourth capacitor, and the connection point of the fourth capacitor and the first capacitor is connected with the source electrode of the first switching tube; the drain electrode of the sixth switching tube is connected with the source electrode of the fifth switching tube, the grid electrode of the sixth switching tube is connected with the output end signal of the sixth switching tube driving circuit, the power supply end of the sixth switching tube driving circuit is connected with a low-voltage power supply VCC, and the ground end of the sixth switching tube driving circuit is connected with the source electrode of the sixth switching tube and grounded; the drain electrode of the seventh switch tube is connected with the source electrode of the fourth switch tube, the grid electrode of the seventh switch tube is connected with the output end signal of the seventh switch tube driving circuit, the power supply end of the seventh switch tube driving circuit is connected with the source electrode of the third NMOS tube, the grid electrode of the third NMOS tube is connected with one end of a third current source, the other end of the third current source is connected with a boosting charge pump, the third current source is also connected with the source electrode of the seventh switch tube through a third Zener diode, the drain electrode of the third NMOS tube is connected with BST3, and the ground end of the seventh switch tube driving circuit is connected with the source electrode of the seventh switch tube; a fifth capacitor is arranged between the source electrode of the seventh switch tube and the source electrode of the second switch tube; the drain electrode of the eighth switching tube is connected with the source electrode of the seventh switching tube, the grid electrode of the eighth switching tube is connected with an output signal of the eighth switching tube driving circuit, the power supply end of the eighth switching tube driving circuit is connected with a low-voltage power supply VCC, and the ground end of the eighth switching tube driving circuit is connected with the source electrode of the eighth switching tube and grounded; the connection point of the drain electrode of the fifth switching tube, the source electrode of the fourth switching tube and the drain electrode of the seventh switching tube is connected with the output end VOUT, and the output end VOUT is also connected with BST3 through a sixth capacitor; the driving signals output by the first switching tube driving circuit, the third switching tube driving circuit, the fifth switching tube driving circuit and the eighth switching tube driving circuit are in phase and opposite in phase to the driving signals output by the second switching tube driving circuit, the fourth switching tube driving circuit, the sixth switching tube driving circuit and the seventh switching tube driving circuit.

Technical Field

The invention belongs to the technical field of electronic circuits, and particularly relates to a driving circuit of a Dickson switched capacitor voltage converter.

Background

The switch capacitor voltage converter is widely applied to various power management occasions as a basic power conversion structure to realize voltage and current conversion between input and output in various proportions. A typical Dickson equation 4 is shown in fig. 1: the circuit carries charges from an input end to an output end through a capacitor CF1/CF2/CF3 and switching tubes Q1-Q8, and achieves that the output voltage VOUT is VIN/4 and the output current IOUT is 4 IIN.

The conversion efficiency is the most important index of the switch capacitor voltage converter, and determines the loading capacity and temperature rise condition of the voltage converter. The higher the conversion efficiency, the greater the load capacity of the voltage converter and the lower the temperature rise. The main losses of the switched capacitor voltage converter result from: 1) conduction losses of the switches in the circuit; 2) drive loss of each switch; 3) ESR loss of each capacitor; the key to improving the conversion efficiency is how to reduce the above losses, and 2) the losses are related to the structure of the driving circuit of each switch.

Fig. 2 shows a Dickson 4:1 switch capacitor voltage converter with a driving circuit structure, wherein a driving circuit of a Q1 transistor is powered by a BST1 terminal, a capacitor CB1 is arranged between a BST1 terminal and a C1P terminal, a voltage of a BST1 terminal is higher than a voltage of a C1P terminal by a certain voltage, a driving circuit of a Q2/Q3/Q4 transistor is powered by a VIN clamped by MN2/MN4/MN5, a driving circuit of a Q5 transistor is powered by C3P, a driving circuit of a Q6/Q8 transistor is powered by a low-voltage power supply VCC directly, and a driving circuit of a Q7 transistor is powered by a C2P clamped by MN 3. When the Q7/Q3/Q4 pipe is opened, the leakage end and the source end of the MN3/MN4/MN5 have pressure difference, and the pressure difference and the driving current can cause the loss on the MN3/MN4/MN5 pipe.

For example, when VIN is 20V and VOUT is 5V, MN3/MN4/MN5 opens the Q7/Q3/Q4 tube, and there is a pressure difference of 5V/10V between the drain and source terminals, respectively, which results in loss in the MN3/MN4/MN5 tube. Therefore, in order to reduce the loss and improve the efficiency, the pressure drop of the MN3/MN4/MN5 pipe needs to be reduced as much as possible.

Disclosure of Invention

In view of the above problems, the present invention provides a driving circuit capable of reducing voltage drops in all driving paths for turning on respective switches, thereby reducing driving loss and improving conversion efficiency.

The technical scheme of the invention is as follows:

a drive circuit of a Dickson switch capacitor voltage converter comprises a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube, a first switch tube drive circuit, a second switch tube drive circuit, a third switch tube drive circuit, a fourth switch tube drive circuit, a fifth switch tube drive circuit, a sixth switch tube drive circuit, a seventh switch tube drive circuit, an eighth switch tube drive circuit, a first NMOS tube, a second NMOS tube, a third NMOS tube, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first current source, a second current source, a third current source, a first diode, a second diode, a third diode, a fourth diode, a first Zener diode, a second Zener diode, a third Zener diode and a booster charge pump, the boosting charge pump is used for generating a voltage with a value of VH (VIN + VDD) according to VIN; the drain electrode of the first switch tube is connected with an input voltage VIN, the grid electrode of the first switch tube is connected with an output signal of the first switch tube driving circuit, the power supply end of the first switch tube driving circuit is connected with a first power supply end BST1, and the BST1 is also connected with the ground end of the first switch tube driving circuit and the source electrode of the first switch tube through a first capacitor; the power supply end of the first switch tube driving circuit is also connected with a source electrode of a first NMOS tube, a drain electrode of the first NMOS tube is connected with an input voltage VIN through a first diode, a grid electrode of the first NMOS tube is connected with one end of a first current source through a second diode, the other end of the first current source is connected with a boosting charge pump, and one end of the first current source is also connected with a connection point of a first capacitor and the source electrode of the first switch tube through a first Zener diode; the drain electrode of the second switch tube is connected with the source electrode of the first switch tube, the grid electrode of the second switch tube is connected with an output signal of the second switch tube driving circuit, the power supply end of the second switch tube driving circuit is connected with the source electrode of the second NMOS tube, the drain electrode of the second NMOS tube is connected with an input voltage VIN, the grid electrode of the second NMOS tube is connected with one end of a second current source, and the other end of the second current source is connected with a boosting charge pump; one end of the second current source is connected with the ground end of the second switch tube driving circuit and the source electrode of the second switch tube through a second Zener diode; the drain electrode of the third switch tube is connected with the source electrode of the second switch tube, the grid electrode of the third switch tube is connected with an output signal of the third switch tube driving circuit, the power supply end of the third switch tube driving circuit is connected with the second power supply end BST2, the BST2 is connected with the ground end of the third switch tube driving circuit and the source electrode of the third switch tube through the second capacitor, and the BST2 is connected with the power supply ends of the BST3 and the fourth switch tube driving circuit through the third diode; the drain electrode of the fourth switch tube is connected with the source electrode of the third switch tube, the grid electrode of the fourth switch tube is connected with an output signal of the fourth switch tube driving circuit, the power supply end of the fourth switch tube driving circuit is connected with the third power supply end BST3, the ground end of the fourth switch tube driving circuit is connected with the source electrode of the fourth switch tube, and the BST3 is also connected with the drain electrode of the fourth switch tube through a fourth diode; the drain electrode of the fifth switching tube is connected with the source electrode of the fourth switching tube, the grid electrode of the fifth switching tube is connected with an output signal of the fifth switching tube driving circuit, the power supply end of the fifth switching tube driving circuit is connected with the source electrode of the third switching tube, a third capacitor is arranged between the power supply end and the ground end of the fifth switching tube driving circuit, and the ground end of the fifth switching tube driving circuit is connected with the source electrode of the fifth switching tube; one end of the third capacitor, which is connected with the ground end of the fifth switching tube driving circuit, is also connected with the first capacitor through a fourth capacitor, and the connection point of the fourth capacitor and the first capacitor is connected with the source electrode of the first switching tube; the drain electrode of the sixth switching tube is connected with the source electrode of the fifth switching tube, the grid electrode of the sixth switching tube is connected with the output end signal of the sixth switching tube driving circuit, the power supply end of the sixth switching tube driving circuit is connected with a low-voltage power supply VCC, and the ground end of the sixth switching tube driving circuit is connected with the source electrode of the sixth switching tube and grounded; the drain electrode of the seventh switch tube is connected with the source electrode of the fourth switch tube, the grid electrode of the seventh switch tube is connected with the output end signal of the seventh switch tube driving circuit, the power supply end of the seventh switch tube driving circuit is connected with the source electrode of the third NMOS tube, the grid electrode of the third NMOS tube is connected with one end of a third current source, the other end of the third current source is connected with a boosting charge pump, the third current source is also connected with the source electrode of the seventh switch tube through a third Zener diode, the drain electrode of the third NMOS tube is connected with BST3, and the ground end of the seventh switch tube driving circuit is connected with the source electrode of the seventh switch tube; a fifth capacitor is arranged between the source electrode of the seventh switch tube and the source electrode of the second switch tube; the drain electrode of the eighth switching tube is connected with the source electrode of the seventh switching tube, the grid electrode of the eighth switching tube is connected with an output signal of the eighth switching tube driving circuit, the power supply end of the eighth switching tube driving circuit is connected with a low-voltage power supply VCC, and the ground end of the eighth switching tube driving circuit is connected with the source electrode of the eighth switching tube and grounded; the connection point of the drain electrode of the fifth switching tube, the source electrode of the fourth switching tube and the drain electrode of the seventh switching tube is connected with the output end VOUT, and the output end VOUT is also connected with BST3 through a sixth capacitor; the driving signals output by the first switching tube driving circuit, the third switching tube driving circuit, the fifth switching tube driving circuit and the eighth switching tube driving circuit are in phase and opposite in phase to the driving signals output by the second switching tube driving circuit, the fourth switching tube driving circuit, the sixth switching tube driving circuit and the seventh switching tube driving circuit.

The invention has the beneficial effects that: the extra voltage drop on the path in the driver circuit is reduced to zero, eliminating this loss.

Drawings

Figure 1 is a typical Dickson formula 4:1 a switched capacitor voltage converter;

FIG. 2 is a Dickson 4:1 switched capacitor voltage converter with an on-board driver circuit configuration;

FIG. 3 is a schematic diagram of a driving circuit according to the present invention;

FIG. 4 is a timing diagram of the circuit of FIG. 3;

Detailed Description

The present invention will be described in detail below with reference to the accompanying drawings.

Fig. 3 shows a driving circuit of a novel Dickson switch capacitor converter, and fig. 4 shows the relevant timing and node voltages. The Q1/Q2/Q5/Q6/Q8 tubes were driven as in FIG. 2. The Q1 driving circuit is directly powered by BST1, BST1 is higher than C1P by about VOUT voltage, capacitor CB1 is charged by VIN through D0 and MN1 when Q2 is turned off by Q1 and is turned on. The Q2 driving circuit is clamped by VIN through MN2 and then supplies power, the Q5 driving circuit is directly supplied by C3P, and the Q6/Q8 driving circuit is directly supplied by a low-voltage power supply VCC.

The added capacitor CB3 is connected to VOUT, the capacitor CP3 and the diode D3 charge the CB3 at the PH1, the BST3 is stabilized at 2 times of VOUT voltage, the Q4 tube driving circuit is directly powered by the BST3, and therefore no voltage drop loss exists in a driving circuit path of the Q4 tube.

The drain terminal of the MN3 tube is connected to BST3, when the Q7 tube is conducted, C2N is equal to VOUT, no voltage drop loss exists on the MN3 tube, and therefore no voltage drop loss exists on the driving circuit path of the Q7 tube.

The added capacitor CB2 is connected to the C3P, the capacitor CB3 and the diode D2 charge the CB2 at the PH2, the BST2 is stabilized at the voltage of C3P + VOUT, and the driving circuit of the Q3 tube is directly powered by the BST2, so that no voltage drop loss exists in the driving circuit path of the Q3 tube.

Thus, there is no voltage drop and no voltage drop loss in the drive circuit paths of all of the transistors Q1-Q8.