阅读说明：本技术 一种mmu和ifu读取memory中数据的实现方法及系统 (Method and system for reading data in memory by mmu and ifu ) 是由 李长林 余红斌 于 2021-07-15 设计创作，主要内容包括：本发明涉及微处理器技术领域,具体涉及一种mmu和ifu读取memory中数据的实现方法及系统,所述方法将mmu和ifu读取数据的请求直接发往L2；如果在L2中发现有dirty数据在L1-cache中,则通过L2向L1发出snoop请求,获取dirty数据,进而读取memory的最新数据。本发明mmu和ifu读取数据的请求不用占用L1的pipeline资源,且mmu和ifu不会对L1-cache的污染,不会对指令操作数的命中率有影响,具有很强的创造性。(The invention relates to the technical field of microprocessors, in particular to a method and a system for reading data in a memory by mmu and ifu, wherein the method directly sends requests of reading the data by the mmu and ifu to L2; if it is found in L2 that dirty data is in L1_ cache, a snoop request is sent to L1 through L2, dirty data is obtained, and the latest data of the memory is read. The requests of the mmu and ifu for reading data do not occupy pipeline resources of the L1, and the mmu and ifu do not pollute the L1_ cache, do not influence the hit rate of instruction operands, and have strong creativity.)

1. A realization method for reading data in a memory by mmu and ifu is characterized in that the method directly sends requests for reading data by mmu and ifu to L2; if it is found in L2 that dirty data is in L1_ cache, a snoop request is sent to L1 through L2, dirty data is obtained, and the latest data of the memory is read.

2. The method for realizing data reading in memory by mmu and ifu as recited in claim 1, wherein if hit in L2 and all L1 does not obtain E-state, the data of L2 can be directly returned to mmu/ifu.

3. The method for realizing data reading in memory by mmu and ifu as claimed in claim 1, wherein if hit in L2 and some L1 is in E state, then L2 takes the data of L1 dirty by means of snoop, and adjusts the data state of L1 to S state, then returns the data of L2 to mmu/ifu.

4. The method for implementing mmu and ifu reading of data in a memory according to claim 1, wherein if miss occurs in L2, S/E state is obtained from the next memory, and then the data is returned to the mmu/ifu.

5. The method of claim 1, wherein if hit is in L2 and all L1 have not obtained the E state, then there is no dirty data in L1; if hit is in L2, and there is L1 which is the E state and then there is dirty data in L1.

6. An implementation system for reading data in a memory by mmu and ifu, the system being used for supporting an implementation method for reading data in a memory by mmu and ifu as claimed in any one of claims 1 to 5, the implementation method comprising a mmu module, a ifu module, a first-level cache L1 and a second-level cache L2.

Technical Field

The invention relates to the technical field of microprocessors, in particular to a method and a system for reading data in a memory by mmu and ifu.

Background

In the prior art, since the PAs between the data acquired by the mmu and the ifu and the operand of the instruction are not greatly related, if the mmu and the ifu read the data and also send a request to the L1, the request of the mmu and the ifu occupies the pipeline resource of the L1 in the L1$, while the request is usually miss in the L1$, and if the request directly sends the request to the L2 instead of directly sending the request to the L1, the pipeline resource occupation of the L1 can be effectively reduced

If the mmu and ifu read data also requests the L1, such data is a D $ dirty with respect to the operands, which has a bad effect on the hit rate of the operands

If the requests of the mmu and the ifu for reading data directly send the requests to the L2, the pipeline resource of the L1 can be reduced, the pollution of the mmu and the ifu to the L1_ cache can be reduced, and the hit rate of the instruction operand is improved.

Disclosure of Invention

Aiming at the defects of the prior art, the invention discloses a method and a system for realizing data reading in memory by mmu and ifu, which are used for solving the problems that requests for reading data by mmu and ifu occupy pipeline resources of L1, pollution of mmu and ifu to L1_ cache is caused, and the hit rate of instruction operands is influenced.

The invention is realized by the following technical scheme:

in a first aspect, the invention discloses a method for reading data in a memory by mmu and ifu, which is characterized in that the method directly sends requests of mmu and ifu for reading data to L2; if it is found in L2 that dirty data is in L1_ cache, a snoop request is sent to L1 through L2, dirty data is obtained, and the latest data of the memory is read.

Further, in the method, if hit occurs in L2 and all L1 do not obtain the E state, the data of L2 can be directly returned to mmu/ifu.

Further, in the method, if hit is in L2, and some L1 is in an E state, then L2 takes the data of L1 dirty by means of snoop, adjusts the data state of L1 to an S state, and then returns the data of L2 to mmu/ifu.

Further, in the method, if miss occurs in L2, the S/E state is acquired to the next level memory, and then the data is returned to mmu/ifu.

Further, in the method, if hit occurs in L2 and all L1 does not obtain the E state, there is no dirty data in L1; if hit is in L2, and there is L1 which is the E state and then there is dirty data in L1.

In a second aspect, the invention discloses an implementation system for reading data in a memory by mmu and ifu, which is used for supporting the implementation method for reading data in a memory by mmu and ifu, and is characterized by comprising a mmu module, a ifu module, a first-level cache L1 and a second-level cache L2.

The invention has the beneficial effects that:

the requests of the mmu and ifu for reading data do not occupy pipeline resources of the L1, and the mmu and ifu do not pollute the L1_ cache, do not influence the hit rate of instruction operands, and have strong creativity.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a basic flow diagram of mmu/ifu reload data;

FIG. 2 is a block diagram of an implementation system for mmu and ifu to read data in a memory.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Example 1

Referring to fig. 1, the embodiment discloses a method for reading data in a memory by mmu and ifu, and specifically, requests for mmu and ifu to read data are directly sent to L2; if it is found in L2 that dirty data is in L1_ cache, a snoop request is sent to L1 through L2, dirty data is obtained, and the latest data of the memory is read.

In this embodiment, if hit occurs in L2 and all L1 do not obtain the E state, the data of L2 can be directly returned to mmu/ifu.

In the embodiment, if hit is in L2, and some L1 is in an E state, at this time, L2 takes the data of L1 dirty by means of snoop, adjusts the data state of L1 to an S state, and then returns the data of L2 to mmu/ifu.

In the embodiment, if miss is performed in L2, the S/E state is acquired to the next level memory, and then the data is returned to mmu/ifu.

In this embodiment, if hit is found in L2 and all L1 do not obtain the E state, there is no dirty data in L1; if hit is in L2, and there is L1 which is the E state and then there is dirty data in L1.

Example 2

Referring to fig. 2, the embodiment discloses an implementation system for reading data in a memory by mmu and ifu, which includes a mmu module, a module ifu, a first-level cache L1, and a second-level cache L2.

In the system of the embodiment, requests of mmu and ifu for reading data are directly sent to L2, and if dirty data are found in L1_ cache in L2, a snoop request is sent to L1 through L2, and the dirty data are taken, so that the latest data of the memory are taken.

In summary, the requests of the mmu and ifu for reading data do not occupy pipeline resources of L1, and the mmu and ifu do not pollute the L1_ cache, do not affect the hit rate of the instruction operand, and have strong creativity.

The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.