阅读说明：本技术 封装结构和电子装置 (Packaging structure and electronic device ) 是由 马超 郭健炜 胡勇 其他发明人请求不公开姓名 于 2021-07-09 设计创作，主要内容包括：提供一种封装结构和电子装置。该封装结构包括：第一基板,具有第一表面以及与第一表面相对的第二表面；处理组件,耦接到第一基板的第一表面；第一焊盘阵列,由多个第一焊盘组成,并耦接到第一基板的第二表面；第一连接件阵列,由多个第一连接件组成,其中,第一连接件包括：中段,采用第一导电材料制备；第一端部和第二端部,由中段沿相对方向延伸,并且采用第二导电材料制备,第一端部耦接至对应的第一焊盘并经由对应的第一焊盘耦接到第二表面；其中,第一导电材料的刚性大于第二导电材料的刚性。该封装结构的连接件组成的连接件阵列与外部的母板连接时,发生的形变较小。(A package structure and an electronic device are provided. The packaging structure comprises: the first substrate is provided with a first surface and a second surface opposite to the first surface; a processing assembly coupled to a first surface of a first substrate; a first pad array composed of a plurality of first pads and coupled to the second surface of the first substrate; a first connector array consisting of a plurality of first connectors, wherein the first connectors include: the middle section is prepared from a first conductive material; first and second end portions extending in opposite directions from the middle section and made of a second conductive material, the first end portions being coupled to the corresponding first pads and coupled to the second surface via the corresponding first pads; wherein the rigidity of the first conductive material is greater than the rigidity of the second conductive material. When a connecting piece array formed by the connecting pieces of the packaging structure is connected with an external motherboard, the deformation is small.)

1. A package structure, comprising:

a first substrate having a first surface and a second surface opposite to the first surface;

a processing assembly coupled to the first surface of the first substrate;

a first pad array composed of a plurality of first pads and coupled to the second surface of the first substrate;

a first connector array composed of a plurality of first connectors,

wherein the first connecting member includes:

the middle section is prepared from a first conductive material;

first and second end portions extending in opposite directions from the middle section and made of a second conductive material, the first end portions being coupled to corresponding first pads and to the second surface via the corresponding first pads;

wherein the first conductive material has a rigidity greater than a rigidity of the second conductive material.

2. The package structure of claim 1, further comprising:

a second pad array composed of a plurality of second pads and coupled to the second surface of the first substrate;

a second connector array composed of a plurality of second connectors, wherein each of the second connectors is coupled to the second surface via a corresponding second pad, and the second connectors are made of the second conductive material.

3. The package structure of claim 2, wherein the first and second connectors are cylindrical, drum-shaped, or cuboid.

4. The package structure of claim 1, the first conductive material being a single metal and the second conductive material being an alloy.

5. The package structure of claim 4, the first conductive material being copper or nickel, the second conductive material being: SnAg alloy, SnCu alloy or SnCuBi alloy.

6. The package structure of claim 2, wherein the number of first connectors is greater than the number of second connectors.

7. The package structure of claim 2, wherein the first and second arrays of connectors comprise a third array of connectors in which the first connectors are staggered from the second connectors.

8. The package structure of claim 2, wherein the first and second arrays of connectors comprise a third array of connectors, the second array of connectors being located at a central location of the third array of connectors, and the first array of connectors being located at a peripheral location of the third array of connectors.

9. An electronic device, comprising:

an encapsulation structure according to any one of claims 1, 4 and 5;

a second substrate having a third surface and a fourth surface opposite to the third surface;

a third pad array composed of a plurality of third pads and coupled to the third surface of the second substrate;

the third surface is opposite to the second surface of the package structure, and the second end of the first connector is coupled to the corresponding third pad and coupled to the third surface via the corresponding third pad.

10. An electronic device, comprising:

an encapsulation structure according to any one of claims 2, 3, 6, 7 and 8;

a second substrate having a third surface and a fourth surface opposite to the third surface;

a third pad array composed of a plurality of third pads and coupled to the third surface of the second substrate;

a fourth pad array composed of a plurality of fourth pads and coupled to the third surface of the second substrate

Wherein the third surface is disposed opposite to the second surface of the package structure, and the second end of each of the first connectors is coupled to the corresponding third pad and coupled to the third surface via the corresponding third pad, and each of the second connectors is coupled to the corresponding fourth pad and coupled to the third surface via the corresponding fourth pad.

Technical Field

The present disclosure relates to a semiconductor device, and more particularly, to a package structure and an electronic apparatus.

Background

Bga (ball Grid array) packages, i.e., ball Grid array packages, are fabricated with solder balls arranged in an array on the bottom surface of a package substrate as terminals for interconnection to a substrate, such as a printed circuit board PCB. The device adopting the BGA Package is a surface-mounted device, and compared with a pin-type mounted device (which is connected with a printed circuit board through pins on the surface of a part, the packaging technology of the type is SOP (Small out Package), QFP (quad Flat Package), SOJ (Small out Package J-lead Package)), the BGA Package has the advantages of smaller device, more leads, excellent electrical property and the like.

However, in this device, since a large-scale integrated circuit is integrated on a package substrate, after a solder ball is connected to the substrate, the solder ball may deform due to a weight factor, and thus impedance at the solder ball may deteriorate, and the impedance at this position may become a bottleneck point of the entire link, which may cause impedance discontinuity of the entire link, so that Signal Integrity (SI) indexes such as Return Loss (RL) and crosstalk (crosstalk) of the entire link may deteriorate.

Disclosure of Invention

In view of the above, an object of the present disclosure is to provide a package structure and an electronic apparatus, in which pins connected to an external device are different from those of the related art.

According to a first aspect of the embodiments of the present disclosure, there is provided a package structure, including:

a first substrate having a first surface and a second surface opposite to the first surface;

a processing assembly coupled to the first surface of the first substrate;

a first pad array composed of a plurality of first pads and coupled to the second surface of the first substrate;

a first connector array composed of a plurality of first connectors,

wherein the first connecting member includes:

the middle section is prepared from a first conductive material;

first and second end portions extending in opposite directions from the middle section and made of a second conductive material, the first end portions being coupled to corresponding first pads and to the second surface via the corresponding first pads;

wherein the first conductive material has a rigidity greater than a rigidity of the second conductive material.

Optionally, the package structure further includes:

a second pad array composed of a plurality of second pads and coupled to the second surface of the first substrate;

a second connector array composed of a plurality of second connectors, wherein each of the second connectors is coupled to the second surface via a corresponding second pad, and the second connectors are made of the second conductive material. .

Optionally, the first connecting piece and the second connecting piece are columnar, drum-shaped or rectangular.

Optionally, the first conductive material is a single metal, and the second conductive material is an alloy.

Optionally, the first conductive material is copper or nickel, and the second conductive material is: SnAg alloy, SnCu alloy or SnCuBi alloy.

Optionally, the number of the first connectors is greater than the number of the second connectors.

Optionally, the first connector array and the second connector array form a third connector array, and in the third connector array, the first connectors and the second connectors are staggered.

Optionally, the first connector array and the second connector array form a third connector array, the second connector array is located at a central position of the third connector array, and the first connector array is located at a peripheral position of the third connector array.

According to a second aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including:

the packaging structure only comprises the first connecting piece;

a second substrate having a third surface and a fourth surface opposite to the third surface;

a third pad array composed of a plurality of third pads and coupled to the third surface of the second substrate;

the third surface is opposite to the second surface of the package structure, and the second end of the first connector is coupled to the corresponding third pad and coupled to the third surface via the corresponding third pad.

According to a third aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including:

the packaging structure simultaneously comprises a first connecting piece and a second connecting piece;

a second substrate having a third surface and a fourth surface opposite to the third surface;

a third pad array composed of a plurality of third pads and coupled to the third surface of the second substrate;

a fourth pad array composed of a plurality of fourth pads and coupled to the third surface of the second substrate

Wherein the third surface is disposed opposite to the second surface of the package structure, and the second end of each of the first connectors is coupled to the corresponding third pad and coupled to the third surface via the corresponding third pad, and each of the second connectors is coupled to the corresponding fourth pad and coupled to the third surface via the corresponding fourth pad.

In summary, in the package structure provided in the embodiments of the present disclosure, the middle section of the first connecting element included therein is made of the first conductive material, the two end portions are made of the second conductive material, and the rigidity of the first conductive material is greater than that of the second conductive material, so that when the package structure is interconnected with an external substrate by using a connecting element array formed by a plurality of first connecting elements, the connecting element array is not greatly deformed under the action of gravity, and thus the indexes such as impedance of the whole link are not deteriorated due to excessive deformation.

Drawings

The foregoing and other objects, features, and advantages of the disclosure will be apparent from the following description of embodiments of the disclosure, which refers to the accompanying drawings in which:

FIGS. 1 and 2 are schematic views of two substrates being connected to each other via solder balls in the prior art;

FIG. 3 is a schematic view of a connector provided by an embodiment of the present disclosure;

fig. 4a is a schematic diagram of a package structure provided by an embodiment of the present disclosure;

fig. 4b is a schematic diagram of an electronic device including a package structure according to fig. 4a according to an embodiment of the disclosure;

fig. 5a is a schematic diagram of a package structure according to another embodiment of the disclosure;

fig. 5b is a schematic diagram of an electronic device including a package structure based on the package structure shown in fig. 5a according to another embodiment of the disclosure;

FIG. 6 is a schematic view of an electronic device provided by yet another embodiment of the present disclosure;

7a-7d are schematic plan views of four connector arrays constructed in accordance with embodiments of the present disclosure;

FIG. 8 is a schematic diagram of an electronic device implemented according to an embodiment of the disclosure.

Detailed Description

The present disclosure is described below based on examples, but the present disclosure is not limited to only these examples. In the following detailed description of the present disclosure, some specific details are set forth in detail. It will be apparent to those skilled in the art that the present disclosure may be practiced without these specific details. Well-known methods, procedures, and procedures have not been described in detail so as not to obscure the present disclosure. The figures are not necessarily drawn to scale.

First, it should be clarified that the term "korean ball" or "solder ball" used in the BGA package refers to a pin located outside the package, which is generally spherical in shape and thus referred to as korean ball or solder ball, but the present disclosure provides an embodiment in which the pin is referred to as a "connector" according to its function since the shape includes but is not limited to a sphere.

Fig. 1 and 2 are schematic diagrams illustrating two substrates connected to each other via solder balls in the prior art. As shown in fig. 1 and 2, the BGA device includes a BGA structure 100 and a substrate 107. The BGA structure 100 is physically and electrically connected to a substrate 107 using solder balls 104.

The BGA structure 100 includes a substrate 103, a processing assembly 101 disposed over the substrate 103, pads 105 disposed on a bottom surface of the substrate 103, and solder balls 104 interconnected with the pads 105. The BGA structure includes a Plastic BGA (PBGA), a Ceramic BGA (CBGA), a tape BGA (CBGA), etc., depending on the type of substrate. The substrate of the plastic-encapsulated BGA is a PCB substrate material (BT resin/glass laminate), and if this is the case, the whole molding is achieved by an injection molding method after the process kit 101 is connected to the pins 102 on the top surface of the substrate 103. The substrate of the ceramic BGA employs a multilayer ceramic wiring substrate, and if this is the case, the processing assembly 101 is mounted on the top surface of the ceramic substrate, and then hermetic packaging is achieved using a ceramic cover plate. The type of substrate used for the tape BGA is a PI multilayer wiring substrate, and it and the plastic-encapsulated BGA are packaged with plastic.

The solder balls 104 are disposed in an array on the bottom surface of the substrate 103. The BGA structure can be divided into a peripheral type, a staggered type and a full array type according to the arrangement of solder balls. The peripheral type is a type in which the solder balls 104 are provided on the periphery of the bottom surface of the substrate 103, and for example, a plurality of rows of the solder balls 104 may be provided near four sides, respectively. The staggered type means that solder balls are disposed at both the central position and the peripheral position of the bottom surface of the substrate 103. The full array type means that the solder balls 104 are uniformly arranged on the bottom surface of the substrate 103. And the processing assembly 101 is generally centrally located on the top surface of the substrate 103.

Further, the manufacturing process of the BGA structure mainly includes two aspects: and (3) substrate preparation and packaging process flows. The substrate preparation refers to finishing the preparation work of the substrate, and the related process comprises the following steps: firstly, copper foils are pressed on the upper surface and the lower surface of a resin/glass core plate, then through holes are drilled and metallized on the copper foils, then the upper surface and the lower surface of a substrate are patterned by using the conventional PWB process (the processes of film pressing, exposure, development, etching and the like) to form leads, electrodes, bonding pads and the like, then a dielectric solder mask is formed and the patterns are manufactured, and the electrodes and the bonding pads are exposed. After the substrate preparation is completed, pads for connecting solder balls are formed on the top surface of the substrate and pads for connecting solder balls are formed on the bottom surface of the substrate, and conductive features are embedded in the substrate so that electrical coupling can be provided between the processing components and the pads. For the present embodiment, when the substrate preparation is completed, the substrate 103 meeting the requirements will be obtained

The packaging process flow is to mount the processing assembly on the substrate 103 and complete the ball mounting work on the bottom surface of the substrate 103, and the related flow comprises a plurality of steps of processing chip bonding, wire bonding, molding packaging, assembling solder balls, reflow soldering and the like. Wherein die bonding is the mounting of the processing component 101 to the substrate 103. Currently, a conventional reverse-buckling welding (filler Chip on Board) is to make various micro solder bumps at corresponding points around the processing assembly itself and connect the micro solder bumps with corresponding soldering points prepared on the substrate in advance, and if the solder bumps are disposed on all the surfaces of the processing assembly, the reverse-buckling welding is specifically called C4 method (Controlled soldered Chip Connection). Wire bonding connects the lands on the processing assembly 101 to the lands on the substrate 103. The molded package is a molded package that uses plastic to protect the processing components 101, leads, and lands. Assembling solder balls refers to placing solder balls 104, which are dipped with solder, on the pads 105 using a specially designed tool (e.g., a ball pick and place machine), and performing reflow soldering in a reflow oven so that the solder balls and the pads 105 on the substrate are soldered together. The BGA structure 100 with solder balls 104 is finally attached to the pads 106 by mounting, so that the BGA structure 100 is attached to the substrate 107.

When the packaging process flow is completed, the device shown in fig. 2 will be obtained. As can be seen from the figure, the array composed of the solder balls 104 is subjected to the gravity action of the substrate 104 and the processing assembly 101, and ideally, the gravity action does not cause the array to deform greatly, but in the actual process, the inventor finds that the solder balls 104 deform due to bearing or melting during soldering, and then the impedance at the joints of the solder balls and the pads deteriorates, and the impedance at the joints becomes a bottleneck point of the whole link, so that Signal Integrity (SI) indexes such as Return Loss (RL) and crosstalk of the whole link deteriorate.

Fig. 3 is a schematic view of a connector provided by an embodiment of the present disclosure. The connector 300 is generally elongate and includes a central section 302 and two end sections 301 and 303, the two end sections 301 and 303 extending from the central section 302 in opposite directions. The middle section 302 is fabricated from a first conductive material. The two end portions 301 and 303 are made of a second conductive material. In order to control the degree of deformation of the connector 300 during load bearing, the first conductive material is selected to be more rigid than the second conductive material, so that even if the two end portions 301 and 303 are greatly deformed under the action of gravity or due to melting during welding, the middle portion 302 is not greatly deformed, thereby ensuring that the deformation of the connector 300 is controllable as a whole.

In some embodiments, the first conductive material is a metal with certain rigidity, such as copper or nickel, or a non-metal material with good conductive characteristics and certain rigidity. The second conductive material is a solderable alloy material including but not limited to SnAg alloy, SnCu alloy, SnCuBi, etc.

In some embodiments, the shape of the connector 300 may be a column, a drum, or a cuboid. In fig. 3, the connector 300 is cylindrical in shape, the middle section 302 has a height H1, the end 301 has a height H2, the other end 303 has a height H3, alternatively, H2 is equal to H3, and H1 is more than 10 times the height H2.

In some embodiments, when the end 301 of the connector 300 is welded to the bottom surface of the base plate 403 in fig. 4a, it is operable such that the melted portion of the connector 300 does not exceed the height of the end 301, such that when the welding is complete, at least a portion of the end 301 is retained to ensure that the connector 300 provides a cradling action of a desired height.

In some embodiments, the solder and the first and second conductive materials are selected to ensure that the middle section 302 does not substantially melt during reflow soldering, only the end portions 301 will melt away in part during the soldering process, and at least a portion of the end portions 301 will remain when soldering is completed, thereby ensuring that the connector 300 provides a desired height of standoff.

Fig. 4a is a schematic diagram of a package structure according to an embodiment of the disclosure. As shown in the figure, the package structure 400 includes: a substrate 403, at least one processing component 401 disposed on a top surface of the substrate 403, a plurality of pads 405 disposed on a bottom surface of the substrate 403, and connectors 404 connected to the pads 405. As in fig. 1, the substrate 403 may be a substrate type such as a PCB substrate material (BT resin/glass laminate), a multilayer ceramic wiring substrate, a PI multilayer wiring substrate, or the like. Also, the process of mounting the processing assembly 401 to the top surface of the substrate 403 is not limited and the above-mentioned flip chip bonding (including C4 bonding) or other methods may be used herein.

In this embodiment, each connector 404 is the connector 300 shown in FIG. 3. Since each of the connectors 404 is coupled to the bottom surface of the substrate 403 via one pad 405, a connector array composed of a plurality of connectors 404 is coupled to the bottom surface of the substrate 403 via a pad array composed of a plurality of pads 405. The pads 405 and connectors 404 (one-to-one correspondence between them) may be disposed as desired. For example, if the processing assembly 401 is centered on the top surface of the substrate, then all of the connectors 404 are deployed around the processing assembly 401, or all of the connectors 404 are disposed in approximately corresponding positions.

Fig. 4b is a schematic diagram of an electronic device including a package structure based on the package structure shown in fig. 4a according to an embodiment of the disclosure. As shown, the electronic device 450 includes the package structure 400 and the substrate 407 according to fig. 4 a. The substrate 407 has a top surface and a bottom surface, a plurality of pads 406 disposed on the top surface, and the package structure 400 is coupled to the plurality of pads 406, and thus to the top surface of the substrate 407, via a plurality of connectors 404.

In this embodiment, the substrate 407 may be a bottom motherboard or a package substrate located in an intermediate layer. A package substrate (also referred to as an IC carrier), which is a high-end PCB, has the features of high density, high precision, miniaturization, and thinness. In the field of high-level packaging, a packaging substrate replaces a traditional lead frame and becomes an indispensable part in packaging of a processing assembly, so that the packaging substrate not only provides supporting, heat dissipation and protection effects for the processing assembly, but also provides electronic connection between the processing assembly and a motherboard, and even can embed passive and active devices to realize certain system functions. Base substrate 407 generally refers to a printed circuit board used in a system to carry various components.

In the present embodiment, the processing component 401 may be a memory chip, a radio frequency chip, a processor chip, a high-speed communication chip, a microelectronic system chip, and the like according to functional division. Further, it should be understood that although a single chip 401 is shown on the substrate on the figure, any number of processing components 401 may be coupled to the substrate 403. While the positional relationship of the plurality of connectors 404 to the processing assembly 401 described above refers to the positional relationship between the plurality of connectors 404 and the single processing assembly 401.

As can be appreciated, in the product manufacturing process, the developer may control the impedance at the connection between the connector and the substrate by adjusting at least one of the shape, size and material composition of the connector, such as setting H1 and H3 in fig. 3 equal to 1/10 of H2, or making the width of the two ends 301 and 303 slightly larger than the width of the middle section 302 (e.g., irregular cylindrical shape). Meanwhile, research personnel can also realize impedance control on the connection part of the connecting piece array and the substrate on the whole by adjusting the number of the connecting pieces in the connecting piece array

Fig. 5a is a schematic diagram of a package structure according to another embodiment of the disclosure, and fig. 5b is a schematic diagram of an electronic device including a package structure shown in fig. 5a according to another embodiment of the disclosure. The difference from fig. 4a and 4b is that the connection members for performing the connection between the substrates 403 and 407 include a connection member 404 and a connection member 408. The connector 404 is the connector 300 shown in fig. 3, which is described in detail above with respect to fig. 3. The connector 408 is different from the connector 404, the connector 408 is made of a second conductive material, and the connector 408 includes two end portions, one of which is coupled to one of the pads 405 and is coupled to the bottom surface of the substrate 403 via the pad 405. In this example, the array of connectors 404 and 408 together form an array of connectors between the two substrates. This also ensures that the connector array as a whole does not deform significantly under the influence of gravity.

Fig. 6 is a schematic view of an electronic device according to another embodiment of the disclosure. The difference from fig. 5a and 5b is that the connection between the substrates 403 and 407 includes a connection 404 and a connection 409. The connector 404 is the connector 300 shown in fig. 3 and described in detail above with respect to fig. 3. The connecting member 409 and the connecting members 404 and 408 have different shapes and/or volumes, and the connecting member 409 has a shape of a long bar, but a middle section is bulged (like a drum), but also the connecting member 409 includes a middle section and two end sections extending from the middle section, wherein the two end sections are made of a second conductive material, and the middle section is made of a first conductive material, and the rigidity of the first conductive material is higher than that of the second conductive material. In this way it is also ensured that the connector array as a whole does not deform significantly under the influence of gravity.

Fig. 7a-7d are schematic plan views of four connector arrays constructed in accordance with embodiments of the present disclosure.

As shown in fig. 7a, 701 and 702 are staggered in the array of connectors 701 and 702. As shown in fig. 7b, in the array of connections 701 and 702, connections 701 and 702 are located at the center of the array (which typically corresponds to the position of the processing assembly on the top surface) and at the periphery of the array, and as can be seen in the figure, the connections 701 are located at the center, while connections 702 are located only at the four corners of the bottom surface. As shown in fig. 7c, in the array of connections 701 and 702, connections 701 and 702 are located at a central position (generally corresponding to the position of the processing assembly on the top surface) and a peripheral position of the array, respectively. As shown in fig. 7d, in the array of connections 701 and 702, the connections 702 and 701 are distributed at a central position (typically corresponding to the position of the processing assembly on the top surface) and at a peripheral position of the array, respectively.

The connecting members 701 and 702 are two connecting members differing in at least one of shape, volume and manufacturing method. For example, the connector 701 is the connector 300 shown in fig. 3, the connector 702 is a connector made entirely of the second conductive material, and the number of connectors 701 in the connector array may be greater than the number of connectors 702 for safety, but this is not necessarily so.

Of course, there are other arrangements besides these four arrangements, which are not described here. It will be appreciated by those skilled in the art that the purpose of this arrangement, regardless of the arrangement, is to ensure that the connector array as a whole does not deform significantly under the influence of gravity.

FIG. 8 is a schematic diagram of an electronic device implemented according to an embodiment of the disclosure. As shown in the figure, the electronic device provides a motherboard 1000 corresponding to the substrate 407 for carrying the package structure in the above embodiment, and various components disposed on the motherboard 1000 correspond to the package structure in the above embodiment. The motherboard 1000 is, for example, a printed circuit board. Motherboard 1000 may carry various components including, without limitation, central processor 1002, graphics processor 1003, dynamic random access memory 1004, static random access memory 1010, flash memory 1006, GPS chip 1008, and the like. Motherboard 1000 provides communication functionality between the various components. The components are physically and electrically coupled to motherboard 1000, such as by using the pads described above to couple the components to motherboard 1000, and such as by using a plug to couple the components to motherboard 1000. In further embodiments, for example, the functions of some components may be integrated in the processor, for example, the dynamic random access memory 1004 and the static random access memory 1010 may be integrated in a system on chip and be regarded as the processor 1002 in this embodiment.

The processor 1002 may correspond to a central processing unit of a conventional computer system for performing general control and scheduling functions. The cpu is very effective in logic control but often insufficient in specificity, and thus is sometimes integrated with various specialized acceleration units, for example, an acceleration unit dedicated to neural network model calculation, a graphics processor more efficient in graphics processing, and the like. In this embodiment, the cpu 1002 and the graphic processor 1003 are integrated in the same electronic device through the motherboard 1000.

The communication chip enables wireless communication to facilitate data transfer to and from the electronic device 100. The term "wireless" does not mean that the associated devices do not contain any wires, although in some embodiments they may not. The communication chip may implement any of a variety of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, Long Term Evolution (LTE), Ev-DO, HSPA +, HSDPA +, HSUPA +, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, and any other wireless protocol designated as 3G, 4G, 5G, and above. Since there are many different communication protocols, a separate communication chip can be constructed based on each communication protocol. For example, the motherboard 1000 is provided with a GPS chip 1008 and a bluetooth chip 1007, and the motherboard 1000 is also provided with chips dedicated to long-distance wireless communication, such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and the like. In addition, other functions, such as video codecs, compasses, various component drivers, and the like, may also form various components and be integrated into the electronic device 100 through the motherboard 1000.

Also included in the electronic device are components that are not integrated into the device 100 via the motherboard 1000, such as a sound card 1009, a keyboard 1012, a network card 1014, and a mouse 1013. These components provide input and output functionality for the device 100.

Commercial value of the disclosed embodiments

According to the packaging structure provided by the embodiment of the disclosure, when the packaging structure is coupled with the outside by designing different connectors, the connector array cannot generate much deformation due to gravity. The improvement on the product technology can enhance the stability of the corresponding product in terms of electrical performance, thereby having use value and economic value.

Any combination of one or more computer-readable media may be employed. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium is, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer-readable storage medium include: an electrical connection for the particular wire or wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical memory, a magnetic memory, or any suitable combination of the foregoing. In this context, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with a processing unit, apparatus, or device.

A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a chopper. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any other suitable combination. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction system, apparatus, or device.

Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., and any suitable combination of the foregoing.

Computer program code for carrying out embodiments of the present disclosure may be written in one or more programming languages or combinations. The programming language includes an object-oriented programming language such as JAVA, C + +, and may also include a conventional procedural programming language such as C. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).

The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.