阅读说明：本技术 一种用于激励能级电容分析法的缺陷态空间位置测定方法 (Defect state space position determination method for excitation energy level capacitance analysis method ) 是由 陈小青 张鑫 严辉 张永哲 孙召清 于 2021-08-19 设计创作，主要内容包括：一种用于激励能级电容分析法的缺陷态空间位置测定方法,属于半导体材料测试领域。将DLCP电压为V条件下,能级深度浅于E的陷阱态的态密度记为N(E,V)；将DLCP电压为V条件下(对应特定空间位置),单位位置、能量空间中的态密度记为g(E,V)。计算不同能量、空间位置的(x-(e)(E-(Ti),V-(k)),N(E-(Ti),V-(k)))；最后,根据公式(1),可计算单位位置、能量空间的陷阱态的态密度g(E-(Ti),V-(k)),即因此可整理成(x-(e)(E-(Ti),V-(k)),g(E-(Ti),V-(k)))的数据表格,其中x-(e)(E-(Ti),V-(k))即为所求解的陷阱位置。(A defect state space position measuring method for an excitation energy level capacitance analysis method belongs to the field of semiconductor material testing. Recording the state density of a trap state with the energy level depth shallower than E as N (E, V) under the condition that the DLCP voltage is V; when the DLCP voltage is V (corresponding to a specific spatial position), the state density in the unit position and energy space is represented as g (E, V). Calculating (x) at different energies, spatial positions e (E Ti ,V k ),N(E Ti ,V k ) ); finally, according to the formula (1), the state density g (E) of the trap state in the unit position and energy space can be calculated Ti ,V k ) I.e. by Thus can be arranged into (x) e (E Ti ,V k ),g(E Ti ,V k ) Data table of (b), where x e (E Ti ，V k ) I.e. the trap position solved.)

1. A method for determining the spatial position of a defect state by excitation energy level capacitance analysis is characterized by comprising the following steps:

1) finding the highest frequency ω that can be used to analyze the device internal carrier behavior through the capacitance-frequency relationship of the device_deviceBecause when the frequency is ω>ω_deviceThe capacitance mainly comes from the geometrical capacitance of the device; will omega_deviceHighest available frequency omega with capacitance measuring equipment_instrumentComparison, let omega_maxIs omega_deviceAnd ω_instrumentThe smaller of these;

2) at a fixed DLCP voltage of V₁Without change, i.e.Wherein V_DCIs a direct current bias voltage and is used for controlling the voltage,is an AC bias, the following operations are performed in sequence:

2.1 from ω_maxInitially, according to the DLCP method, solve for (1) ω_maxCorresponding trap energy level E_T0(2) under the specific conditions (E)_T0,V₁) Lower trap "quasi-position"<x>(E_T0,V₁) And (3) the depth of the energy level is shallower than E_T0State density of trap states (N (E)_T0，V₁) Defined as the difference between the shallow acceptor impurity concentration-the shallow donor impurity concentration); will (E)_T0,V₁) Under conditions, the location of the excited defect state is marked x_e(E_T0,V₁) The electric field here is F (x)_e(E_T0,V₁) Is marked as F)₀(ii) a From the physical classical image of a semiconductor device, F (x)_e(E_T0,V₁) Can be reasonably assumed to be 0, and thus

Further, the derivative of the electric field (F (x)) with respect to the spatial location (x) may be solved according to Gauss's law

Wherein q is the elementary charge and e is the dielectric constant;

2.2 on the basis of the previous step, by reducing the frequency to ω₁＝ω_max/m₁To study the trap level E with deeper trap levels_T1，1<m₁<e, e is the natural logarithm base; according to the theory of DLCP, calculate E_T1I.e. E_T1＝E_T0+dE_T＝E_T0+kTlnm₁Where k is the boltzmann constant and T is the temperature; following the 2.1 steps, the depth of the energy level is found to be shallower than E_T1Density of trap states (N (E)_T1,V₁) ); if N (E)_T1,V₁) Compare N (E)_T0,V₁) Cannot be ignored, m is reduced moderately₁Up to N (E)_T1,V₁) Compare N (E)_T0,V₁) The amount of change of (c) is negligible; due to N (E)_T1,V₁)≈N(E_T0,V₁) In (x)_e(E_T0,V₁),x_e(E_T1,V₁) In the interval), the position of any one point can be written as x_e(E_T0，V₁) -x' (where 0<x′<[x_e(E_T0,V₁)-x_e(E_T1,V₁)]) (ii) a Electric field (F (x)) at this point_e(E_T0，V₁) -x')) can be expressed by formula (3) as

From the formula (4), in x_e(E_T1,V₁) Here, the electric field is denoted as F₁Is composed of

WhereinIs defined as x_e(E_T0,F₁)-x_e(E_T1，V₁) And is and

whereinFrom equation (6), one can obtain

And finally can also obtain

2.3 on the basis of the previous step, following the mode of operation of 2.2, continue by reducing the frequency to ω₁/m₂To study the trap level E with deeper trap levels_T2，m₂Selection method and m₁The selection modes are the same; and obtain E_T2＝E_T0+kTln(m₁m₂) And

2.4 following the above steps, continue to reduce the frequency toWhere i is the number of the frequency reduction, all the required (ET) are calculated_i,x_e(E_Ti,V₁)，N(E_Ti,V₁) Combinations of (a) and (b); wherein N(E_Ti,V₁) Solving by a DLCP method;

3) for other voltages V, as with the DLCP method_kRepeat all steps of 1.1 to compute different energy, spatial locations for different (x)_e(E_Ti,V_k),N(E_Ti,V_k) ); finally, according to the formula (1), the state density g (E) of the trap state in the unit position and energy space can be calculated_Ti,V_k) I.e. byThus can be arranged into (x)_e(E_Ti,V_k),g(E_Ti,V_k) Data table of (b), where x_e(E_Ti,V_k) I.e. the trap position solved.

Technical Field

The invention belongs to the field of semiconductor material testing, and particularly provides a method for measuring a defect state space position by using a Drive-level capacitance analysis method (Drive-level capacitance profiling)

Background

In order to improve the performance of semiconductor devices, defects and interface defects of semiconductor materials have attracted extensive attention in academia and industry. The capacitance testing technology is an important means for researching the matrix defect and the interface defect of a semiconductor device, and has been widely applied to the fields of solar cells and light emitting diodes. The basic method of this technique is to apply a perturbation voltage signal to the semiconductor device to measure the capacitance of the device, and since the trapping or emission of carriers in the defect state affects the capacitance of the device, the capacitance measurement can be used to analyze the information about the defect state. Based on basic physical images of the semiconductor device, defect states of different spatial positions and energy level depths in a semiconductor can be respectively researched by changing conditions such as bias voltage, frequency and the like during capacitance measurement, so that a series of defect state analysis methods based on capacitance measurement are formed, wherein the method comprises the following steps: Capacitance-Voltage (Capacitance-Voltage), Deep-level transient spectrum (Deep-level transient spectrum), and Drive-level Capacitance profiling (Drive-level Capacitance profiling). Excitation level capacitance analysis (hereinafter DLCP) is used to obtain the spatial distribution information and energy distribution information of the defects of the material, and the measurement principle, related assumptions and operation method thereof are described in j.appl.phys.95, 1000-1010 (2004). However, the DLCP method is limited in that the spatial position (x) of the defect cannot be accurately given_e) Only one and x can be given_eRelative "quasi-position" ((ii))<x>). According to J.appl.Phys.95, 1000-1010 (2004), x_eAnd<x>there is a theoretical correlation, i.e.

Wherein epsilon is the dielectric constant of the semiconductor material, F is the position x of the defect in the measurement process_eElectric field of (E)_T,x_e) Is x_eIs shallower than E_T(according to J.appl.Phys.95, 1000-1010 (2004), E_TDepending on the frequency used in the capacitive test). So far, since there is no measurementOr analysis of F (E)_T,x_e) And therefore cannot be effectively determined according to the measured<x>Solving for x_eEven more fail to obtain x_eEnergy level and DLCP voltage. In order to solve the problem of the DLCP technology, the invention provides a method for testing the defect state position based on the DLCP principle.

Disclosure of Invention

Basic physical images and assumptions adopted by the DLCP technology are described in j.appl.phys.95, 1000-1010 (2004), and measurement devices thereof include various types of variable-frequency and variable-dc-bias capacitance test equipment, such as LCR testers, impedance testers, semiconductor parameter analyzers and other devices, and test systems composed of other devices. This method analyzes different frequencies and voltages V (i.e. the voltage V) systematicallyWherein V_DCIs a direct current bias voltage and is used for controlling the voltage,is AC bias) to study the state density (dimension is' number/(cm)³eV) "). Wherein the frequency determines the deepest trap state energy level that can be detected; v together with frequency (or energy level) influences the spatial position x of the trap states that can be detected_eThis dependency is the problem addressed by the present invention.

For convenience of description, the state density of a trap state with an energy level depth shallower than E under the condition that the voltage of the DLCP is V (corresponding to a specific spatial position) is recorded as N (E, V), and is defined as the difference between the shallow acceptor impurity concentration and the shallow donor impurity concentration, and the dimension is "unit/(cm³) "; under the condition that the DLCP voltage is V (corresponding to a specific space position), the state density (dimension is' number/(cm))³eV) ") as g (E, V). It is obvious that

The measurement method is used for providing a test method of defect state space distribution for the DLCP technology. The basic physical images, assumptions and experimental set-up are the same as for the DLCP technique, described in j.appl.phys.95, 1000-1010 (2004). The basic analysis principle is shown in fig. 1, the basic implementation flow chart is shown in fig. 2, and the implementation steps are briefly described as follows:

1) finding the highest frequency ω that can be used to analyze the device internal carrier behavior through the capacitance-frequency relationship of the device_device(because when the frequency ω is>ω_deviceIn time, the capacitance is mainly derived from device geometry capacitance), and the analytical method is referred to as j.app.phys.118,205504 (2015). Will omega_deviceHighest available frequency omega with capacitance measuring equipment_instrumentComparison, let omega_maxIs omega_deviceAnd ω_instrumentThe smaller of them.

2) At a fixed DLCP voltage of V₁(i.e. theWherein V_DCIs a direct current bias voltage and is used for controlling the voltage,is ac bias) is constant, the following operations are performed in sequence.

2.1 from ω_maxInitially, according to the DLCP method, solve for (1) ω_maxCorresponding trap energy level E_T0(2) under the specific conditions (E)_T0,V₁) Lower trap "quasi-position"<x>(E_T0,V₁) And (3) the depth of the energy level is shallower than E_T0State density of trap states (N (E)_T0,V₁) Defined as the difference between the shallow acceptor impurity concentration-the shallow donor impurity concentration); will (E)_T0,V₁) Under conditions, the location of the excited defect state is marked x_e(E_T0,V₁) The electric field here is F (x)_e(E_T0,V₁) Is marked as F)₀(ii) a From the physical classical image of a semiconductor device, F (x)_e(E_T0,V₁) Can be reasonably assumed to be 0, and thus

Further, the derivative of the electric field (F (x)) with respect to the spatial location (x) may be solved according to Gauss's law

Where q is the elementary charge and e is the dielectric constant.

2.2 on the basis of the previous step, by reducing the frequency to ω₁＝ω_max/m₁(1<m₁<E, E is a natural logarithmic base) to study the trap level E with deeper trap levels_T1(ii) a According to the theory of DLCP, E can be calculated_T1I.e. E_T1＝E_T0+dE_T＝E_T0+kTlnm₁Where k is the boltzmann constant and T is the temperature; following the 2.1 steps, the depth of the energy level is found to be shallower than E_T1Density of trap states (N (E)_T1,V₁) ); if N (E)_T1,V₁) Compare N (E)_T0,V₁) Cannot be ignored (e.g., N (E)_T1,V₁)-N(E_T0,V₁)>10％N(E_T0，V₁) M) is reduced moderately₁Up to N (E)_T1,V₁) Compare N (E)_T0,V₁) The amount of change of (c) is negligible; due to N (E)_T1,V₁)≈N(E_T0,V₁) In (x)_e(E_T0,V₁),x_e(E_T1,V₁) In the interval), the position of any one point can be written as x_e(E_T0,V₁) -x' (where 0<x′<[x_e(E_T0,V₁)-x_e(E_T1,V₁)]) (ii) a Electric field (F (x)) at this point_e(E_T0,V₁) -x')) can be expressed by formula (3) as

From the formula (4), in x_e(E_T1,V₁) Here, the electric field is denoted as F₁Is composed of

WhereinIs defined as x_e(E_T0,V₁)-x_e(E_T1,V₁) And is and

whereinFrom equation (6), one can obtain

And finally can also obtain

2.3 on the basis of the previous step, following the mode of operation of 2.2, continue by reducing the frequency to ω₁/m₂To study the trap level E with deeper trap levels_T2，m₂Selection method and m₁The selection modes are the same; and obtain E_T2＝E_T0+kTln(m₁m₂) And

2.4 following the above stepsStep three, continuously reducing the frequency to(where i is the number of frequency reductions) and all of the required (E) are calculated_Ti,x_e(E_Ti,V₁),N(E_Ti,V₁) Combinations of (a) and (b); wherein N(E_Ti,V₁) Solving by a DLCP method;

3) for other voltages V, as with the DLCP method_kRepeating all steps of 1.1 to calculate (x) at different energies and spatial positions_e(E_Ti,V_k),N(E_Ti,V_k) ); finally, according to the formula (1), the state density g (E) of the trap state in the unit position and energy space can be calculated_Ti,V_k) I.e. byThus can be arranged into (x)_e(E_Ti,V_k),g(E_Ti,V_k) Data table of (b), where x_e(E_Ti,V_k) I.e. the trap position solved.

Drawings

FIG. 1 is a schematic diagram of the basic analysis principle of the present invention.

Fig. 2 is a flow chart of the basic implementation of the present invention.

Detailed Description

For the sake of understanding, a specific simple measurement example will be described below in conjunction with the schematic diagram and the measurement data, but the present invention is not limited to the following embodiments.

Example 1

The test sample is a laboratory self-made perovskite solar cell and has the structure of (ITO/SnO)₂/CH₃NH₃PbI₃Periro-OMeTAD/Au), dielectric of perovskiteConstant of about 2.7X 10^-10F/m is 31X vacuum dielectric constant. This case will measure at V₁0.4V, the spatial position of the defect state with a depth of 0.396eV, i.e., x_e(0.396eV,0.4V)。

The test equipment used in this case was Keysight B1500, omega of which_instrumentIs 31.4MHz (5 MHz. times.2 π), ω_deviceIs 126 kHz. Thus omega_maxAt 126kHz, the corresponding trap energy level E can be obtained according to the classical DLCP technology_T0About 0.370 eV. At V₁At 0.4V, N (E) is measured according to the classical DLCP technique_T0,V₁)＝3×10¹⁵/cm³，x_e(E_T0,V₁)＝337nm，

On the basis of the previous step, the frequency is reduced toIn this case the depth of the trap level to be investigated becomes E_T1＝0.396eV，Obtaining N (E) according to classical DLCP technique_T1,V₁)＝3.2×10¹⁵/cm³. Obtained according to the formula (6) To obtain finally

If the trap state space positions at other voltages and other energy level depths need to be further solved, the frequency and the voltage only need to be continuously changed.