阅读说明：本技术 一种电机控制器电源时序管理电路 (Power supply time sequence management circuit of motor controller ) 是由 唐宝 刘兴林 浦绍星 于 2021-07-31 设计创作，主要内容包括：本发明公开了一种电机控制器电源时序管理电路包括控制电路、功率驱动电路、以及安装在控制电路上的主控芯片；所述主控芯片的一引脚端依次连接有二极管D1、稳压管Z1和三极管Q1,该二极管D1与稳压管Z1之间并联有电阻R1；所述控制电路的一引脚端与电阻R1连接,该控制电路的另一引脚端并联有电阻R2和MOS管,其MOS管的一引脚端与功率驱动电路电性连接。本发明能够保证大功率电机控制器在控制电、功率电任意上下电时序条件下,产品功率管不发生损坏,延长产品的使用寿命,有利于该时序管理电路的推广使用。(The invention discloses a power supply time sequence management circuit of a motor controller, which comprises a control circuit, a power driving circuit and a main control chip arranged on the control circuit; a pin end of the main control chip is sequentially connected with a diode D1, a voltage regulator tube Z1 and a triode Q1, and a resistor R1 is connected in parallel between the diode D1 and the voltage regulator tube Z1; one pin end of the control circuit is connected with the resistor R1, the other pin end of the control circuit is connected with the resistor R2 and the MOS tube in parallel, and one pin end of the MOS tube is electrically connected with the power driving circuit. The invention can ensure that the product power tube is not damaged under the condition that the high-power motor controller controls the power and the power electricity to be randomly charged and discharged, prolongs the service life of the product and is beneficial to the popularization and the application of the time sequence management circuit.)

1. A power supply time sequence management circuit of a motor controller comprises a control circuit, a power driving circuit and a main control chip arranged on the control circuit; the method is characterized in that: a pin end of the main control chip is sequentially connected with a diode D1, a voltage regulator tube Z1 and a triode Q1, and a resistor R1 is connected in parallel between the diode D1 and the voltage regulator tube Z1; one pin end of the control circuit is connected with the resistor R1, the other pin end of the control circuit is connected with the resistor R2 and the MOS tube in parallel, and one pin end of the MOS tube is electrically connected with the power driving circuit; one pin terminal of the transistor Q1 is connected to the resistor R2.

2. The power timing management circuit of claim 1, wherein: the power supply voltage of the control circuit and the power supply voltage of the main control chip are subjected to diode D1, voltage regulator tube Z1, resistor R1, triode Q1, resistor R2 and MOS tube to obtain the primary side power supply voltage of the power driving circuit, and the power supply voltage of the main control chip exceeds 2.8V.

3. The power timing management circuit of claim 1, wherein: the diode D1 adopts an IN4148 type diode, and the MOS tube adopts an FDN358P type MOS tube.

4. The power timing management circuit of claim 1, wherein: one pin end of the transistor Q1 is grounded to GND, and the transistor Q1 is a 2N2222A type transistor.

5. The power timing management circuit of claim 1, wherein: the resistor R1 and the resistor R2 are connected together in parallel, the resistance of the resistor R1 is 3.3 kilo-ohms, and the resistance of the resistor R2 is 1 kilo-ohm.

Technical Field

The invention relates to the technical field of motor controllers, in particular to power supply time sequence management of a high-power motor controller realized by a power supply time sequence management circuit, and specifically relates to a power supply time sequence management circuit of the motor controller.

Background

The existing multi-power supply direct current power supply comprises the following steps: the power supply timing management circuit comprises a power supply control circuit, a power drive circuit, a high-power motor controller and a power supply timing management circuit, wherein the power supply control circuit is used for controlling power supply of 28V, the power drive circuit is used for supplying power of 270V, and the high-power motor controller is used for managing power supply timing; in the processes of controlling power supply by 28V and powering up and down by 270V power supply, the phenomenon that the power tube is directly connected to and damaged by the power tube due to the false triggering of the power tube caused by the unstable state of the power supply is easy to occur; to solve this problem, a timing management circuit is designed in the control circuit.

Disclosure of Invention

The invention aims to provide a power supply time sequence management circuit of a motor controller to ensure that a product is not damaged under the condition that the high-power motor controller controls the power supply and the power supply to supply and discharge any time sequence, and solve the problem that the power tube is directly connected and damaged by the power tube due to the false triggering of the power tube caused by the unstable state of the power supply in the background technology.

In order to achieve the purpose, the invention provides the following technical scheme:

a power supply time sequence management circuit of a motor controller comprises a control circuit, a power driving circuit and a main control chip arranged on the control circuit; a pin end of the main control chip is sequentially connected with a diode D1, a voltage regulator tube Z1 and a triode Q1, and a resistor R1 is connected in parallel between the diode D1 and the voltage regulator tube Z1; one pin end of the control circuit is connected with the resistor R1, the other pin end of the control circuit is connected with the resistor R2 and the MOS tube in parallel, and one pin end of the MOS tube is electrically connected with the power driving circuit; one pin terminal of the transistor Q1 is connected to the resistor R2.

Preferably, the power supply voltage of the control circuit and the main control chip is obtained by a diode D1, a voltage regulator tube Z1, a resistor R1, a triode Q1, a resistor R2 and a MOS transistor, and the power supply voltage of the main control chip exceeds 2.8V.

Preferably, the diode D1 is an IN4148 type diode, and its MOS transistor is an FDN358P type MOS transistor.

Preferably, a pin of the transistor Q1 is grounded to GND, and the transistor Q1 is a 2N2222A type transistor.

Preferably, the resistor R1 and the resistor R2 are connected in parallel, and the resistor R1 has a resistance of 3.3 kilo-ohms and the resistor R2 has a resistance of 1 kilo-ohms.

Compared with the prior art, the invention has the beneficial effects that:

1. the invention can ensure that the product power tube is not damaged under the condition that the high-power motor controller controls the power and the power electricity to be randomly charged and discharged, prolongs the service life of the product and is beneficial to the popularization and the application of the time sequence management circuit.

2. In the power-on process, when the output of the main control chip is in an unstable state, the power sequence management circuit ensures that the primary power supply of the driving signal reaches the normal working condition when the power supply of the main control chip is achieved, namely the power driving circuit chip is in the normal working state, and the power driving circuit chip outputs the determined signal for closing the power tube when outputting the determined signal for closing the power tube, thereby ensuring that the driving state is determined to be the closing state; in the power-off process, when the voltage of the main control chip is lower than the normal working voltage threshold value, the time sequence management circuit ensures that the primary side power supply of the driving signal stops outputting before the power driving circuit chip is in an uncontrolled state, so that the driving signal of the power tube is in a closed state.

Drawings

FIG. 1 is a circuit diagram of the power timing management of the present invention;

FIG. 2 is a power supply block diagram of the power timing management of the present invention.

In the figure: the device comprises a main control chip 1, a control circuit 2 and a power driving circuit 3.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1-2, the present invention provides a technical solution: a power supply time sequence management circuit of a motor controller comprises a control circuit 2, a power driving circuit 3 and a main control chip 1 arranged on the control circuit 2; a pin end of the main control chip 1 is sequentially connected with a diode D1, a voltage regulator tube Z1 and a triode Q1, and a resistor R1 is connected in parallel between the diode D1 and the voltage regulator tube Z1; one pin end of the control circuit 2 is connected with the resistor R1, the other pin end of the control circuit 2 is connected with the resistor R2 and the MOS transistor in parallel, and one pin end of the MOS transistor is electrically connected with the power driving circuit 3; a pin terminal of the transistor Q1 is connected to the resistor R2.

Referring to fig. 2, the power supply voltage of the control circuit 2 and the main control chip 1 passes through a diode D1, a voltage regulator tube Z1, a resistor R1, a triode Q1, a resistor R2 and a MOS transistor to obtain the primary power supply voltage of the power driving circuit 3, and the power supply voltage of the main control chip 1 exceeds 2.8V; the diode D1 adopts an IN4148 type diode, and the MOS tube adopts an FDN358P type MOS tube; one pin end of the triode Q1 is grounded GND, and the triode Q1 adopts a 2N2222A type triode; the resistor R1 and the resistor R2 are connected in parallel, the resistance of the resistor R1 is 3.3 kilo-ohms, and the resistance of the resistor R2 is 1 kilo-ohm.

Example one

The +5V power supply of the control circuit 2 is obtained by power conversion of 28V power supply, the +3.3V power supply of the main control chip 1 is obtained by power conversion of +5V power supply of the control circuit 2, and the +5V power supply and the +3.3V power supply of the main control chip 1 are controlled to obtain the +5V _ UP primary power supply of the power driving circuit 3 through a power supply time sequence management circuit; the power supply of the main control chip 1 is +3.3V, the power supply of the control circuit 2 is +5V, and the power drives the primary side to supply +5V _ UP; the specific implementation process is as follows:

the timing sequence management circuit is characterized in that when a product is electrified, a diode D1 has a clamping effect, and only when +3.3V builds up voltage to be more than 3V, namely the power supply voltage of the main control chip 1 is more than 2.8V to reliably work, the voltage of a voltage regulator tube Z1 is 3V, the voltage of the negative electrode of a voltage regulator tube Z1 is more than 3.7V, the voltage regulator tube Z1 is broken down, the triode Q1 is in saturated conduction, and the gate-source voltage VGS of a P-channel MOS tube is less than-3.7V at the moment; the MOS tube is conducted, the +5V power supply is generated inside the control circuit 2, and the +5V _ UP power supply is generated by the drain-source electrode of the MOS tube to supply power to the primary side of the power driving circuit 3; in the power-on process, the +5_ UP power supply of the primary side power supply of the power driving circuit 3 is ensured to supply power to the +3.3V output of the main control chip 1, and the driving state is ensured to be determined to be the closing state in the power-on process of the controller.

Example two

In the power-off process of the controller, the power supply voltage of +3.3V and +5V of the internal power supply of the control circuit 2 is monitored in real time:

when the voltage of +3.3V is more than 3V and the power supply voltage of the main control chip 1 is more than 2.8V, the main control chip can normally work, the diode D1 has a clamping effect, the voltage of the negative electrode of the voltage regulator tube Z1 is more than 3.7V, the voltage regulator tube Z1 is broken down, the triode Q1 is saturated and conducted, and the grid-source voltage VGS of the P-channel MOS tube is less than 0V; the MOS tube is conducted, and +5V and UP power supplies power inside the control circuit 2 and generated by a drain-source electrode and a source electrode of the MOS tube can still supply power to the primary side of the drive signal isolation optocoupler.

EXAMPLE III

When the voltage of +3.3V is less than 3V, the diode D1 clamps, the voltage of the cathode of the voltage regulator tube Z1 is less than 3.7V, the triode Q1 cuts off VBE <0.7V due to the voltage division function of the voltage regulator tube Z1, and the grid-source voltage VGS of the P-channel MOS tube is greater than 0V; the MOS tube is cut off, so that in the power failure process of the +3.3V voltage, the +5_ UP of the primary side power supply of the power driving circuit 3 is reliably cut off; because +5_ UP has no energy storage capacitor in the design, after the MOS tube is cut off, the primary side of the power driving circuit 3 supplies power without capacitance effect, the step is reduced to 0V, a driving logic signal can not pass through the driving optocoupler, the driving optocoupler has no energy to transmit current, and because the front stage and the rear stage of the power driving circuit 3 are both provided with reliable pull-down circuits, the inverter bridge is in a closed state; in the power-off process, the +5_ UP power supply of the primary power supply of the power driving circuit 3 is ensured to be prior to the +3.3V power-off of the power supply of the main control chip 1, and the driving state is ensured to be determined to be the closing state in the power-off process of the product.

In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; may be a mechanical connection; either directly or indirectly through intervening media, either internally or in any other relationship. The detachable installation mode has various modes, for example, a mode of matching with a buckle through plugging, for example, a mode of connecting through a bolt, and the like.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.