阅读说明：本技术 一种检测芯片裂缝的装置 (Device for detecting chip cracks ) 是由 胡伟国 胡贻升 于 2019-05-31 设计创作，主要内容包括：一种检测芯片裂缝的装置,以在实现裂片检测的同时,降低对功能电路造成的干扰。该装置包括：功能电路(110)以及位于功能电路(110)周围的裂片检测模块(120)。其中,裂片检测模块(120)包括前道器件层(121)和设置在前道器件层(121)上的层状结构(122),层状结构(122)中形成有导线(L),前道器件层(121)中形成有一个或多个第一电容(C1)。导线(L)的第一端用于连接电源正极,导线(L)的第二端用于连接电源负极,第一电容(C1)并联在导线(L)的第一端与导线(L)的第二端之间,导线(L)的第一端与第二端之间设置有检测接口,检测接口用于检测该芯片是否发生裂片。(A device for detecting chip cracks is used for reducing interference on a functional circuit while realizing crack detection. The device includes: the device comprises a functional circuit (110) and a splinter detection module (120) positioned around the functional circuit (110). The split detection module (120) comprises a front device layer (121) and a layered structure (122) arranged on the front device layer (121), wherein a lead (L) is formed in the layered structure (122), and one or more first capacitors (C1) are formed in the front device layer (121). The first end of wire (L) is used for connecting the power positive pole, and the second end of wire (L) is used for connecting the power negative pole, and first electric capacity (C1) connect in parallel between the first end of wire (L) and the second end of wire (L), is provided with the detection interface between the first end of wire (L) and the second end, and the detection interface is used for detecting whether this chip takes place the lobe of a leaf.)

An apparatus for detecting cracks in a chip, comprising: the split detection module is positioned around the functional circuit;

the lobe of a leaf detection module comprises a front device layer and a layered structure arranged on the front device layer, wherein a lead is formed in the layered structure, and one or more first capacitors are formed in the front device layer;

the chip comprises a chip, a first capacitor, a second capacitor, a detection interface and a chip, wherein the first end of the lead is used for being connected with the positive electrode of a power supply, the second end of the lead is used for being connected with the negative electrode of the power supply, the first capacitor is connected in parallel between the first end of the lead and the second end of the lead, and the detection interface is used for detecting whether the chip is cracked or not.

The apparatus of claim 1, wherein the conductive line comprises a first conductive line and a second conductive line;

wherein the first conductive line and the second conductive line both extend along a length direction of the layered structure, the first conductive line covers a thickness direction of the layered structure and a width direction of the layered structure, and the second conductive line covers the thickness direction of the layered structure and the width direction of the layered structure; the first conducting wire and the second conducting wire form a second capacitor;

the first end of first wire is used for connecting the power positive pole, the second end of first wire with the first end of second wire is connected, the second end of second wire is used for connecting the power negative pole, detection interface sets up on the line of the second end of first wire and the first end of second wire.

The apparatus of claim 2, wherein the first conductive lines are alternately spaced apart from the second conductive lines in a direction in which the first conductive lines and the second conductive lines extend.

The apparatus of claim 2 or 3, wherein the layered structure comprises at least three metal layers arranged in a stack;

the first wire is of a snake-shaped routing structure and comprises a first part, a second part and a third part, wherein the first part is located on a first metal layer and used for connecting two second parts adjacent to the first part, and the first metal layer is a metal layer adjacent to the front device layer in the layered structure; the second part is positioned on other metal layers except the first metal layer and the second metal layer, and the second metal layer is the metal layer which is farthest away from the previous device layer in the laminated structure; the third part is positioned on the second metal layer and is used for connecting two second parts adjacent to the third part;

the second wire is of a snake-shaped routing structure and comprises a fourth part, a fifth part and a sixth part, wherein the fourth part is located on the first metal layer and is used for connecting two adjacent fifth parts with the fourth part; the fifth part is positioned on other metal layers except the first metal layer and the second metal layer; the sixth part is positioned on the second metal layer and used for connecting two fifth parts adjacent to the sixth part;

the second parts and the fifth parts are alternately distributed at intervals in the extending direction of the first conducting wire and the second conducting wire; the first portion does not intersect the fourth portion, and the third portion does not intersect the sixth portion.

The apparatus according to claim 4, wherein portions of the second portions located adjacent to two of the metal layers are arranged to be shifted in a thickness direction of the layered structure;

and the parts of the fifth part, which are positioned at two adjacent metal layers, are arranged in a staggered manner in the thickness direction of the laminated structure.

The apparatus of claim 4 or 5, wherein the second portion is parallel to the fifth portion.

The apparatus of any one of claims 2-6, wherein the resistance of the first wire is greater than or equal to N times the resistance of the second wire, or wherein the resistance of the first wire is less than or equal to N times the resistance of the second wire, N being greater than or equal to 2.

The apparatus of any of claims 2-6, wherein the previous device layer further has a first resistor and a second resistor formed therein;

the second end of the first lead is connected with the first end of the first resistor, the second end of the first resistor is connected with the first end of the second resistor, and the second end of the second resistor is connected with the first end of the second lead; the detection interface is arranged on a connecting line of the second end of the first resistor and the first end of the second resistor.

The apparatus of claim 8, wherein the resistance of the first resistance is greater than or equal to N times the second resistance, or wherein the resistance of the first resistance is less than or equal to N times the second resistance, N being greater than or equal to 2.

The apparatus of claim 1, wherein the layered structure comprises at least three metal layers arranged in a stack;

the wire is of a snake-shaped routing structure and comprises a first part, a second part and a third part; the first part is positioned on a first metal layer and is used for connecting two second parts adjacent to the first part, and the first metal layer is a metal layer adjacent to the previous device layer in the laminated structure; the second part is positioned on other metal layers except the first metal layer and the second metal layer, and the second metal layer is the metal layer which is farthest away from the previous device layer in the laminated structure; the third part is located on the second metal layer and used for connecting two second parts adjacent to the third part, and the two adjacent second parts are parallel.

The apparatus of claim 10, wherein portions of the second portion located adjacent two of the metal layers are disposed in a staggered manner in a thickness direction of the layered structure.

The apparatus of any one of claims 1-11, wherein the detection interface comprises a first detection interface to measure a voltage of the first detection interface and a first end of the first wire and to measure a voltage of the first detection interface and a second end of the second wire.

The apparatus of claim 12, wherein the detection interface further comprises a second detection interface to connect to a digital splinter detection circuit.

The apparatus of claim 13, wherein the second detection interface is a joint test work group (JTAG) interface.

The apparatus of claim 13 or 14, wherein the digital splinter detection circuitry is disposed in the functional circuitry.

The apparatus of any one of claims 1-15, further comprising: and the sealing ring surrounds the outer side of the lobe detection module and is used for protecting the functional circuit and the lobe detection module.