阅读说明：本技术 一种电源故障上报方法 (Power failure reporting method ) 是由 刘琦 于 2021-08-31 设计创作，主要内容包括：本发明提供一种电源故障上报方法,基板管理控制器通常不访问电源供应单元的故障寄存器,只有当电源供应单元自身发送出故障报警信号之后,由现场可编程逻辑门阵列芯片通知基板管理控制器电源供应单元发生了故障,此时BMC才会通过基板管理控制器访问故障电源供应单元,收集故障信息上报日志。本发明的电源故障上报方法,大大减小了基板管理控制器与电源供应单元连接的I2C总线的繁忙,减少了基板管理控制器与英特尔管理引擎之间的I2C总线竞争,同时降低了基板管理控制器的CPU使用率。(The invention provides a power failure reporting method.A baseboard management controller does not usually access a failure register of a power supply unit, only after the power supply unit sends a failure alarm signal, a field programmable gate array chip informs the baseboard management controller that the power supply unit has a failure, and at the moment, a BMC (baseboard management controller) accesses the failure power supply unit through the baseboard management controller and collects failure information and reports logs. The power failure reporting method greatly reduces the busyness of the I2C bus connected between the baseboard management controller and the power supply unit, reduces I2C bus competition between the baseboard management controller and the Intel management engine, and reduces the CPU utilization rate of the baseboard management controller.)

1. A power failure reporting method is applied to a host system/a remote server system and is characterized in that the host system/the remote server system comprises a plurality of power supply units, a field programmable gate array chip and a substrate management controller, when a failure is monitored in the power supply units, signals are sent to the field programmable gate array chip, when the field programmable gate array chip receives a failure alarm signal sent by the power supply units, an interrupt signal is sent to inform the substrate management controller, after the substrate management controller receives the interrupt signal from the field programmable gate array chip, the failure information corresponding to the power supply units is collected, and the substrate management controller analyzes the collected failure information and records the failure information into a log file.

2. The method according to claim 1, wherein the Present pin of each power supply unit is connected to the fpga chip for timely feeding back the on-site variation of the power supply unit.

3. The method according to claim 1 or 2, wherein the fault alarm pin of each power supply unit is connected to the fpga chip, a GPIO pin of the fpga chip is used as an interrupt signal pin, the GPIO pin of the fpga chip is connected to the bmc for sending an interrupt signal to notify the bmc, the fpga chip is connected to the bmc through a Local Bus, and the power supply unit is connected to the bmc through an I2C Bus.

Technical Field

The invention belongs to the technical field of power supplies, and particularly relates to a power failure reporting method.

Background

The Baseboard Management Controller (BMC) is an independent board card on a server mainboard, is provided with an independent processor and a control system, communicates with host hardware or a host system through interfaces such as IPMB (intelligent platform management bus), LPC (low-pin-count-interface), SMBus (system management bus) and the like, and provides functions such as query and control for a local host/remote server through interfaces such as a network, a serial/modem and a PCI (peripheral component interconnect).

With the diversity of the combination of the components of the server, more and more servers require greater power consumption to meet the traffic load of the client. The power supply unit is called a PSU or a power supply for short, and is an electric energy conversion type power supply (different from a battery-powered type power supply) of a computer, and is responsible for converting standard alternating current into low-voltage stable direct current for other components in the computer. At present, common power supplies are switching power supplies, and input voltage automatically adapts to commercial power parameters of places where the users are located. On one hand, the power supply capacity of a single PSU needs to be improved, and on the other hand, the number of PSUs needs to be increased to support the requirement of high-load service.

When the traffic load is satisfied by increasing the number of PSUs, an excessive number of PSU devices are mounted on the I2C bus. Meanwhile, if the server is developed based on the Intel platform, there will be a pch (platform Controller hub), i.e., Intel integrated south bridge. At this time, an ME (management engine) exists inside the PCH, and the ME is also connected to the PSU using I2C, and at this time, BMC and ME 2 masters and PSUs exist on the I2C bus. The PSU registers are various (state, voltage, current, power consumption and the like), the BMC usually collects relevant register data (PSU manufacturers, PSU models, PSU states, EEPROM and the like) of the PSU in a polling mode, and when the number of PSUs or the collection of relevant registers of the PSU is large, double-master competition exists between the BMC and the ME on an I2C bus, so that the probability of I2C access failure is increased; on the other hand, the BMC access to the PSU usually uses a round-robin method, which occupies more BMC resources.

Disclosure of Invention

The present invention aims to solve the above technical problems and provides a power failure reporting method.

In order to achieve the purpose, the invention adopts the following technical scheme:

a power failure reporting method is applied to a host system/a remote server system, wherein the host system/the remote server system comprises a plurality of power supply units, a field programmable gate array chip and a substrate management controller, when the power supply units monitor a failure, signals are sent to the field programmable gate array chip, when the field programmable gate array chip receives a failure alarm signal sent by the power supply units, an interrupt signal is sent to inform the substrate management controller, the substrate management controller collects failure information corresponding to the power supply units after receiving the interrupt signal from the field programmable gate array chip, and the substrate management controller analyzes and records the failure information into a log file according to the collected failure information.

Preferably, the Present pin of each power supply unit is connected to the fpga chip for timely feeding back the on-site variation of the power supply unit.

Preferably, the fault alarm pin of each power supply unit is connected with a field programmable gate array chip, one GPIO pin of the field programmable gate array chip is used as an interrupt signal pin, the GPIO pin of the field programmable gate array chip is connected with a substrate management controller for sending an interrupt signal to notify the substrate management controller, the field programmable gate array chip is connected with the substrate management controller through a Local Bus, and the power supply unit is connected with the substrate management controller through an I2C Bus.

After the technical scheme is adopted, the invention has the following advantages:

the prior art bmc always polls the fault register of each power supply unit to sense whether there is a fault transmission, and consumes the resources of the bmc, while competing with the intel management engine on the I2C bus. In the power failure reporting method of the invention, the baseboard management controller does not usually access the failure register of the power supply unit, and only after the power supply unit sends out the failure alarm signal, the on-site programmable gate array chip informs the baseboard management controller that the power supply unit has a failure, and at this time, the BMC accesses the failure power supply unit through the baseboard management controller and collects the failure information to report the log.

The power failure reporting method greatly reduces the busyness of the I2C bus connected between the baseboard management controller and the power supply unit, reduces I2C bus competition between the baseboard management controller and the Intel management engine, and reduces the CPU utilization rate of the baseboard management controller.

Drawings

Fig. 1 is a schematic structural diagram of a host system/remote server system using the power failure reporting method of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the following drawings and specific examples.

A power failure reporting method is applied to a host system/a remote server system, as shown in FIG. 1, the host system/the remote server system includes a plurality of power supply units, a field programmable gate array chip, a substrate management controller, and an Intel management engine. The power supply unit is PSU, the field programmable gate array chip is FPGA, the substrate management controller is BMC, and the Intel management engine is ME.

And when the power supply unit internally monitors a fault, a signal is sent to the field programmable gate array chip. The Present pin of each power supply unit is connected with the field programmable logic gate array chip for timely feeding back the in-place change of the power supply unit.

When the field programmable gate array chip receives the fault alarm signal sent by the power supply unit, an interrupt signal is sent to inform the substrate management controller, the substrate management controller collects fault information corresponding to the power supply unit after receiving the interrupt signal from the field programmable gate array chip, and the substrate management controller analyzes and records the fault information into a log file according to the collected fault information.

The GPIO pin of the field programmable gate array chip is used as an interrupt signal pin, the GPIO pin of the field programmable gate array chip is connected with the substrate management controller and used for sending an interrupt signal to inform the substrate management controller, the field programmable gate array chip is connected with the substrate management controller through a Local Bus, and the power supply unit is connected with the substrate management controller through an I2C Bus.

When any power supply unit fails, the fault alarm Alert signal can be reported to the FPGA, and the FPGA distinguishes various interrupt signal sources, collects the interrupt signals and then simulates the interrupt signals through a certain GPIO pin to send the interrupt signals to the BMC (for example, the falling edge of a certain IO is used as a simulated interrupt signal). The baseboard management controller BMC receives the interrupt signal, accesses the field programmable gate array chip FPGA through a Local Bus main line to inquire the interrupt type, immediately accesses the fault power supply unit PSU through an I2C Bus after recognizing that the type of the power supply unit PSU is interrupted, collects fault register information, analyzes the fault register information and reports a log.

The prior art bmc always polls the fault register of each power supply unit to sense whether there is a fault transmission, and consumes the resources of the bmc, while competing with the intel management engine on the I2C bus. In the power failure reporting method of the invention, the baseboard management controller does not usually access the failure register of the power supply unit, and only after the power supply unit sends out the failure alarm signal, the on-site programmable gate array chip informs the baseboard management controller that the power supply unit has a failure, and at this time, the BMC accesses the failure power supply unit through the baseboard management controller and collects the failure information to report the log.

The power failure reporting method greatly reduces the busyness of the I2C bus connected between the baseboard management controller and the power supply unit, reduces I2C bus competition between the baseboard management controller and the Intel management engine, and reduces the CPU utilization rate of the baseboard management controller.

In this embodiment, the PSU model is PSR800-12A, and the BMC model is AST 2500.

Other embodiments of the present invention than the preferred embodiments described above will be apparent to those skilled in the art from the present invention, and various changes and modifications can be made therein without departing from the spirit of the present invention as defined in the appended claims.