Electronic device, method for manufacturing electronic device, and vapor deposition mask set

文档序号:1940444 发布日期:2021-12-07 浏览:18次 中文

阅读说明:本技术 电子器件、电子器件的制造方法和蒸镀掩模组 (Electronic device, method for manufacturing electronic device, and vapor deposition mask set ) 是由 池永知加雄 井上功 中村阳子 于 2021-06-03 设计创作,主要内容包括:本发明涉及电子器件、电子器件的制造方法和蒸镀掩模组。电子器件的制造方法具备下述工序:准备工序,准备层积体,该层积体包含具有第1面和位于第1面的相反侧的第2面的基板、位于基板的第1面上的2个以上的第1电极、和第1电极上的有机层;第2电极形成工序,按照沿着基板的第1面的法线方向观察时重叠在2个以上的第1电极上的方式,在有机层上形成第2电极;和除去工序,将第2电极中俯视时位于第1电极之间的区域局部性除去。(The invention relates to an electronic device, a method of manufacturing the electronic device, and an evaporation mask set. The method for manufacturing an electronic device comprises the steps of: a preparation step of preparing a laminate including a substrate having a 1 st surface and a 2 nd surface located on the opposite side of the 1 st surface, 2 or more 1 st electrodes located on the 1 st surface of the substrate, and an organic layer on the 1 st electrode; a 2 nd electrode forming step of forming a 2 nd electrode on the organic layer so as to be superimposed on 2 or more 1 st electrodes when viewed along a normal direction of a 1 st surface of the substrate; and a removing step of locally removing a region located between the 1 st electrodes in a 2 nd electrode in a plan view.)

1. A method for manufacturing an electronic device, comprising the steps of:

a preparation step of preparing a laminate including a substrate having a 1 st surface and a 2 nd surface located on the opposite side of the 1 st surface, 2 or more 1 st electrodes located on the 1 st surface of the substrate, and an organic layer on the 1 st electrodes;

a 2 nd electrode forming step of forming a 2 nd electrode on the organic layer so as to overlap 2 or more of the 1 st electrodes when viewed along a normal direction of the 1 st surface of the substrate; and

and a removing step of locally removing a region of the 2 nd electrode which does not overlap with the 1 st electrode in a plan view.

2. The method for manufacturing an electronic device according to claim 1, wherein the removing step locally removes a region located between the 1 st electrodes in a plan view of the 2 nd electrodes.

3. The method for manufacturing an electronic device according to claim 1, wherein the removing step includes an irradiation step of irradiating the 2 nd electrode with laser light to form a 2 nd electrode opening.

4. The method for manufacturing an electronic device according to claim 3, wherein the irradiation step includes a step of irradiating the 2 nd electrode with laser light through a through hole of a laser mask to form a 2 nd electrode opening.

5. The method of manufacturing an electronic device according to claim 3, wherein the 2 nd electrode includes a side facing the 2 nd electrode opening,

the height of the side surface of the 2 nd electrode is larger than the thickness of a region overlapping with the 1 st electrode in a plan view in the 2 nd electrode.

6. The method for manufacturing an electronic device according to claim 5, wherein a height of the side surface of the 2 nd electrode is 1.1 times or more a thickness of a region overlapping with the 1 st electrode in a plan view of the 2 nd electrode.

7. The method for manufacturing an electronic device according to any one of claims 3 to 6, comprising a step of forming a protective layer that overlaps the 2 nd electrode and the 2 nd electrode opening in a plan view.

8. The method of manufacturing an electronic device according to any one of claims 3 to 6, wherein the irradiation step includes a step of irradiating a region overlapping with the 2 nd electrode opening in a plan view in the organic layer with laser light to form an organic layer opening.

9. The method for manufacturing an electronic device according to claim 8, wherein a width of a side surface of the organic layer facing the organic layer opening is 2.0 μm or less.

10. The method for manufacturing an electronic device according to any one of claims 1 to 6, wherein the organic layer of the laminate comprises a 1 st organic layer and a 2 nd organic layer which overlap each other at a position which does not overlap the 1 st electrode in a plan view,

the removing step includes a step of removing at least partially the 1 st organic layer and the 2 nd organic layer which overlap each other.

11. The method for manufacturing an electronic device according to any one of claims 1 to 6, wherein the laminate comprises organic layer openings between 2 adjacent organic layers in a plan view,

the 2 nd electrode forming step of forming the 2 nd electrode so that the 2 nd electrode overlaps the organic layer and the organic layer opening in a plan view,

the removing step partially removes a region overlapping the organic layer opening in a plan view of the 2 nd electrode.

12. The method for manufacturing an electronic device according to any one of claims 1 to 6, wherein the laminate comprises an insulating layer between the 1 st electrodes in a plan view.

13. The method for manufacturing an electronic device according to claim 12, wherein the removing step includes a step of removing the insulating layer locally.

14. The method of manufacturing an electronic device according to any one of claims 1 to 6, wherein the preparation step includes a step of evaporating a material of the organic layer onto the 1 st electrode through a through hole of an evaporation mask.

15. An electronic device is provided with:

a substrate having a 1 st surface and a 2 nd surface located on an opposite side of the 1 st surface;

more than 21 st electrodes on the 1 st surface of the substrate;

an organic layer on the 1 st electrode; and

a 2 nd electrode which is located on the organic layer and is developed so as to overlap 2 or more of the 1 st electrodes in a plan view,

the 2 nd electrode includes a 2 nd electrode opening that does not overlap with the 1 st electrode in a plan view, and a side surface facing the 2 nd electrode opening,

the height of the side surface of the 2 nd electrode is larger than the average thickness of the 2 nd electrode in the area overlapping with the 1 st electrode in a plan view.

16. The electronic device according to claim 15, wherein a height of the side surface of the 2 nd electrode is 1.1 times or more an average value of thicknesses of regions overlapping with the 1 st electrode in a plan view.

17. The electronic device of claim 15, wherein the 2 nd electrode opening is surrounded by the 2 nd electrode in a top view.

18. The electronic device of claim 15, wherein an upper end of the side of the 2 nd electrode has a contour that surrounds the 2 nd electrode opening in a plan view.

19. The electronic device according to claim 18, wherein the 2 nd electrode includes a base portion having a contour that surrounds a contour of an upper end of the side of the 2 nd electrode in a plan view,

the thickness of the 2 nd electrode at the base is 1.05 times the average of the thicknesses of the regions overlapping with the 1 st electrode in plan view.

20. The electronic device according to any one of claims 15 to 19, which is provided with a protective layer that overlaps the 2 nd electrode and the 2 nd electrode opening in a plan view.

21. The electronic device according to claim 20, wherein a surface of the protective layer overlapping the 2 nd electrode opening is located between a surface of the 2 nd electrode overlapping the 1 st electrode and the 1 st face in a thickness direction of the substrate.

22. The electronic device according to claim 20, wherein a surface of the 2 nd electrode overlapping with the 1 st electrode is located between a surface of the protective layer overlapping with the 2 nd electrode opening and the 1 st face in a thickness direction of the substrate.

23. The electronic device of any of claims 15-19, wherein the organic layer comprises an organic layer opening that overlaps the 2 nd electrode opening when viewed from above.

24. The electronic device of claim 23, wherein the organic layer comprises a side facing the organic layer opening,

an upper end of the side of the organic layer is in contact with a lower end of the side of the 2 nd electrode.

25. The electronic device of claim 24, wherein the width of the side of the organic layer is 2.0 μ ι η or less.

26. The electronic device of any of claims 15-19, wherein the organic layer comprises an organic layer opening that overlaps a portion of the 2 nd electrode and the 2 nd electrode opening when viewed from above.

27. The electronic device of claim 26, wherein the organic layer comprises a side facing the organic layer opening,

the 2 nd electrode overlaps with the side surface of the organic layer in a plan view.

28. The electronic device according to any one of claims 15 to 19, which comprises an insulating layer having a 1 st opening of the insulating layer overlapping with the 1 st electrode in a plan view, and is located between the 1 st surface of the substrate and the organic layer in a normal direction of the 1 st surface of the substrate.

29. The electronic device of claim 28, wherein the insulating layer includes an insulating layer 2 nd opening located between the 1 st electrodes and overlapping the 2 nd electrode opening when viewed from above.

30. A vapor deposition mask set comprising 2 or more vapor deposition masks,

the vapor deposition mask is provided with a shielding region and a through hole,

the mask layer laminate formed by overlapping 2 or more vapor deposition masks includes overlapping shielding regions in which the shielding regions of the vapor deposition masks overlap each other.

Technical Field

Embodiments of the present invention relate to an electronic device, a method of manufacturing an electronic device, and an evaporation mask set.

Background

The display device used in a portable device such as a smartphone or a tablet computer is preferably high-definition, and the pixel density is preferably 400ppi or more, for example. In addition, in portable devices, there is an increasing demand for Ultra High Definition (UHD), and in this case, the pixel density of the display device is preferably 800ppi or more, for example.

Among display devices, organic EL display devices have attracted attention because of their good responsiveness, low power consumption, and high contrast. As a method of forming pixels of an organic EL display device, a method of forming pixels or electrodes in a desired pattern using a vapor deposition mask in which through holes arranged in a desired pattern are formed is known. For example, first, a substrate on which the 1 st electrode is formed in a pattern corresponding to a pixel is prepared. Next, an organic material is attached to the 1 st electrode through the through hole of the vapor deposition mask, and a light-emitting layer is formed on the 1 st electrode. Next, a conductive material is attached to the light-emitting layer through the through hole of the vapor deposition mask, and a 2 nd electrode is formed on the light-emitting layer.

Documents of the prior art

Patent document

Patent document 1: japanese laid-open patent publication No. 9-115672

Disclosure of Invention

Problems to be solved by the invention

As types of the 2 nd electrode in the organic EL display device, a type in which the 2 nd electrode is developed over the entire area of the substrate and a type in which the 2 nd electrode is formed so as to have an area on the substrate where the 2 nd electrode is not present may be considered. In the latter case, a method of appropriately controlling the shape of the 2 nd electrode in a plan view is required.

Means for solving the problems

A method for manufacturing an electronic device according to an embodiment of the present invention includes the steps of: a preparation step of preparing a laminate including a substrate having a 1 st surface and a 2 nd surface located on the opposite side of the 1 st surface, 2 or more 1 st electrodes located on the 1 st surface of the substrate, and an organic layer on the 1 st electrode; a 2 nd electrode forming step of forming a 2 nd electrode on the organic layer so as to overlap 2 or more 1 st electrodes when viewed along a normal direction of a 1 st surface of the substrate; and a removing step of locally removing a region of the 2 nd electrode which does not overlap with the 1 st electrode in a plan view.

Effects of the invention

According to the present invention, the shape of the 2 nd electrode in a plan view can be appropriately controlled.

Drawings

Fig. 1 is a cross-sectional view showing an example of an electronic device according to an embodiment of the present invention.

Fig. 2 is a cross-sectional view showing the electronic device of fig. 1 in an enlarged scale.

Fig. 3 is a plan view showing the electronic device of fig. 1 in an enlarged manner.

Fig. 4A is a cross-sectional view showing the electronic device of fig. 2 further enlarged.

Fig. 4B is a cross-sectional view showing the 2 nd electrode of fig. 4A in an enlarged manner.

Fig. 4C is a diagram for explaining a method of calculating an average value of the thickness of the 2 nd electrode.

Fig. 4D is a plan view showing an example of the 2 nd electrode.

Fig. 5 is a cross-sectional view showing an example of the substrate in a state where the 1 st electrode is formed.

Fig. 6 is a plan view showing an example of the substrate in a state where the 1 st electrode is formed.

Fig. 7 is a cross-sectional view showing an example of a substrate in a state where the 1 st electrode and the organic layer are formed.

Fig. 8 is a plan view showing an example of a substrate in a state where the 1 st electrode and the organic layer are formed.

Fig. 9 is a cross-sectional view showing an example of a step of forming the 1 st organic layer.

Fig. 10 is a cross-sectional view showing an example of a step of forming the 2 nd organic layer.

Fig. 11 is a sectional view showing an example of a step of forming a 2 nd organic layer.

Fig. 12 is a sectional view showing an example of a step of forming the 2 nd electrode.

Fig. 13 is a plan view showing an example of a step of forming the 2 nd electrode.

Fig. 14 is a sectional view showing an example of a step of partially removing the 2 nd electrode.

Fig. 15 is a view showing an example of a step of irradiating the 2 nd electrode with laser light.

Fig. 16 is a diagram showing an example of laser light including pulses.

Fig. 17 is a cross-sectional view showing an example of an electronic device according to an embodiment of the present invention.

Fig. 18A is a sectional view showing elements of the electronic device of fig. 17 further enlarged.

Fig. 18B is a cross-sectional view showing an example of an element of the electronic device of fig. 17.

Fig. 19 is a cross-sectional view showing an example of the substrate in a state where the insulating layer and the 1 st electrode are formed.

Fig. 20 is a plan view showing an example of the substrate in a state where the insulating layer and the 1 st electrode are formed.

Fig. 21 is a cross-sectional view showing an example of a substrate in a state where an insulating layer, a 1 st electrode, and an organic layer are formed.

Fig. 22 is a sectional view showing an example of a step of forming the 2 nd electrode.

Fig. 23 is a sectional view showing an example of a step of partially removing the 2 nd electrode.

Fig. 24A is a cross-sectional view showing an example of an electronic device according to an embodiment of the present invention.

Fig. 24B is a cross-sectional view showing an example of an electronic device according to an embodiment of the present invention.

Fig. 25 is a cross-sectional view showing an example of an electronic device according to an embodiment of the present invention.

Fig. 26 is a cross-sectional view showing an example of a substrate in a state where an insulating layer and a 1 st electrode are formed.

Fig. 27 is a sectional view showing an example of a step of forming the 2 nd electrode.

Fig. 28 is a sectional view showing an example of a step of partially removing the 2 nd electrode.

Fig. 29 is a plan view showing an example of the 1 st vapor deposition mask.

Fig. 30 is a plan view showing an example of the 2 nd vapor deposition mask.

Fig. 31 is a plan view showing an example of the 3 rd vapor deposition mask.

Fig. 32 is a plan view showing an example of the mask layered body.

Fig. 33 is a plan view showing an organic layer formed by using the vapor deposition mask of fig. 29 to 31.

Fig. 34 is a plan view showing an example of the 2 nd electrode formed on the organic layer of fig. 33.

Fig. 35 is a plan view showing an example of a 2 nd electrode opening formed in the 2 nd electrode.

Fig. 36 is a cross-sectional view of the electronic device of fig. 35 viewed along the line XXXVI-XXXVI.

Fig. 37 is a plan view showing an example of an electronic device according to an embodiment of the present invention.

Fig. 38 is a plan view showing an enlarged view of the 2 nd display region of the electronic device of fig. 37.

Fig. 39 is a plan view showing an example of the 1 st display region.

Fig. 40 is a plan view showing an example of the 2 nd display region.

Fig. 41 is a plan view showing an example of the organic layer in the 2 nd display region.

Detailed Description

In the present specification and the drawings, unless otherwise specified, terms indicating a substance which is a base of a certain structure, such as "substrate", "base material", "plate", "sheet", or "film", are not distinguished from each other only by name.

In the present specification and the drawings, unless otherwise specified, terms such as "parallel" and "orthogonal" and the like, and values of length and angle, which define the shape, the geometric condition, and the degree thereof, are not limited to strict meanings, but are interpreted to include ranges of degrees to which the same function can be expected.

In the present specification and the drawings, unless otherwise specified, the case where a certain structure such as a certain component or a certain region is located "on" or "under", "above" or "below" or "above" or "below" another structure such as another component or another region includes the case where a certain structure is in direct contact with another structure. Further, the present invention also includes a case where another structure is included between a certain structure and another structure, that is, a case where the structure is indirectly in contact with the other structure. Unless otherwise specified, the up-down direction may be reversed in terms of "up", "upper" or "lower", "lower" or "lower".

In the present specification and the drawings, the same or similar components or components having the same functions are denoted by the same reference numerals or similar components unless otherwise specified, and their redundant description may be omitted. For convenience of explanation, the dimensional ratio of the drawings may be different from the actual ratio, and a part of the structure may be omitted from the drawings.

In the present specification and the present drawings, one embodiment of the present specification may be combined with other embodiments within a range that does not contradict unless otherwise specified. Other embodiments may be combined with each other within a range not contradictory.

In the present specification and the present drawings, unless otherwise specified, when a plurality of steps are disclosed with respect to a method such as a manufacturing method, other steps not disclosed may be performed between the disclosed steps. The order of the steps disclosed is arbitrary within a range not inconsistent with each other.

In the present specification and the drawings, unless otherwise specified, the numerical range indicated by the symbols "to" includes numerical values placed before and after the symbols "to". For example, the numerical range defined by the expression "34 to 38% by mass" is the same as the numerical range defined by the expression "34% by mass or more and 38% by mass or less".

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. The embodiments described below are examples of the embodiments of the present invention, and the present invention is not limited to these embodiments.

The 1 st aspect of the present invention relates to a method for manufacturing an electronic device, including the steps of:

a preparation step of preparing a laminate including a substrate having a 1 st surface and a 2 nd surface located on the opposite side of the 1 st surface, 2 or more 1 st electrodes located on the 1 st surface of the substrate, and an organic layer on the 1 st electrodes;

a 2 nd electrode forming step of forming a 2 nd electrode on the organic layer so as to overlap 2 or more of the 1 st electrodes when viewed along a normal direction of the 1 st surface of the substrate; and

and a removing step of locally removing a region of the 2 nd electrode which does not overlap with the 1 st electrode in a plan view.

In the 2 nd aspect of the present invention, in the method for manufacturing an electronic device according to the 1 st aspect, the removing step may locally remove a region located between the 1 st electrodes in a plan view of the 2 nd electrode.

In the 3 rd aspect of the present invention, in the method for manufacturing each electronic device according to the 1 st or 2 nd aspect, the removing step may include an irradiating step of irradiating the 2 nd electrode with laser light to form a 2 nd electrode opening.

In the 4 th aspect of the present invention, in the method for manufacturing an electronic device according to the 3 rd aspect, the irradiation step includes a step of irradiating the 2 nd electrode with laser light through a through hole of a laser mask to form a 2 nd electrode opening.

In the 5 th aspect of the present invention, in the method for manufacturing each electronic device according to the 3 rd or 4 th aspect, the 2 nd electrode may include a side surface facing the 2 nd electrode opening,

the height of the side surface of the 2 nd electrode may be larger than the thickness of a region overlapping with the 1 st electrode in a plan view of the 2 nd electrode.

In the 6 th aspect of the present invention, in the method for manufacturing an electronic device according to the 5 th aspect, a height of the side surface of the 2 nd electrode may be 1.1 times or more a thickness of a region overlapping with the 1 st electrode in a plan view of the 2 nd electrode.

In the 7 th aspect of the present invention, in the method for manufacturing each of the electronic devices according to the 3 rd to 6 th aspects, the method may further include a step of forming a protective layer that overlaps the 2 nd electrode and the 2 nd electrode opening in a plan view.

In the 8 th aspect of the present invention, in the method for manufacturing each of the electronic devices according to the 3 rd to 7 th aspects, the irradiation step may include a step of irradiating a region overlapping with the 2 nd electrode opening in a plan view of the organic layer with laser light to form an organic layer opening.

In a 9 th aspect of the present invention, in the method for manufacturing an electronic device according to the 8 th aspect, a width of a side surface of the organic layer facing the opening of the organic layer may be 2.0 μm or less.

In the 10 th aspect of the present invention, in the method for manufacturing each of the electronic devices according to the 1 st to 9 th aspects, the organic layer of the laminate may include a 1 st organic layer and a 2 nd organic layer that overlap each other at a position that does not overlap the 1 st electrode in a plan view,

the removing step may include a step of removing at least a part of the 1 st organic layer and the 2 nd organic layer which overlap each other.

In the 11 th aspect of the present invention, in the method for manufacturing each of the electronic devices according to the 1 st to 7 th aspects, the laminate may include an organic layer opening located between 2 adjacent organic layers in a plan view, the 2 nd electrode forming step may form the 2 nd electrode so that the 2 nd electrode overlaps with the organic layer and the organic layer opening in a plan view, and the removing step may locally remove a region overlapping with the organic layer opening in a plan view of the 2 nd electrode.

In the 12 th aspect of the present invention, in the method for manufacturing each of the electronic devices according to the 1 st to 11 th aspects, the laminate may include an insulating layer located between the 1 st electrodes in a plan view.

In the 13 th aspect of the present invention, in the method for manufacturing an electronic device according to the 12 th aspect, the removing step may include a step of partially removing the insulating layer.

In the 14 th aspect of the present invention, in the method for manufacturing each of the electronic devices according to the 1 st to 13 th aspects, the preparation step may include a step of depositing a material of the organic layer on the 1 st electrode through a through hole of a deposition mask.

The 15 th aspect of the present invention relates to an electronic device including:

a substrate having a 1 st surface and a 2 nd surface located on the opposite side of the 1 st surface;

at least 21 st electrodes located on the 1 st surface of the substrate;

an organic layer on the 1 st electrode; and

a 2 nd electrode which is located on the organic layer and is developed so as to be overlapped on 2 or more of the 1 st electrodes in a plan view,

the 2 nd electrode includes a 2 nd electrode opening which is not overlapped with the 1 st electrode in a plan view and a side surface facing the 2 nd electrode opening,

the height of the side surface of the 2 nd electrode is larger than the average thickness of the 2 nd electrode in the region overlapping with the 1 st electrode in a plan view.

In the 16 th aspect of the present invention, in the electronic device according to the 15 th aspect, a height of the side surface of the 2 nd electrode may be 1.1 times or more an average value of a thickness of a region overlapping with the 1 st electrode in a plan view.

In the 17 th aspect of the present invention, in each of the electronic devices according to the 15 th aspect or the 16 th aspect, the 2 nd electrode opening may be surrounded by the 2 nd electrode in a plan view.

In the 18 th aspect of the present invention, in each of the electronic devices according to the 15 th to 17 th aspects, an upper end of the side surface of the 2 nd electrode may have a contour surrounding the 2 nd electrode opening in a plan view.

In a 19 th aspect of the present invention, in the electronic device according to the 18 th aspect, the 2 nd electrode may include a base portion having a contour surrounding a contour of an upper end of the side surface of the 2 nd electrode in a plan view, and a thickness of the 2 nd electrode at the base portion may be 1.05 times an average value of thicknesses of regions overlapping with the 1 st electrode in a plan view.

In the 20 th aspect of the present invention, in each of the electronic devices according to the 15 th to 19 th aspects, the electronic device may include a protective layer that overlaps the 2 nd electrode and the 2 nd electrode opening in a plan view.

In the 21 st aspect of the present invention, in the electronic device according to the 20 th aspect, a surface of the protective layer overlapping the 2 nd electrode opening may be positioned between a surface of the 2 nd electrode overlapping the 1 st electrode and the 1 st surface in a thickness direction of the substrate.

In the 22 nd aspect of the present invention, in the electronic device according to the 20 th aspect, a surface of the 2 nd electrode overlapping with the 1 st electrode may be positioned between a surface of the protective layer overlapping with the 2 nd electrode opening and the 1 st surface in a thickness direction of the substrate.

In the 23 th aspect of the present invention, in each of the electronic devices according to the 15 th to 22 th aspects, the organic layer may include an organic layer opening overlapping with the 2 nd electrode opening in a plan view.

In the 24 th aspect of the present invention, in the electronic device according to the 23 th aspect, the organic layer may include a side surface facing the opening of the organic layer,

an upper end of the side surface of the organic layer may be in contact with a lower end of the side surface of the 2 nd electrode.

In the 25 th aspect of the present invention, in the electronic device according to the 24 th aspect, a width of the side surface of the organic layer may be 2.0 μm or less.

In the 26 th aspect of the present invention, in each of the electronic devices according to the 15 th to 22 th aspects, the organic layer may include an organic layer opening overlapping the 2 nd electrode opening and a part of the 2 nd electrode in a plan view.

In the 27 th aspect of the present invention, in the electronic device according to the 26 th aspect, the organic layer may include a side surface facing the opening of the organic layer, and the 2 nd electrode may overlap the side surface of the organic layer in a plan view.

In the 28 th aspect of the present invention, each of the electronic devices according to the 15 th to 27 th aspects may include an insulating layer which may include a 1 st opening of the insulating layer overlapping the 1 st electrode in a plan view and which is located between the 1 st surface of the substrate and the organic layer in a direction normal to the 1 st surface of the substrate.

In the 29 th aspect of the present invention, in the electronic device according to the 28 th aspect, the insulating layer may include a 2 nd opening of the insulating layer which is located between the 1 st electrodes in a plan view and overlaps the 2 nd electrode opening.

The 30 th aspect of the present invention relates to a vapor deposition mask set,

it is provided with more than 2 pieces of vapor deposition masks,

the vapor deposition mask includes a shielding region and a through hole,

the mask layer laminate formed by stacking 2 or more vapor deposition masks includes a stacked shielding region in which the shielding regions of the vapor deposition masks are stacked.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. The embodiments described below are examples of the embodiments of the present invention, and the present invention is not limited to these embodiments.

Fig. 1 is a cross-sectional view showing an example of an electronic device 10. The electronic device 10 may include: a substrate 15 including a 1 st surface 16 and a 2 nd surface 17; and a plurality of elements 20 arranged along the in-plane direction of the 1 st surface 16 of the substrate 15. Although not shown, the elements 20 may be arranged in the depth direction of fig. 1. The element 20 may have: more than 21 st electrodes 30 located on the 1 st face 16; more than 2 organic layers 40 on the 1 st electrode 30; and a 2 nd electrode 50 positioned on the organic layer 40. The 1 st electrode 30 may be an anode and the 2 nd electrode 50 may be a cathode. Alternatively, the 1 st electrode 30 may be a cathode and the 2 nd electrode 50 may be an anode.

The electronic device 10 may be of the active matrix type. For example, although not shown, the electronic device 10 may include switches electrically connected to the plurality of elements 20, respectively. The switch is, for example, a transistor. The switch can control on/off of a voltage applied to the element 20 or a current flowing through the element 20.

The substrate 15 may be a plate-like member having insulation properties. The substrate 15 preferably has transparency to transmit light. The substrate 15 is, for example, glass. Although not shown, the wiring layer may be located between the substrate 15 and the element 20. The wiring layer can transmit electric signals, power, and the like to the element 20.

The element 20 is constituted by: a certain function is realized by applying a voltage between the 1 st electrode 30 and the 2 nd electrode 50 or passing a current between the 1 st electrode 30 and the 2 nd electrode 50.

The 1 st electrode 30 contains a material having conductivity. For example, the 1 st electrode 30 includes a metal, a metal oxide having conductivity, or other inorganic materials. The 1 st electrode 30 may include a metal oxide having transparency and conductivity such as indium tin oxide.

The organic layer 40 includes an organic material. When the organic layer 40 is energized, the organic layer 40 can exert a certain function. The energization means applying a voltage to the organic layer 40 or passing a current through the organic layer 40. As the organic layer 40, a light-emitting layer which emits light by energization, a layer which changes the transmittance or refractive index of light by energization, or the like can be used. The organic layer 40 may include an organic semiconductor material. When the organic layer 40 is a light-emitting layer, when a voltage is applied between the 1 st electrode 30 and the 2 nd electrode 50 to cause a current to flow through the organic layer 40, light is emitted from the organic layer 40, and light is extracted from the 2 nd electrode 50 side or the 1 st electrode 30 side to the outside.

In the case where the organic layer 40 includes a light emitting layer that emits light by being energized, the organic layer 40 may further include a hole injection layer, a hole transport layer, an electron injection layer, and the like.

For example, in the case where the 1 st electrode 30 is an anode, the organic layer 40 may have a hole injection transport layer between the light emitting layer and the 1 st electrode 30. The hole injection transport layer may be a hole injection layer having a hole injection function, a hole transport layer having a hole transport function, or both of the hole injection function and the hole transport function. The hole injection transport layer may be a layer in which a hole injection layer and a hole transport layer are laminated.

In the case where the 2 nd electrode 50 is a cathode, the organic layer 40 may have an electron injection transport layer between the light emitting layer and the 2 nd electrode 50. The electron injection transport layer may be an electron injection layer having an electron injection function, an electron transport layer having an electron transport function, or both of the electron injection function and the electron transport function. The electron injection/transport layer may be a layer in which the electron injection layer and the electron transport layer are laminated.

The light-emitting layer contains a light-emitting material. The light-emitting layer may comprise additives that improve leveling.

As the light-emitting material, a known material can be used, and for example, a light-emitting material such as a dye-based material, a metal complex-based material, or a polymer-based material can be used.

Examples of the coloring material include cyclopentadiene derivatives, tetraphenylbutadiene derivatives, triphenylamine derivatives, oxadiazole derivatives, pyrazoloquinoline derivatives, distyrylbenzene derivatives, distyrylarylene derivatives, silole derivatives, thiophene ring compounds, pyridine ring compounds, perinone derivatives, perylene derivatives, oligothiophene derivatives, oxadiazole dimers, and pyrazoline dimers.

Examples of the metal complex material include metal complexes having a central metal such as aluminum hydroxyquinoline complex, beryllium benzohydroxyquinoline complex, zinc benzoxazole complex, zinc benzothiazolate complex, zinc azomethylzinc complex, zinc porphyrin complex, and europium complex with Al, Zn, Be, or a rare earth metal such as Tb, Eu, and Dy, and a ligand with an oxadiazole, thiadiazole, phenylpyridine, phenylbenzimidazole, quinoline structure, or the like.

As the polymer material, for example, a polyparaphenylene vinylene derivative, a polythiophene derivative, a polyparaphenylene derivative, a polysilane derivative, a polyacetylene derivative, a polyvinylcarbazole derivative, a polyfluorene derivative, a polyquinoxaline derivative, a copolymer thereof, or the like can be used.

The light emitting layer may contain a dopant for the purpose of improving light emitting efficiency or changing the wavelength of emitted light, or the like. Examples of the dopant include perylene derivatives, coumarin derivatives, rubrene derivatives, quinacridone derivatives, squarylium salt derivatives, porphyrin derivatives, styrene-based pigments, tetracene derivatives, pyrazoline derivatives, decacycloalkene, phenoxazinone, quinoxaline derivatives, carbazole derivatives, fluorene derivatives, and the like. In addition, as the dopant, an organometallic complex having a heavy metal ion such as platinum or iridium at the center and exhibiting phosphorescence may be used. The dopant may be used alone in 1 kind, or 2 or more kinds.

Further, as the light-emitting material and the dopant, for example, materials described in [0094] to [0099] of Japanese patent application laid-open No. 2010-272891 and [0053] to [0057] of International publication No. 2012/132126 can be used.

The thickness of the light-emitting layer is not particularly limited as long as it is a thickness capable of providing a site for recombination of electrons and holes to exhibit a light-emitting function, and may be, for example, 1nm or more, or 500nm or less.

As the hole injection transport material used for the hole injection transport layer, a known material can be used. For example, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amino-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, silazane derivatives, polythiophene derivatives, polyaniline derivatives, polypyrrole derivatives, phenylamine derivatives, anthracene derivatives, carbazole derivatives, fluorene derivatives, distyrylbenzene derivatives, polyphenylacetylene derivatives, porphyrin derivatives, styrylamine derivatives, and the like can be used. In addition, spiro compounds, phthalocyanine compounds, metal oxides, and the like can be exemplified. Further, compounds described in, for example, Japanese patent application laid-open Nos. 2011-119681, 2012/018082, 2012-069963 and 2012/132126 [0106] may be appropriately selected and used.

When the hole injection transport layer is a layer in which a hole injection layer and a hole transport layer are laminated, the hole injection layer may contain the additive a, the hole transport layer may contain the additive a, or the hole injection layer and the hole transport layer may contain the additive a. The additive A may be a low molecular compound or a high molecular compound. Specifically, a fluorine-based compound, an ester-based compound, a hydrocarbon-based compound, or the like can be used.

As the electron injection transporting material used for the electron injection transporting layer, a known material can be used. For example, alkali metals, alkali metal alloys, alkali metal halides, alkaline earth metals, alkaline earth metal halides, alkaline earth metal oxides, organic complexes of alkali metals, halides or oxides of magnesium, aluminum oxide, and the like can be used. Examples of the electron injection transporting material include bathocuproine, bathophenanthroline, phenanthroline derivatives, triazole derivatives, oxadiazole derivatives, pyridine derivatives, nitro-substituted fluorene derivatives, anthraquinone dimethane derivatives, diphenylquinone derivatives, thiopyran dioxide derivatives, aromatic ring tetracarboxylic acid anhydrides such as naphthalene and perylene, carbodiimides, fluorenylidene methane derivatives, anthraquinone dimethane derivatives, anthrone derivatives, quinoxaline derivatives, metal complexes such as hydroxyquinoline complexes, phthalocyanine compounds, and distyrylpyrazine derivatives.

Alternatively, a metal-doped layer in which an alkali metal or an alkaline earth metal is doped in an electron-transporting organic material may be formed as an electron injection transport layer. Examples of the electron-transporting organic material include bathocuproine, bathophenanthroline, phenanthroline derivatives, triazole derivatives, oxadiazole derivatives, pyridine derivatives, metal complexes such as tris (8-quinolinolato) aluminum (Alq3), and polymer derivatives thereof. As the metal to be doped, Li, Cs, Ba, Sr, or the like can be used.

The 2 nd electrode 50 includes a material having conductivity such as metal. The 2 nd electrode 50 is formed on the organic layer 40 by a vapor deposition method using a vapor deposition mask described later. Examples of the material constituting the 2 nd electrode 50 include platinum, gold, silver, copper, iron, tin, chromium, aluminum, indium, lithium, sodium, potassium, calcium, magnesium, chromium, carbon, and alloys thereof.

When the electronic device 10 is an organic EL display device, the element 20 is a pixel, and the organic layer 40 includes a light-emitting layer.

As shown in fig. 1, a plurality of elements 20 corresponding to a plurality of electronic devices 10 may be provided on one substrate 15. When the electronic device 10 is a display device such as an organic EL display device, one electronic device 10 corresponds to one screen.

Fig. 2 is a cross-sectional view showing the electronic device 10 in an enlarged manner, and fig. 3 is a plan view showing the electronic device 10 in an enlarged manner. Fig. 2 corresponds to a cross-sectional view along line II-II of the electronic device 10 shown in fig. 3.

As shown in fig. 2 and 3, the organic layer 40 may be the 1 st organic layer 40A, the 2 nd organic layer 40B, or the 3 rd organic layer 40C. The 1 st, 2 nd and 3 rd organic layers 40A, 40B and 40C are, for example, red, blue and green light emitting layers. In the following description, in the organic layer structure, a structure common to the 1 st organic layer 40A, the 2 nd organic layer 40B, and the 3 rd organic layer 40C will be described using a term and a symbol of "organic layer 40".

As shown in fig. 2, the organic layer 40 may be located not only in a region overlapping with the 1 st electrode 30 when viewed along the normal direction of the 1 st surface 16 of the substrate 15 but also in a region not overlapping with the 1 st electrode 30. Similarly, the 2 nd electrode 50 may be located not only in a region overlapping with the 1 st electrode 30 when viewed along the normal direction of the 1 st surface 16 of the substrate 15 but also in a region not overlapping with the 1 st electrode 30. In the following description, a case where 2 components are overlapped when viewed along a normal direction of a surface of a plate-like member such as the substrate 15 may be simply expressed as "overlapping". In addition, a case of viewing along a normal direction of a surface of a plate-like member such as the substrate 15 may be simply expressed as "plan view".

In fig. 3, the organic layer 40 covered with the 2 nd electrode 50 in a plan view and the 1 st electrode 30 covered with the organic layer 40 in a plan view are indicated by broken lines, respectively. As shown in fig. 3, the plurality of 1 st electrodes 30 and the organic layer 40 may be arranged along a 3 rd direction D3 and a 4 th direction D4 crossing the 3 rd direction D3. The 4 th direction D4 may be orthogonal to the 3 rd direction D3. The 3 rd direction D3 may be a direction at 45 ° with respect to the 1 st direction D1. In addition, the 4 th direction D4 may be a direction at 45 ° with respect to the 2 nd direction D2. The 4 th direction D4 may be orthogonal to the 3 rd direction D3.

The 1 st direction D1 and the 2 nd direction D2 may be directions in which the outer edges of the substrate 15 extend. The 2 nd direction D2 may be orthogonal to the 1 st direction D1.

As shown in fig. 3, the 2 nd electrode 50 may be spread so as to be overlapped on 2 or more 1 st electrodes 30. In this case, the 2 nd electrode 50 may function as a common electrode for supplying electricity to the plurality of organic layers 40. In addition, the 2 nd electrode 50 may include a 2 nd electrode opening 51 that does not overlap with the 1 st electrode 30 in a plan view. The 2 nd electrode opening 51 may be surrounded by the 2 nd electrode 50 in a plan view. The 2 nd electrode opening 51 may be positioned between 21 st electrodes 30 adjacent in a plan view. For example, the 2 nd electrode opening 51 may be located between 21 st electrodes 30 adjacent in the 1 st direction D1 in plan view. In addition, the 2 nd electrode opening 51 may be located between 21 st electrodes 30 adjacent in the 2 nd direction D2 in plan view.

By including the 2 nd electrode 50 with the 2 nd electrode opening 51, light is more likely to transmit through the electronic device 10 than in the case where the 2 nd electrode 50 is spread over the entire area of the 1 st surface 16. This can improve the transmittance of the entire electronic device 10.

As shown in fig. 2 and 3, the organic layer 40 may include an organic layer opening 41 overlapping the 2 nd electrode opening 51 in a plan view. A part of the light passes through the organic layer opening 41, whereby the transmittance of the entire electronic device 10 is further improved. Like the 2 nd electrode opening 51, the organic layer opening 41 may be located between 21 st electrodes 30 adjacent in the 1 st direction D1 in a plan view. In addition, like the 2 nd electrode opening 51, the organic layer opening 41 may be positioned between 21 st electrodes 30 adjacent in the 2 nd direction D2 in a plan view.

Fig. 4A is a cross-sectional view showing the electronic device 10 of fig. 2 further enlarged. The 2 nd electrode 50 includes a side 52 facing the 2 nd electrode opening 51. Likewise, the organic layer 40 comprises a side 42 facing the organic layer opening 41. As shown in fig. 4A, an upper end 43 of the side 42 of the organic layer 40 may contact a lower end 54 of the side 52 of the 2 nd electrode 50. Such a relationship of the side face 42 and the side face 52 may be realized when the organic layer opening 41 and the 2 nd electrode opening 51 are formed by laser processing.

Fig. 4B is an enlarged cross-sectional view of the 2 nd electrode 50 of fig. 4A. As shown in fig. 4A and 4B, the upper end 53 of the side surface 52 of the 2 nd electrode 50 may be raised more than the surrounding 2 nd electrode 50. Such a bump may be created by melting the 2 nd electrode 50 during laser machining. Since the height of the side surface 52 of the 2 nd electrode 50 is increased by raising the upper end 53 of the side surface 52 of the 2 nd electrode 50, the resistance of the 2 nd electrode 50 can be reduced.

In fig. 4A and 4B, symbol t1 denotes the height of the side face 52 of the 2 nd electrode 50. Note that t2 represents an average thickness of the region of the 2 nd electrode 50 that overlaps with the 1 st electrode 30 in plan view. The height t1 is the distance between the upper end 53 and the lower end 54 of the side surface 52 in the normal direction of the 1 st surface 16 of the substrate 15. The height t1 of the side surface 52 and the thickness of the 2 nd electrode 50 are calculated based on the image of the cross section of the electronic device 10. The image of the cross section is obtained by observing the cross section of the electronic device 10 with a scanning electron microscope.

Referring to fig. 4C, a method of calculating the average value t2 of the thickness of the 2 nd electrode 50 will be described. The average value t2 is calculated by averaging the thickness t21, the thickness t22 and the thickness t 23. The thickness t21 is the thickness of the 2 nd electrode 50 overlapping the center position of the 1 st electrode 30 in the in-plane direction of the 1 st face 16. In fig. 4C, a straight line passing through the center position of the 1 st electrode 30 and extending in the thickness direction of the substrate 15 is denoted by symbol Lc. The thicknesses t22 and t23 are thicknesses of the 2 nd electrode 50 at an intermediate position of the end 30a of the 1 st electrode 30 and the straight line Lc in the in-plane direction of the 1 st face 16.

The height t1 of the side 52 may be greater than the average value t2 of the thickness of the 2 nd electrode 50. That is, t1/t2 may be greater than 1.0. the range of t1/t2 may be determined from group 1 consisting of 1.1, 1.2, 1.3 and 1.4 and/or group 2 consisting of 1.5, 1.6, 1.8 and 2.0. the lower limit of the range of t1/t2 may be determined by any 1 of the values contained in group 1 above. For example, the lower limit of the range of t1/t2 may be 1.1 or more, 1.2 or more, 1.3 or more, or 1.4 or more. In addition, the upper limit of the range of t1/t2 may be determined by any 1 of the values contained in group 2 above. For example, the upper limit of the range of t1/t2 may be 1.5 or less, 1.6 or less, 1.8 or less, or 2.0 or less.

the range of t1/t2 may be defined by a combination of any 1 of the values included in the above group 1 and any 1 of the values included in the above group 2, and may be, for example, 1.1 to 2.0, 1.2 to 1.8, 1.3 to 1.6, or 1.4 to 1.5. The range of t1/t2 may be defined by a combination of any 2 of the values included in group 1, and may be, for example, 1.1 to 1.4, 1.1 to 1.3, 1.2 to 1.4, or 1.2 to 1.3. The range of t1/t2 may be defined by a combination of any 2 of the values included in group 2, and may be, for example, 1.5 to 2.0, 1.5 to 1.8, 1.6 to 2.0, or 1.6 to 1.8.

When the organic layer opening 41 is formed in the organic layer 40 by laser processing, the angle of the side surface 42 facing the organic layer opening 41 with respect to the 1 st surface 16 of the substrate 15 can be adjusted by adjusting the irradiation direction of light. Therefore, for example, the organic layer opening 41 can be formed so that the side surface 42 steeply rises. In this case, the width u1 of the side surface 42 of the organic layer 40 is smaller than the width of the side surface of the organic layer formed by the vapor deposition method. Since the side surfaces 42 of the organic layers 40 stand steeply, variations in effective area of the respective organic layers 40 are reduced. Therefore, variations in the characteristics of the respective organic layers 40 are reduced. For example, when the organic layer 40 is a light-emitting layer, the variation in the light intensity of light emitted from each light-emitting layer is reduced. Therefore, it is possible to suppress variation in the luminance distribution of the electronic device 10 according to the position in the plane of the electronic device 10. The "effective area of the organic layer 40" is an area of a portion overlapping with the 1 st electrode 30 and the 2 nd electrode 50 in a plan view, having a thickness necessary for the organic layer 40 to function.

In the present application, the width u1 of the side face 52 is defined as the distance in the in-plane direction of the 1 st face 16 from the position where the height of the side face 52 reaches t4 to the position where t5 is reached. t4 is 0.2 × t3, and t5 is 0.8 × t 3. Reference symbol t3 denotes an average value of the thickness of the region of the organic layer 40 located between the side surface 42 and the end 31 of the 1 st electrode 30 in a plan view. The thickness of the organic layer 40 is calculated based on the image of the cross section of the electronic device 10, as with the thickness of the 2 nd electrode 50.

The width u1 of the side face 42 of the organic layer 40 may range from 1 st group consisting of 0.1 μm, 0.2 μm, 0.3 μm and 0.4 μm and/or 2 nd group consisting of 0.5 μm, 1.0 μm, 1.5 μm and 2.0 μm. The lower limit of the range of the width u1 of the side 42 may be determined by any 1 of the values contained in group 1 above. For example, the lower limit of the range of the width u1 of the side face 42 may be 0.1 μm or more, 0.2 μm or more, 0.3 μm or more, or 0.4 μm or more. In addition, the upper limit of the range of the width u1 of the side face 42 may be determined by any 1 of the values included in the above-described group 2. For example, the upper limit of the range of the width u1 of the side face 42 may be 0.5 μm or less, 1.0 μm or less, 1.5 μm or less, or 2.0 μm or less.

The range of the width u1 of the side face 42 of the organic layer 40 may be determined by a combination of any 1 of the values included in the above group 1 and any 1 of the values included in the above group 2, and may be, for example, 0.1 μm to 2.0 μm, 0.2 μm to 1.5 μm, 0.3 μm to 1.0 μm, or 0.4 μm to 0.5 μm. The range of the width u1 of the side face 42 may be determined by a combination of any 2 of the values included in the above group 1, and may be, for example, 0.1 μm or more and 0.4 μm or less, 0.1 μm or more and 0.3 μm or less, 0.2 μm or more and 0.4 μm or less, or 0.2 μm or more and 0.3 μm or less. The range of the width u1 of the side face 42 may be determined by a combination of any 2 of the values included in the above group 2, and may be, for example, 0.5 μm or more and 2.0 μm or less, 0.5 μm or more and 1.5 μm or less, 1.0 μm or more and 2.0 μm or less, or 1.0 μm or more and 1.5 μm or less.

In the case where the side surface 52 of the 2 nd electrode 50 is raised, as shown in fig. 4A and 4B, the 2 nd electrode 50 includes a base portion 55 located outside the upper end 53. The thickness of the 2 nd electrode 50 decreases from the upper end 53 to the outside. The "outer side" refers to a side away from the center of the 2 nd electrode opening 51 in plan view. The base 55 is a position where the thickness of the 2 nd electrode 50 is substantially less than the height t1 of the side surface 52. For example, the thickness t6 of the 2 nd electrode 50 at the base 55 is 1.05 times the average value t2 of the thickness of the 2 nd electrode 50.

Fig. 4D is a plan view showing an example of the 2 nd electrode 50. Reference numeral 51a denotes the outer edge of the 2 nd electrode opening 51 in plan view. The upper end 53 of the side surface 52 of the 2 nd electrode 50 may have a contour surrounding the 2 nd electrode opening 51 in a plan view. The base 55 may have a profile that encompasses the profile of the upper end 53 in plan view.

The symbol u2 represents a distance from the outer edge 51a of the 2 nd electrode opening 51 to the base 55 in plan view. The distance u2 may be, for example, 0.05 μm or more, 0.1 μm or more, or 0.5 μm or more. The distance u2 may be, for example, 2.0 μm or less, 3.0 μm or less, or 5.0 μm or less. The range of the distance u2 may be determined by group 1 consisting of 0.05 μm, 0.1 μm and 0.5 μm and/or group 2 consisting of 2.0 μm, 3.0 μm and 5.0 μm. The range of the distance u2 may be determined by a combination of any 1 of the values contained in the above-mentioned group 1 and any 1 of the values contained in the above-mentioned group 2. The range of the distance u2 may be determined by a combination of any 2 of the values contained in group 1 above. The range of the distance u2 may be determined by a combination of any 2 of the values contained in group 2 above. For example, it may be 0.05 μm or more and 5.0 μm or less, may be 0.05 μm or more and 3.0 μm or less, may be 0.05 μm or more and 2.0 μm or less, may be 0.05 μm or more and 0.5 μm or less, may be 0.05 μm or more and 0.1 μm or less, may be 0.1 μm or more and 5.0 μm or less, may be 0.1 μm or more and 3.0 μm or less, may be 0.1 μm or more and 2.0 μm or less, may be 0.1 μm or more and 0.5 μm or less, may be 0.5 μm or more and 5.0 μm or less, may be 0.5 μm or more and 2.0 μm or less, may be 2.0 μm or more and 5.0 μm or less, may be 2.0 μm or more and 3.0 μm or less, and may be 3.0 μm or more and 5.0 μm or less.

The dimensions of the components of the electronic device 10, the distances between the components, and the like can be measured by observing an image of a cross section of the electronic device 10 with a scanning electron microscope.

The 2 nd electrode 50 may include a uniform region 56. The uniform region 56 is, for example, a region having a thickness of 1.05 times or less the average value t 2. The uniform region 56 is developed so as to surround the 2 nd electrode opening 51 in a plan view. The uniform area 56 may be flared outward of the base 55. The uniform region 56 may comprise a majority of the 2 nd electrode 50. The occupancy of the uniform region 56 in the 2 nd electrode 50 is, for example, 90% or more, 95% or more, 98% or more, or 99% or more. In the case where the majority of the 2 nd electrode 50 is the uniform region 56, light is easily transmitted through the 2 nd electrode 50. This can improve the transmittance of the electronic device 10.

Next, an example of the method for manufacturing the electronic device 10 will be described.

First, the substrate 15 on which the 1 st electrode 30 is formed is prepared. Fig. 5 and 6 are a cross-sectional view and a plan view illustrating the substrate 15 in a state where the 1 st electrode 30 is formed. Fig. 5 corresponds to a cross-sectional view of the substrate 15 along the V-V line shown in fig. 6. The 1 st electrode 30 is formed, for example, as follows: after a conductive layer constituting the 1 st electrode 30 is formed on the substrate 15 by a sputtering method or the like, the conductive layer is patterned by a photolithography method or the like, thereby forming the 1 st electrode 30.

Next, an organic layer forming step of forming an organic layer 40 on the 1 st electrode 30 is performed. Fig. 7 and 8 are a cross-sectional view and a plan view illustrating the substrate 15 in a state where the 1 st electrode 30 and the organic layer 40 are formed. Fig. 7 corresponds to a cross-sectional view of the substrate 15 shown in fig. 8 taken along line VII-VII. The organic layer 40 is formed, for example, as follows: the organic layer 40 is formed by depositing an organic material or the like on the substrate 15 or the 1 st electrode 30 by a vapor deposition method using a vapor deposition mask having a through hole corresponding to the organic layer 40. Thus, a laminate 18 can be prepared, the laminate 18 including: a substrate 15; more than 21 st electrodes 30 positioned on the 1 st surface 16 of the substrate 15; and an organic layer 40 on the 1 st electrode 30.

As shown in fig. 8, the plurality of 1 st organic layers 40A may be arranged along a 3 rd direction D3 and a 4 th direction D4 crossing the 3 rd direction D3. Like the 1 st organic layer 40A, the plurality of 2 nd organic layers 40B may be arranged along the 3 rd direction D3 and the 4 th direction D4 crossing the 3 rd direction D3. The plurality of 3 rd organic layers 40C may be arranged along the 1 st direction D1 and the 2 nd direction D2.

Fig. 9 is a cross-sectional view showing an example of a step of forming the 1 st organic layer 40A. First, a 1 st vapor deposition mask 80A including a plurality of through holes 81 is prepared. Next, the 1 st vapor deposition mask 80A is opposed to the substrate 15 on which the 1 st electrode 30 is formed. Next, the 1 st vapor deposition step is performed: the material of the 1 st organic layer 40A is vapor-deposited on the 1 st electrode 30 through the through holes 81 of the 1 st vapor deposition mask 80A. As shown in fig. 9, the 1 st organic layer 40A may be formed not only in a region overlapping with the 1 st electrode 30 in a plan view, but also in a region not overlapping with the 1 st electrode 30.

Fig. 10 is a cross-sectional view showing an example of a step of forming the 2 nd organic layer 40B. First, a 2 nd vapor deposition mask 80B including a plurality of through holes 81 is prepared. Next, the 2 nd vapor deposition mask 80B is opposed to the substrate 15 on which the 1 st electrode 30 and the 1 st organic layer 40A are formed. Next, a 2 nd vapor deposition step is performed: the material of the 2 nd organic layer 40B is vapor-deposited on the 1 st electrode 30 through the through holes 81 of the 2 nd vapor deposition mask 80B. As shown in fig. 10, the 2 nd organic layer 40B may be formed not only in a region overlapping with the 1 st electrode 30 in a plan view, but also in a region not overlapping with the 1 st electrode 30.

Although not shown, the 3 rd vapor deposition step is performed as in the case of the 1 st organic layer 40A and the 2 nd organic layer 40B: the material of the 3 rd organic layer 40C is vapor-deposited on the 1 st electrode 30 through the through-holes of the vapor deposition mask. In this manner, the organic layer 40 including the 1 st organic layer 40A, the 2 nd organic layer 40B, and the 3 rd organic layer 40C may be formed on the 1 st electrode 30.

Fig. 11 is a sectional view showing an example of a step of forming the 2 nd organic layer 40B. As shown in fig. 11, the 2 nd vapor deposition step may be performed so that a part of the 2 nd organic layer 40B overlaps the 1 st organic layer 40A. In this case, the 1 st organic layer 40A and the 2 nd organic layer 40B include an overlapping portion 45 that partially overlaps with each other at a position that does not overlap with the 1 st electrode 30. Although not shown, the 1 st organic layer 40A and the 3 rd organic layer 40C may partially overlap each other. In addition, the 2 nd organic layer 40B and the 3 rd organic layer 40C may partially overlap each other.

Next, a 2 nd electrode forming step of forming the 2 nd electrode 50 is performed. Fig. 12 and 13 are a cross-sectional view and a plan view showing an example of a process of forming the 2 nd electrode 50. Fig. 12 corresponds to a cross-sectional view of the substrate 15 shown in fig. 13 taken along line XII-XII. In the 2 nd electrode forming step, the 2 nd electrode 50 is formed on the organic layer 40 so that the 2 nd electrode 50 overlaps 2 or more of the 1 st electrodes 30 in a plan view. The 2 nd electrode 50 is formed over the entire 1 st surface 16 side of the substrate 15 by, for example, vapor deposition.

The 2 nd electrode 50 may be formed on the entire area of the display region of the electronic device 10. The 2 nd electrode 50 may include a layer continuously developed without a gap. The 2 nd electrode 50 may be formed of 1 layer continuously developed without a gap. The 2 nd electrode 50 can be formed by 1 deposition process.

Next, a removal step is performed: the 2 nd electrode 50 is partially removed in a region not overlapping with the 1 st electrode 30 in a plan view, and a 2 nd electrode opening 51 is formed. As shown in fig. 14, the removing step may include an irradiation step of irradiating the 2 nd electrode 50 with laser light L1. The irradiation step may include a step of irradiating the 2 nd electrode 50 with the laser light L1 through the through hole 91 of the laser mask 90. By irradiating the 2 nd electrode 50 with the laser light L1, the 2 nd electrode opening 51 can be formed in the 2 nd electrode 50 as shown in fig. 2. In this way, the electronic device 10 including the 2 nd electrode 50 including the 2 nd electrode opening 51 can be obtained.

The removing step may locally remove a region of the 2 nd electrode 50 located between the 1 st electrodes 30 in a plan view. For example, the 2 nd electrode 50 may be irradiated with the laser light L1 in a region located between the 1 st electrodes 30 in a plan view.

The irradiation step may include the steps of: after the 2 nd electrode 50 is formed with the 2 nd electrode opening 51, the organic layer 40 is irradiated with the laser light L1 in a region overlapping with the 2 nd electrode opening 51. By irradiating the organic layer 40 with the laser light L1, as shown in fig. 2, the organic layer opening 41 overlapping the 2 nd electrode opening 51 can be formed in the organic layer 40.

As shown in fig. 11, in the case where the 1 st organic layer 40A and the 2 nd organic layer 40B partially overlap each other, the overlapping portion 45 may be irradiated with the laser light L1. This enables the overlapping portion 45 to be removed.

Fig. 15 is a diagram illustrating an example of the irradiation step. In fig. 15, a region where the 2 nd electrode opening 51 is to be formed is indicated by a dotted line. As shown in fig. 15, the spot 92 of the laser irradiated to the 2 nd electrode 50 may have a spot diameter r smaller than the size of the 2 nd electrode aperture 51. In this case, the region of the 2 nd electrode 50 where the 2 nd electrode opening 51 is to be formed may be irradiated with laser light by scanning the light source in the in-plane direction of the 1 st surface 16 of the substrate 15 with the laser mask 90 interposed between the light source of the laser light and the 2 nd electrode 50.

As the laser, for example, YAG laser can be used. The light source generating the YAG laser may include an oscillation medium including a crystal in which neodymium is added to yttrium, aluminum, or garnet. In this case, laser light having a wavelength of about 1064nm can be generated as the fundamental wave. Further, by passing the fundamental wave through the nonlinear optical crystal, a 2 nd high frequency wave having a wavelength of about 532nm can be generated. Further, by passing the fundamental wave and the 2 nd high frequency wave through the nonlinear optical crystal, the 3 rd high frequency wave having a wavelength of about 355nm can be generated. The laser light irradiated to the 2 nd electrode 50 contains 1, 2, or 3 of the fundamental wave, the 2 nd high frequency wave, and the 3 rd high frequency wave.

The laser beam irradiated to the 2 nd electrode 50 may be a laser beam other than the YAG laser beam.

In the irradiation step, the 2 nd electrode 50 may be intermittently irradiated with a pulse of the laser light L1. That is, as the laser light L1 irradiated to the 2 nd electrode 50, a laser light L1 including a pulse obtained by pulse oscillation may be used instead of a continuous light. This makes it easy to control the heat generated in the 2 nd electrode 50 by the irradiation of the laser light L1. Fig. 16 is a diagram showing an example of the laser light L1 including pulses. In fig. 16, reference symbol W1 denotes the pulse width of the laser light L1, reference symbol W2 denotes the period W2 of the pulse of the laser light L1, and reference symbol P1 denotes the peak output of the laser light L1. The pulse width W1 is the half-peak width of the peak of the pulse.

In the irradiation step, parameters such as the spot diameter r, the pulse width W1, the pulse period W2, the peak output P1, and the pulse energy of the laser light L1 can be appropriately adjusted. This enables adjustment of the degree of protrusion of the upper end 53 formed on the side surface 52 of the 2 nd electrode 50. In addition, the width u1 of the side surface 42 of the organic layer 40 can be adjusted.

The range of the spot diameter r of the laser light L1 may be determined by group 1 consisting of 2 μm, 5 μm, 10 μm and 15 μm and/or group 2 consisting of 20 μm, 30 μm, 40 μm and 50 μm. The lower limit of the range of the spot diameter r may be determined by any 1 of the values contained in the above-mentioned group 1. For example, the lower limit of the range of the spot diameter r may be 2 μm or more, 5 μm or more, 10 μm or more, or 15 μm or more. In addition, the upper limit of the range of the spot diameter r may be determined by any 1 of the values included in the above-described group 2. For example, the upper limit of the range of the spot diameter r may be 20 μm or less, 30 μm or less, 40 μm or less, or 50 μm or less.

The range of the spot diameter r of the laser light L1 can be determined by a combination of any 1 of the values included in the above-described group 1 and any 1 of the values included in the above-described group 2, and may be, for example, 2 μm to 50 μm, 5 μm to 40 μm, 10 μm to 30 μm, or 15 μm to 20 μm. The range of the spot diameter r may be determined by a combination of any 2 of the values included in the above group 1, and may be, for example, 2 μm to 15 μm, 2 μm to 10 μm, 5 μm to 15 μm, or 5 μm to 10 μm. The range of the spot diameter r may be determined by a combination of any 2 of the values included in the above group 2, and may be, for example, 20 μm to 50 μm, 20 μm to 40 μm, 30 μm to 50 μm, or 30 μm to 40 μm.

The range of the pulse width W1 of the laser light L1 may be determined by group 1 consisting of 0.1ns, 0.2ns, 0.5ns, and 1ns and/or group 2 consisting of 2ns, 5ns, 10ns, and 20 ns. The lower limit of the range of the pulse width W1 may be determined by any 1 of the values contained in the above-described group 1. For example, the lower limit of the range of the pulse width W1 may be 0.1ns or more, 0.2ns or more, 0.5ns or more, or 1ns or more. In addition, the upper limit of the range of the pulse width W1 may be determined by any 1 of the values included in the above-described group 2. For example, the upper limit of the range of the pulse width W1 may be 2ns or less, 5ns or less, 10ns or less, or 20ns or less.

The range of the pulse width W1 of the laser light L1 may be determined by a combination of any 1 of the values included in the above-described group 1 and any 1 of the values included in the above-described group 2, and may be, for example, 0.1ns to 20ns, 0.2ns to 10ns, 0.5ns to 5ns, or 1ns to 2 ns. The range of the pulse width W1 may be determined by a combination of any 2 of the values included in the above group 1, and may be, for example, 0.1ns to 1ns, 0.1ns to 0.5ns, 0.2ns to 1ns, or 0.2ns to 0.5 ns. The range of the pulse width W1 may be determined by a combination of any 2 of the values included in the above group 2, and may be, for example, 2ns to 20ns, 2ns to 10ns, 5ns to 20ns, or 5ns to 10 ns.

The range of the period W2 of the pulse of the laser light L1 may be determined by group 1 consisting of 1ns, 2ns, 5ns, and 10ns and/or group 2 consisting of 20ns, 50ns, 100ns, and 200 ns. The lower limit of the range of the period W2 may be determined by any 1 of the values contained in the above-mentioned group 1. For example, the lower limit of the range of the period W2 may be 1ns or more, 2ns or more, 5ns or more, or 10ns or more. In addition, the upper limit of the range of the period W2 may be determined by any 1 of the values contained in the above-described group 2. For example, the upper limit of the range of the period W2 may be 20ns or less, 50ns or less, 100ns or less, or 200ns or less.

The range of the pulse period W2 of the laser light L1 may be determined by a combination of any 1 of the values included in the group 1 and any 1 of the values included in the group 2, and may be, for example, 1ns to 200ns, 2ns to 100ns, 5ns to 50ns, or 10ns to 20 ns. The range of the period W2 may be determined by a combination of any 2 of the values included in the above group 1, and may be, for example, 1ns to 10ns, 1ns to 5ns, 2ns to 10ns, or 2ns to 5 ns. The range of the period W2 may be determined by a combination of any 2 of the values included in the above group 2, and may be, for example, 20ns to 200ns, 20ns to 100ns, 50ns to 200ns, or 50ns to 100 ns.

The range of peak output P1 of the laser L1 may be determined by group 1 consisting of 100kW, 200kW, 300kW, and 400kW and/or group 2 consisting of 500kW, 600kW, 800kW, and 1000 kW. The lower limit of the range of peak output P1 may be determined by any 1 of the values contained in group 1 above. For example, the lower limit of the range of the peak output P1 may be 100kW or more, 200kW or more, 300kW or more, or 400kW or more. In addition, the upper limit of the range of the peak output P1 may be determined by any 1 of the values included in the above-described group 2. For example, the upper limit of the range of the peak output P1 may be 500kW or less, 600kW or less, 800kW or less, or 1000kW or less.

The range of the peak output P1 may be determined by a combination of any 1 of the values included in the above group 1 and any 1 of the values included in the above group 2, and may be, for example, 100kW or more and 1000kW or less, 200kW or more and 800kW or less, 300kW or more and 600kW or less, or 400kW or more and 500kW or less. The range of the peak output P1 can be determined by a combination of any 2 of the values included in the above group 1, and may be, for example, 100kW or more and 400kW or less, 100kW or more and 300kW or less, 200kW or more and 400kW or less, or 200kW or more and 300kW or less. The range of the peak output P1 can be determined by a combination of any 2 of the values included in the above group 2, and may be, for example, 500kW or more and 1000kW or less, 500kW or more and 800kW or less, 600kW or more and 1000kW or less, or 600kW or more and 800kW or less.

The pulse energy and pulse width W1 of the laser light L1 can be set so as to suppress the scattering of the 2 nd electrode 50 over a wide range. For example, the laser light L1 may have a pulse energy of 1.5mJ to 2.0mJ and a pulse width W1 of 5ns to 7 ns. In this case, the laser light L1 may have a pulse period W2 of 1ns to 60 ns.

The values of the pulse energy, pulse width W1, and peak output P1 of the laser light L1 are not limited to the above ranges. These values are appropriately adjusted according to the characteristics of the 2 nd electrode 50, the characteristics of the laser light L1, and the like.

According to the embodiment shown in fig. 1 to 16, the 2 nd electrode 50 is formed with the 2 nd electrode opening 51 by irradiating the 2 nd electrode 50 with the laser light L1 in a region not overlapping with the 1 st electrode 30 in a plan view. Therefore, light is more likely to transmit through the electronic device 10 than in the case where the 2 nd electrode 50 is spread over the entire area of the 1 st surface 16. This can improve the transmittance of the entire electronic device 10. In addition, by using the laser light L1, the 2 nd electrode 50 can be processed with good accuracy. For example, the shape of the 2 nd electrode opening 51 in a plan view can be suppressed from deviating from the design shape. The same applies to the shape of the organic layer opening 41 of the organic layer 40. The processing accuracy can be improved by using the above-described laser mask 90.

In addition, by using the laser light L1, the inclination angles of the side surface 52 of the 2 nd electrode opening 51 of the 2 nd electrode 50 and the side surface 42 of the organic layer opening 41 of the organic layer 40 are easily controlled. For example, the angle formed by the side surface 52 of the 2 nd electrode 50 or the side surface 42 of the organic layer 40 with respect to the normal direction of the 1 st surface 16 of the substrate 15 can be made smaller than when the end portion of the layer made of a material attached to the substrate 15 by a vapor deposition method using a vapor deposition mask constitutes the side surface.

As a comparative method, a case where the 2 nd electrode is formed by a vapor deposition method using a vapor deposition mask is considered. In this case, if the direction in which the material of the 2 nd electrode flies in the vapor deposition step is inclined with respect to the normal direction of the 1 st surface 16 of the substrate 15, the shape of the 2 nd electrode formed on the substrate 15 in a plan view is likely to deviate from the shape of the through hole of the vapor deposition mask. In order to suppress such a deviation, it is required to reduce the thickness of the vapor deposition mask. However, if the thickness of the vapor deposition mask is reduced, the strength of the vapor deposition mask is likely to be reduced, and the vapor deposition mask is likely to be damaged. It is also considered to be difficult to clean and reuse the vapor deposition mask to which the material of the 2 nd electrode adheres, and the manufacturing cost of the electronic device 10 increases.

In contrast, according to the present embodiment, since the 2 nd electrode 50 is processed by the laser light L1, the 2 nd electrode 50 can be processed with good accuracy.

Various modifications may be made to the above-described embodiment. Other embodiments will be described below with reference to the drawings as necessary. In the following description and the drawings used in the following description, the same reference numerals as those used for corresponding portions in the above-described one embodiment are used for portions that can be configured in the same manner as the above-described one embodiment, and redundant description is omitted. In addition, in the case where the operational effects obtained in the above-described one embodiment can be obviously obtained in other embodiments, the description thereof may be omitted.

An electronic device 10 and a method for manufacturing the same according to another embodiment of the present invention will be described with reference to fig. 17 to 23. Fig. 17 is a cross-sectional view showing an example of the electronic device 10. Fig. 18A is an enlarged cross-sectional view of electronic device 10 of fig. 17. The electronic device 10 may include an insulating layer 60 located between the 1 st surface 16 and the organic layer 40 in a normal direction of the 1 st surface 16 of the substrate 15. The insulating layer 60 may include an insulating layer 1 st opening 61. The 1 st electrode 30 may be located at the 1 st opening 61 of the insulating layer when viewed from above. Although not shown, a portion of the 1 st electrode 30 may be located between the insulating layer 60 and the 1 st surface 16 of the substrate 15.

Additionally, the insulating layer 60 may include an insulating layer 2 nd opening 62. The insulating layer 2 nd opening 62 may overlap with the 2 nd electrode opening 51 of the 2 nd electrode 50 in a plan view. The insulating layer 2 nd opening 62 may overlap with the organic layer opening 41 of the organic layer 40 in a plan view. The insulating layer 60 includes a side 63 facing the insulating layer 2 nd opening 62. As shown in fig. 18A, the upper end of the side 63 of the insulating layer 60 may be in contact with the lower end of the side 42 of the organic layer 40. This relationship of the side 63 and the side 42 can be realized when the organic layer opening 41 and the insulating layer 2 nd opening 62 are formed by laser processing.

The insulating layer 60 contains a material having insulating properties. For example, the insulating layer 60 may include a resin material such as polyimide resin.

Next, an example of a method for manufacturing the electronic device 10 shown in fig. 17 will be described.

First, as in the case of the above-described embodiment shown in fig. 5 and 6, the substrate 15 on which the 1 st electrode 30 is formed is prepared. Next, an insulating layer forming step of forming an insulating layer 60 having an insulating layer 1 st opening 61 on the 1 st surface 16 of the substrate 15 is performed. Fig. 19 and 20 are a cross-sectional view and a plan view showing an example of the substrate 15 in a state where the 1 st electrode 30 and the insulating layer 60 are formed. Fig. 19 corresponds to a cross-sectional view of the substrate 15 shown in fig. 20 along the XIX-XIX line.

In the insulating layer forming step, for example, first, a solution containing a material of the insulating layer 60 is applied to the 1 st surface 16 side of the substrate 15, and the solution is dried, thereby forming the insulating layer 60 over the entire area of the 1 st surface 16. Next, the insulating layer 60 is exposed and developed, thereby forming an insulating layer 1 st opening 61 in the insulating layer 60. In this way, the insulating layer 60 can be formed between the 1 st electrodes 30.

Next, as shown in fig. 21, an organic layer forming step of forming an organic layer 40 on the 1 st electrode 30 is performed. The organic layer 40 may be formed to overlap the 1 st electrode 30 and the insulating layer 60 in a plan view. Thus, a laminate 18 can be prepared, the laminate 18 including: a substrate 15; more than 21 st electrodes 30 positioned on the 1 st surface 16 of the substrate 15; an insulating layer 60 between the 1 st electrodes 30; and an organic layer 40 on the 1 st electrode 30.

Next, as shown in fig. 22, a 2 nd electrode forming step of forming a 2 nd electrode 50 is performed. In the 2 nd electrode forming step, as in the case of the above-described embodiment shown in fig. 5 and 6, the 2 nd electrode 50 is formed on the organic layer 40 so that the 2 nd electrode 50 overlaps with 2 or more 1 st electrodes 30 in a plan view.

Next, as shown in fig. 23, a removing step is performed: the 2 nd electrode 50 is partially removed in a region not overlapping with the 1 st electrode 30 in a plan view, and a 2 nd electrode opening 51 is formed. As shown in fig. 23, in the removal step, a region overlapping with the insulating layer 60 in a plan view of the 2 nd electrode 50 may be partially removed to form a 2 nd electrode opening 51. As shown in fig. 23, the removing step may include an irradiation step of irradiating the 2 nd electrode 50 with laser light L1. By irradiating the 2 nd electrode 50 with the laser light L1, the 2 nd electrode opening 51 can be formed in the 2 nd electrode 50 as shown in fig. 17. In this way, the electronic device 10 including the 2 nd electrode 50 including the 2 nd electrode opening 51 can be obtained.

The irradiation step may include the steps of: after the 2 nd electrode 50 is formed with the 2 nd electrode opening 51, the organic layer 40 is irradiated with the laser light L1 in a region overlapping with the 2 nd electrode opening 51. By irradiating the organic layer 40 with the laser light L1, as shown in fig. 17, the organic layer opening 41 overlapping the 2 nd electrode opening 51 can be formed in the organic layer 40.

The irradiation step may include the steps of: after the organic layer opening 41 is formed in the organic layer 40, the insulating layer 60 is irradiated with laser light L1 in a region overlapping with the organic layer opening 41. By irradiating the insulating layer 60 with the laser light L1, as shown in fig. 17, the insulating layer 2 nd opening 62 overlapping the 2 nd electrode opening 51 and the organic layer opening 41 can be formed in the insulating layer 60.

The 1 st surface 16 of the substrate 15 may or may not be exposed in the organic layer opening 41. By "exposed" is meant that no layer is formed on the 1 st surface 16. "not exposed" means that some kind of layer is formed on the 1 st surface 16. For example, as shown in fig. 18B, in the organic layer opening 41, the insulating layer 60 may be located on the 1 st face 16 of the substrate 15. The thickness of the insulating layer 60 located at the organic layer opening 41 in plan view may be smaller than the thickness of the insulating layer 60 overlapping with the organic layer 40 in plan view. For example, in the step of irradiating a region of the insulating layer 60 overlapping with the organic layer opening 41 with the laser light L1, the insulating layer 60 is partially removed in the thickness direction, thereby producing such an insulating layer 60. By leaving the insulating layer 60 in the organic layer opening 41, it is possible to suppress the electrical connection of the 21 st electrodes 30 adjacent to each other with the organic layer opening 41 therebetween in a plan view.

Although not shown, a layer having an insulating property and different from the insulating layer 60 may be located on the 1 st surface 16 of the substrate 15 in the insulating layer 2 nd opening 62. This can suppress the 21 st electrodes 30 adjacent to each other with the insulating layer 2 nd opening 62 interposed therebetween from being electrically connected.

An electronic device 10 according to another embodiment of the present invention will be described with reference to fig. 24A. The electronic device 10 may include a protective layer 70 that overlaps the 2 nd electrode 50 and the 2 nd electrode opening 51 in a plan view.

The protective layer 70 includes a material having insulating properties and transparency. The material of the protective layer 70 may be an organic material or an inorganic material. For example, the protective layer 70 may include a resin material such as polyimide resin, acrylic resin, epoxy resin, or the like. For example, the protective layer 70 may include an inorganic material. The inorganic material may be an inorganic nitride such as silicon nitride, or an inorganic oxide such as silicon oxide or aluminum oxide. The protective layer 70 is made of these materials, and may include 2 or more layers stacked in the thickness direction of the substrate 15.

As shown in fig. 24A, in the case where the upper end 53 of the side surface 52 of the 2 nd electrode 50 is raised more than the surrounding 2 nd electrode 50, the upper end 53 of the side surface 52 of the 2 nd electrode 50 can enter the protective layer 70. Therefore, the contact area between the 2 nd electrode 50 and the protective layer 70 increases. This can prevent the protective layer 70 from being peeled off from the 2 nd electrode 50.

As shown in fig. 24A, the protective layer 70 may cover the side of the organic layer 40. The protective layer 70 can prevent water vapor, oxygen, or the like in the atmosphere from entering the organic layer 40. This can suppress degradation of the organic layer 40.

The protective layer 70 may be spread along the sectional shape of the organic layer 40. For example, as shown in fig. 24A, the surface of the protective layer 70 overlapping with the 2 nd electrode opening 51 may be located between the surface of the 2 nd electrode 50 overlapping with the 1 st electrode 30 and the 1 st face 16 in the thickness direction of the substrate 15.

The protective layer 70 may have a thickness greater than the total thickness of the 1 st electrode 30, the organic layer 40, and the 2 nd electrode 50. For example, as shown in fig. 24B, the surface of the 2 nd electrode 50 overlapping with the 1 st electrode 30 may be located between the surface of the protective layer 70 overlapping with the 2 nd electrode opening 51 and the 1 st face 16 in the thickness direction of the substrate 15.

The process of forming the protective layer 70 may include a process of applying a liquid including a material of the protective layer 70 to the 2 nd electrode 50 and the 2 nd electrode opening 51. The protective layer 70 may also be formed by other methods.

An electronic device 10 and a method for manufacturing the same according to another embodiment of the present invention will be described with reference to fig. 25 to 28. In the above embodiment, an example in which the 2 nd electrode 50 located on the organic layer 40 is removed to form the 2 nd electrode opening 51 is shown. Here, an example in which the 2 nd electrode 50 is formed with the 2 nd electrode opening 51 by removing a region not overlapping with the organic layer 40 in a plan view will be described.

Fig. 25 is a sectional view showing an example of the electronic device 10 of the present embodiment. As shown in fig. 25, the organic layer 40 does not face the 2 nd electrode opening 51 of the 2 nd electrode 50, and the end portion 47 of the organic layer 40 may overlap the 2 nd electrode 50 in a plan view.

Next, an example of a method for manufacturing the electronic device 10 shown in fig. 25 will be described.

First, as in the case of the above-described embodiment shown in fig. 5 and 6, the substrate 15 on which the 1 st electrode 30 is formed is prepared. Next, as shown in fig. 26, an organic layer forming step of forming an organic layer 40 on the 1 st electrode 30 is performed. As shown in fig. 26, there may be a gap between 2 adjacent organic layers 40 when viewed from above where no organic layer 40 is present.

Next, as shown in fig. 27, a 2 nd electrode forming step of forming a 2 nd electrode 50 is performed. In the 2 nd electrode forming step, as in the case of the above-described embodiment shown in fig. 5 and 6, the 2 nd electrode 50 is formed on the organic layer 40 and on the 1 st surface 16 of the substrate 15 so that the 2 nd electrode 50 overlaps 2 or more of the 1 st electrodes 30 in a plan view.

Next, as shown in fig. 28, a removing step is performed: the 2 nd electrode 50 is partially removed in a region not overlapping with the 1 st electrode 30 in a plan view, and a 2 nd electrode opening 51 is formed. As shown in fig. 28, in the removal step, the 2 nd electrode 50 may be partially removed in a region not overlapping with the organic layer 40 in a plan view to form a 2 nd electrode opening 51. As shown in fig. 28, the removing step may include an irradiation step of irradiating the 2 nd electrode 50 with laser light L1. By irradiating the 2 nd electrode 50 with the laser light L1, as shown in fig. 25, the 2 nd electrode opening 51 can be formed in the 2 nd electrode 50. In this way, the electronic device 10 including the 2 nd electrode 50 including the 2 nd electrode opening 51 can be obtained.

An electronic device 10 and a method for manufacturing the same according to another embodiment of the present invention will be described with reference to fig. 29 to 36.

A method of forming the organic layer 40 on the 1 st electrode 30 in this embodiment will be described. The organic layer forming step of forming the organic layer 40 includes a step of depositing an organic material on the substrate 15 using 2 or more vapor deposition masks 80. For example, 3 vapor deposition masks 80 are used.

Fig. 29 is a plan view showing an example of the 1 st vapor deposition mask 80A. The 1 st vapor deposition mask 80A includes a 1 st shielding region 82A and a 1 st through hole 81A. The 1 st through holes 81A may be arranged along the 3 rd direction D3 and the 4 th direction D4. The 1 st organic layer 40A is formed of the organic material that passes through the 1 st through hole 81A and adheres to the substrate 15.

Fig. 30 is a plan view showing an example of the 2 nd vapor deposition mask 80B. The 2 nd vapor deposition mask 80B includes a 2 nd shielding region 82B and a 2 nd through hole 81B. The 2 nd through holes 81B may be aligned along the 3 rd direction D3 and the 4 th direction D4. The 2 nd organic layer 40B is formed of the organic material that passes through the 2 nd through hole 81B and adheres to the substrate 15.

Fig. 31 is a plan view showing an example of the 3 rd vapor deposition mask 80C. The 3 rd vapor deposition mask 80C includes a 3 rd shielding region 82C and a 3 rd through hole 81C. The 3 rd through holes 81C may be arranged along the 1 st direction D1 and the 2 nd direction D2. The 3 rd organic layer 40C is formed of the organic material that passes through the 3 rd through hole 81C and adheres to the substrate 15.

The 2 or more vapor deposition masks 80 used for forming the organic layer 40 are also referred to as "vapor deposition mask set".

Next, the positional relationship among the 1 st vapor deposition mask 80A, the 2 nd vapor deposition mask 80B, and the 3 rd vapor deposition mask 80C will be described. Fig. 32 is a plan view showing an example of the mask layered body 85. The mask laminate 85 includes 2 or more stacked vapor deposition masks 80. The mask laminate 85 shown in fig. 32 includes a 1 st vapor deposition mask 80A, a 2 nd vapor deposition mask 80B, and a 3 rd vapor deposition mask 80C which are stacked.

In the mask layered body 85, the alignment marks of the vapor deposition masks 80A to 80C may overlap. Alternatively, the vapor deposition masks 80A to 80C may be overlapped with each other based on the arrangement of the through holes 81A to 81C and the shielding regions 82A to 82C of the vapor deposition masks 80A to 80C. When the vapor deposition masks 80A to 80C are stacked, tension may be applied to the vapor deposition masks 80A to 80C, or no tension may be applied.

A diagram of a state in which 2 or more vapor deposition masks 80 are superimposed can be obtained by superimposing image data of the respective vapor deposition masks 80. For example, first, image data relating to the outlines of the through holes 81A to 81C of the vapor deposition masks 80A to 80C is acquired by using an imaging device. Next, the image data of the vapor deposition masks 80A to 80C are superimposed by using an image processing apparatus. This makes it possible to produce the diagram of fig. 32. In acquiring the image data, tension may be applied to the vapor deposition masks 80A to 80C, or no tension may be applied. A diagram of a state in which 2 or more vapor deposition masks 80 are stacked can be obtained by stacking design diagrams for manufacturing the vapor deposition masks 80A to 80C.

In fig. 32, the outline of the 1 st through hole 81A is indicated by a chain line, the outline of the 2 nd through hole 81B is indicated by a broken line, and the outline of the 3 rd through hole 81C is indicated by a solid line. The mask laminate 85 includes an overlap shielding region 83. The overlapped shielding region 83 is a region where the shielding regions 82A to 82C of the vapor deposition masks 80 overlap each other in a plan view.

A part of the overlap shielding region 83 may be located between the 1 st through hole 81A and the 2 nd through hole 81B adjacent to each other in the 1 st direction D1 and between the 2 rd through holes 81C adjacent to each other in the 2 nd direction D2. The other overlap shielding regions 83 may be located between 23 rd through holes 81C adjacent to each other in the 1 st direction D1 and between the 1 st through hole 81A and the 2 nd through hole 81B adjacent to each other in the 2 nd direction D2.

Fig. 33 is a plan view showing an example of the organic layers 40A to 40C formed by using the vapor deposition masks 80A to 80C of fig. 29 to 31. The organic material constituting the 1 st organic layer 40A, the organic material constituting the 2 nd organic layer 40B, and the organic material constituting the 3 rd organic layer 40C do not reach the substrate 15 at positions overlapping the shielding regions 83. In this case, the organic layer 40 includes an organic layer opening 41. The organic layer opening 41 is generated at a position corresponding to the overlap shielding region 83.

A portion of the organic layer openings 41 may be located between the 1 st and 2 nd organic layers 40A and 40B adjacent in the 1 st direction D1 and between the 2 rd and 3 rd organic layers 40C adjacent in the 2 nd direction D2. The other organic layer openings 41 may be located between 23 rd organic layers 40C adjacent in the 1 st direction D1 and between the 1 st and 2 nd organic layers 40A and 40B adjacent in the 2 nd direction D2.

Fig. 34 is a plan view showing an example of the 2 nd electrode 50 formed on the organic layers 40A to 40C of fig. 33. The 2 nd electrode 50 includes a region overlapping the organic layers 40A to 40C in a plan view and a region overlapping the organic layer opening 41 in a plan view. The 2 nd electrode 50 may be formed on the entire area of the display region of the electronic device 10. The 2 nd electrode 50 may include a layer continuously developed without a gap. The 2 nd electrode 50 may be formed of 1 layer continuously developed without a gap. The 2 nd electrode 50 can be formed by 1 deposition process.

The removing step may locally remove a region of the 2 nd electrode 50 overlapping the organic layer opening 41 in a plan view. For example, in the removal step, a region of the 2 nd electrode 50 overlapping the organic layer opening 41 in a plan view may be irradiated with laser light. Thereby, the 2 nd electrode opening 51 is formed in the 2 nd electrode 50. Fig. 35 is a plan view showing an example of the 2 nd electrode 50 in which the 2 nd electrode opening 51 is formed. The 2 nd electrode opening 51 overlaps the organic layer opening 41 in a plan view. The 2 nd electrode opening 51 may be surrounded by the organic layer opening 41 in a plan view. A part of the 2 nd electrode 50 may overlap the organic layer opening 41 in a plan view.

Fig. 36 is a cross-sectional view of electronic device 10 of fig. 35 viewed along line XXXVI-XXXVI. As shown in fig. 36, the outer edge 51a of the 2 nd electrode opening 51 may be positioned inside the end portion 47 of the organic layer 40. In this case, as shown in fig. 36, the 2 nd electrode 50 may overlap with the side surface 42 of the organic layer 40 in a plan view. The "inner side" refers to a side close to the center of the 2 nd electrode opening 51 in plan view.

The symbol K1 indicates the distance from the outer edge 51a of the 2 nd electrode opening 51 to the end 47 of the organic layer 40 in plan view. The distance K1 may be, for example, 0.1 μm or more, 0.5 μm or more, or 1.0 μm or more. The distance K1 may be, for example, 2.0 μm or less, 4.0 μm or less, or 8.0 μm or less. The range of the distance K1 may be determined by group 1 consisting of 0.1 μm, 0.5 μm and 1.0 μm and/or group 2 consisting of 2.0 μm, 4.0 μm and 8.0 μm. The range of the distance K1 may be determined by a combination of any 1 of the values contained in the above-mentioned group 1 and any 1 of the values contained in the above-mentioned group 2. The range of the distance K1 may be determined by a combination of any 2 of the values contained in the above-mentioned group 1. The range of the distance K1 may be determined by a combination of any 2 of the values contained in the above-mentioned group 2. For example, it may be 0.1 μm to 8.0 μm, may be 0.1 μm to 4.0 μm, may be 0.1 μm to 2.0 μm, may be 0.1 μm to 1.0 μm, may be 0.1 μm to 0.5 μm, may be 0.5 μm to 8.0 μm, may be 0.5 μm to 4.0 μm, may be 0.5 μm to 2.0 μm, may be 0.5 μm to 1.0 μm, may be 1.0 μm to 8.0 μm, may be 1.0 μm to 4.0 μm, may be 1.0 μm to 2.0 μm, may be 2.0 μm to 8.0 μm, may be 2.0 μm to 4.0 μm, or 4.0 μm.

According to the present embodiment, the 2 nd electrode 50 includes a region overlapping with the organic layer opening 41 in a plan view. In other words, the removal step is performed without irradiating the organic layer 40 with laser light. This can suppress scattering of the material of the organic layer 40. Therefore, the electronic device 10 can be suppressed from being contaminated by the material of the scattered organic layer 40.

An electronic device 10 according to another embodiment of the present invention will be described with reference to fig. 37 to 41. Fig. 37 is a plan view showing an example of the electronic device 10. The electronic device 10 is, for example, a smartphone.

As shown in fig. 37, the electronic device 10 may include a 1 st display region 101 and a 2 nd display region 102. The 2 nd display region 102 may have an area smaller than that of the 1 st display region 101. As shown in fig. 37, the 2 nd display area 102 may be surrounded by the 1 st display area 101. Although not shown, a part of the outer edge of the 2 nd display region 102 may be positioned on the same straight line as a part of the outer edge of the 1 st display region 101.

Fig. 38 is an enlarged plan view of the 2 nd display area 102 and its surroundings in fig. 37. In the 1 st display region 101, the elements 20 may be arranged in different 2 directions. In the example shown in fig. 38, the elements 20 of the 1 st display region 101 may be arranged along the 3 rd direction D3 and the 4 th direction D4.

The element 20 comprises a 2 nd electrode 50. The 2 nd electrode 50 positioned in the 1 st display region 101 is also denoted as a 2 nd electrode 50X. The 2 nd electrode 50 positioned in the 2 nd display area 102 is also referred to as a 2 nd electrode 50Y.

The 2 nd electrode 50X has the 1 st occupancy. The 1 st occupancy is calculated by dividing the total area of the 2 nd electrode 50 located in the 1 st display region 101 by the area of the 1 st display region 101. The 2 nd electrode 50Y has a 2 nd occupancy. The 2 nd occupancy is calculated by dividing the total area of the 2 nd electrode 50 located in the 2 nd display region 102 by the area of the 2 nd display region 102. The 2 nd occupancy may be less than the 1 st occupancy. For example, as shown in fig. 38, the 2 nd display area 102 may include the 2 nd electrode opening 51. The 2 nd electrode opening 51 may not overlap with the 2 nd electrode 50Y in a plan view.

The ratio of the 2 nd occupancy to the 1 st occupancy may be, for example, 0.2 or more, 0.3 or more, or 0.4 or more. The ratio of the 2 nd occupancy to the 1 st occupancy may be, for example, 0.6 or less, 0.7 or less, or 0.8 or less. The range of the ratio of the 2 nd occupancy to the 1 st occupancy may be determined by the 1 st group consisting of 0.2, 0.3 and 0.4 and/or the 2 nd group consisting of 0.6, 0.7 and 0.8. The range of the ratio of the 2 nd occupancy to the 1 st occupancy may be determined by a combination of any 1 of the values included in the 1 st group and any 1 of the values included in the 2 nd group. The range of the ratio of the 2 nd occupancy to the 1 st occupancy may be determined by a combination of any 2 of the values contained in the above-described 1 st group. The range of the ratio of the 2 nd occupancy to the 1 st occupancy may be determined by a combination of any 2 of the values contained in the above-described 2 nd group. For example, the content may be 0.2 to 0.8, 0.2 to 0.7, 0.2 to 0.6, 0.2 to 0.4, 0.2 to 0.3, 0.3 to 0.8, 0.3 to 0.7, 0.3 to 0.6, 0.3 to 0.4, 0.4 to 0.8, 0.4 to 0.7, 0.4 to 0.6, 0.6 to 0.8, 0.6 to 0.7, or 0.7 to 0.8.

In the case where the 2 nd occupancy is smaller than the 1 st occupancy, the 2 nd display region 102 has a higher transmittance than the 1 st display region 101. In this case, in the 2 nd display region 102, the light reaching the electronic device 10 easily reaches the optical member and the like on the back surface side of the substrate 15. The optical component is a component that realizes a certain function by detecting light, such as a camera. The function of the 2 nd display area 102 realized by detecting light is, for example, a camera, a fingerprint sensor, a face recognition sensor, or the like.

The 2 nd electrode 50 of the 1 st display region 101 may be spread over substantially the entire region of the 1 st display region 101. For example, the 1 st occupancy may be 90% or more, 95% or more, 98% or more, 99% or more, 99.5% or more, 99.9% or more, or 100%.

Fig. 39 is a plan view showing an example of the 1 st display region 101. As shown in fig. 38 and 39, the elements 20 of the 1 st display region 101 may be arranged in the 3 rd direction D3 at the 31 st period P31. The elements 20 of the 1 st display region 101 may be arranged in the 41 th period P41 along the 4 th direction D4.

Fig. 40 is a plan view showing an example of the 2 nd display area 102. Fig. 41 is a plan view showing an example of the organic layer 40 in the 2 nd display region 102. As shown in fig. 38, 40, and 41, the elements 20 of the 2 nd display region 102 may be arranged at a 32 nd period P31 along the 3 rd direction D3. The 32 nd period P32 may be greater than the 31 st period P31. The elements 20 of the 2 nd display region 102 may be arranged at a 42 th period P42 along the 4 th direction D4. The 42 th period P42 may be greater than the 41 th period P41.

Since the 2 nd display region 102 includes the element 20, when the element 20 is a pixel, an image can be displayed in the 2 nd display region 102. As described above, in the 2 nd display region 102, the light reaching the electronic device 10 easily reaches the optical member and the like on the back surface side of the substrate 15. Therefore, the 2 nd display region 102 can detect light and display an image.

The ratio of the 32 nd cycle P32 to the 31 st cycle P31 may be 1.1 or more, 1.3 or more, or 1.5 or more, for example. The ratio of the 32 nd period P32 to the 31 st period P31 may be 2.0 or less, 3.0 or less, or 4.0 or less, for example. The range of the ratio of the 32 nd period P32 to the 31 st period P31 may be determined by group 1 consisting of 1.1, 1.3, and 1.5 and/or group 2 consisting of 2.0, 3.0, and 4.0. The range of the ratio of the 32 nd period P32 to the 31 st period P31 may be determined by a combination of any 1 of the values contained in the above-described 1 st group and any 1 of the values contained in the above-described 2 nd group. The range of the ratio of the 32 nd period P32 to the 31 st period P31 may be determined by a combination of any 2 of the values contained in the above-described group 1. The range of the ratio of the 32 nd period P32 to the 31 st period P31 may be determined by a combination of any 2 of the values contained in the above-described group 2. For example, it may be 1.1 to 4.0, 1.1 to 3.0, 1.1 to 2.0, 1.1 to 1.5, 1.1 to 1.3, 1.3 to 4.0, 1.3 to 3.0, 1.3 to 2.0, 1.3 to 1.5, 1.5 to 4.0, 1.5 to 3.0, 1.5 to 2.0, 2.0 to 4.0, 2.0 to 3.0, 3.0 to 4.0. In the case where the ratio of the 32 nd period P32 to the 31 st period P31 is small, the difference in the pixel density of the 2 nd display area 102 to the pixel density of the 1 st display area 101 decreases. This can suppress the occurrence of a visual difference between the 1 st display region 101 and the 2 nd display region 102.

As the numerical range of the ratio of the 42 th period P42 to the 41 st period P41, the above numerical range of the ratio of the 32 nd period P32 to the 31 st period P31 can be adopted.

In each of the above embodiments, an example in which the 2 nd electrode 50 is partially removed by irradiating the 2 nd electrode 50 with laser light is shown. However, the method of locally removing the 2 nd electrode 50 is not limited to laser irradiation. For example, the 2 nd electrode 50 may be partially removed by etching such as dry etching or wet etching.

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