阅读说明：本技术 避免并联式半导体开关中的寄生振荡的方法及对应的装置 (Method for avoiding parasitic oscillations in parallel semiconductor switches and corresponding device ) 是由 廖柱帮 于 2020-06-01 设计创作，主要内容包括：本公开实施例提供了避免并联式半导体开关中的寄生振荡的方法及对应的装置。根据本公开实施例的方法包括：给多个并联的功率器件设置不均衡的驱动阻抗,使得仅一个功率器件控制所述开关的开启过渡以及仅一个功率器件控制所述开关的关闭过渡。根据本公开实施例,避免了开关转换期间的寄生振荡,并且不需要阻抗匹配,对切换特性的影响也小。(The disclosed embodiments provide a method and corresponding apparatus for avoiding parasitic oscillations in a parallel semiconductor switch. The method according to the embodiment of the disclosure comprises the following steps: an unbalanced driving impedance is set for a plurality of parallel power devices such that only one power device controls an on transition of the switch and only one power device controls an off transition of the switch. According to the embodiments of the present disclosure, parasitic oscillation during switching transition is avoided, and impedance matching is not required, and the influence on switching characteristics is small.)

1. A control method for a semiconductor switch, wherein the semiconductor switch comprises a plurality of power devices connected in parallel, the method comprising:

the plurality of parallel power devices are provided with a driving impedance of imbalance 1 such that only one power device controls the on-transition of the switch and only one power device controls the off-transition of the switch.

2. The method of claim 1, wherein the power devices comprise metal semiconductor field effect transistors (MOSFETs), bipolar transistors (BJTs), and Insulated Gate Bipolar Transistors (IGBTs).

3. The method of claim 1 or 2, wherein causing only one power device to control an on transition of the switch and only one power device to control an off transition of the switch comprises any one of:

when the switch is turned on, the power device for controlling the turn-on transition of the switch is turned on first, and other power devices start to be turned on after the power device is in a saturation region; and

when the switch is closed, the power device which controls the closing transition of the switch is enabled to be switched off after other power devices are in a cut-off region.

4. The method of claim 3, wherein the power device controlling the turn-on transition of the switch is turned on first when the switch is turned on, and the other power devices start to be turned on after the power device is in a saturation region by:

and setting the conduction driving impedance of the power device for controlling the opening transition of the switch to be smaller than the conduction driving impedances of other power devices, wherein the conduction driving impedance is the driving impedance of the control end of the power device when the switch is opened.

5. The method of claim 4, wherein the on-drive impedances of the plurality of parallel-connected power devices satisfy the following condition:

wherein R is_{g_on}Is the on-drive impedance, R, of the power device controlling the turn-on transition of the switch_{g_other_on}Is the on-drive impedance, V, of other power devices_drvIs the turn-on drive voltage, V, of the power device_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

6. The method of claim 3, wherein the closing of a switch is achieved such that the power device controlling the closing transition of the switch begins to turn off after the other power devices are in the cutoff region:

and setting the turn-off driving impedance of the power device controlling the turn-off transition of the switch to be larger than the turn-off driving impedances of other power devices, wherein the turn-off driving impedance is the driving impedance of the control end of the power device when the switch is turned off.

7. The method of claim 6, wherein the off drive impedances of the plurality of parallel power devices satisfy the following condition:

wherein R is_{g_off}Is the turn-off drive impedance, R, of the power device controlling the turn-off transition of the switch_{g_other_off}Is the turn-off driving impedance, V, of other power devices_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

8. The method of claim 1 or 2, wherein the control terminal of at least one of the plurality of parallel power devices that controls the conduction transition of the switch is connected to a parallel drive circuit comprising:

a first branch consisting of a diode and a first impedance, and

and a second branch consisting of a diode and a second impedance.

9. The method of claim 1 or 2, wherein the control terminal of at least one of the plurality of parallel power devices that controls the turn-off transition of the switch is connected to a parallel drive circuit comprising:

a first branch consisting of a diode and a third impedance, and

and a second branch consisting of a diode and a fourth impedance.

10. A method according to claim 1 or 2, wherein the one power device controlling the on-transition of the switch and the one power device controlling the off-transition of the switch are different power devices.

11. A semiconductor switch comprising a plurality of power devices connected in parallel, characterized in that:

the plurality of parallel power devices have unequal control terminal drive impedances such that only one power device controls an on transition of the switch and only one power device controls an off transition of the switch.

12. The switch of claim 11, wherein the power device comprises a metal semiconductor field effect transistor (MOSFET), a bipolar transistor (BJT), and an Insulated Gate Bipolar Transistor (IGBT).

13. The switch of claim 11 or 12, wherein the conducting driving impedance of the power device controlling the turn-on transition of the switch is set to be smaller than the conducting driving impedances of the other power devices, wherein the conducting driving impedance is the driving impedance of the control terminal of the power device when the switch is turned on.

14. The switch of claim 13, wherein the on-drive impedances of the plurality of parallel-connected power devices satisfy the following condition:

wherein R is_{g_on}Is the on-drive impedance, R, of the power device controlling the turn-on transition of the switch_{g_other_on}Is the on-drive impedance, V, of other power devices_drvIs the turn-on drive voltage, V, of the power device_{th_min}And V_{th_max}Minimum and maximum turn-on thresholds of the power device, respectively，C_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

15. The switch of claim 11 or 12, wherein the off drive impedance of the power device controlling the off transition of the switch is set to be greater than the off drive impedance of the other power devices, wherein the off drive impedance is the drive impedance of the control terminal of the power device when the switch is off.

16. The switch of claim 15, wherein the turn-off drive impedances of the plurality of parallel power devices satisfy the following condition:

wherein R is_{g_off}Is the turn-off drive impedance, R, of the power device controlling the turn-off transition of the switch_{g_other_off}Is the turn-off driving impedance, V, of other power devices_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_dg__maxRespectively, the minimum and maximum reverse transfer capacitances of the power device.

17. The switch of claim 11 or 12, wherein the control terminal of at least one of the plurality of parallel-connected power devices that controls the conduction transition of the switch is connected to a parallel drive circuit comprising:

a first branch consisting of a diode and a first impedance, and

and a second branch consisting of a diode and a second impedance.

18. The switch of claim 11 or 12, wherein the control terminal of at least one of the plurality of parallel-connected power devices that controls the turn-off transition of the switch is connected to a parallel drive circuit comprising:

a first branch consisting of a diode and a first impedance, and

and a second branch consisting of a diode and a second impedance.

19. The switch of claim 10 or 11, wherein the one power device that controls the on-transition of the switch and the one power device that controls the off-transition of the switch are different power devices.

Technical Field

The present invention relates to parallel semiconductor switches, and more particularly to a method and a corresponding arrangement for avoiding parasitic oscillations in parallel semiconductor switches.

Background

The switching power supply is a high-frequency electric energy conversion device, which mainly utilizes power semiconductor devices (including but not limited to metal semiconductor field effect transistors MOSFET, bipolar transistors BJT, insulated gate bipolar transistors IGBT and the like) to periodically turn on and turn off electronic switching devices through a control circuit, and the power semiconductor devices (hereinafter referred to as power devices) perform pulse modulation on input voltage, so that the functions of voltage conversion, output voltage regulation and automatic voltage regulation are realized. The switching power supply is therefore also referred to as a power converter.

In applications requiring large currents, it is sometimes desirable to operate power semiconductor devices (e.g., MOSFETs) acting as switches in a power converter in parallel (hereinafter such switches are also referred to as parallel semiconductor switches and the corresponding power supplies are referred to as parallel switch operated power supplies) because this may reduce conduction losses, increase surface area to reduce thermal resistance to the heat sink, and be scalable for high power handling.

It is not uncommon for parallel switch operated power supplies to fail, which appears to occur randomly. After replacement of a faulty semiconductor switch, the problem can sometimes be solved and sometimes still exists in the faulty converter unit. Over stress (overstress) is not typically observed in power devices during steady state operation. Detailed analysis shows that depending on the combination of power devices installed for parallel operation, parasitic oscillations may occur during the transition of the switching transition. Parasitic oscillations can create internal overstress that is not easily observable outside the device. When parasitic oscillations occur, internal overstress can damage a relatively weak control terminal, such as the junction between the gate and source of a MOSFET, causing failure.

One of the reasons that parasitic oscillation is easily generated in the parallel operation of the power devices is: during the switching transition that triggers the parasitic oscillation, the switching current is redistributed between the power devices, triggering the parasitic oscillation. The redistribution of switching current is typically due to slight differences in turn-on or turn-off times between devices (due to different turn-on and turn-off thresholds of the devices and/or different drive impedances), resulting in each device adding switching action at different times in the linear operating region during switching transitions. Since the parasitic oscillations depend on the parasitic parameters of the power devices operating in parallel, potential problems may not be observed during the development stage, but usually do not occur until after the start of mass production. This presents potential reliability issues for parallel operation of the power devices.

One existing solution is to propose to match all the driving impedances of the power devices in order to turn all the power devices in parallel on and off simultaneously, but this solution is impractical in case of mass production.

Another existing solution is to propose an increase in drive resistance to suppress parasitic oscillations, but this solution increases switching losses and switching time.

For this reason, a solution is needed to avoid parasitic oscillations in the parallel semiconductor switches.

Disclosure of Invention

Contrary to the idea of matching impedances in the prior art, embodiments of the present disclosure propose to introduce an unbalanced driving impedance in the parallel semiconductor switch to ensure that only one of the plurality of power devices operating in parallel is turned on and off during the transition of the switching transition, thereby ensuring that no switching current is redistributed within the linear operating region, thereby preventing parasitic oscillations from occurring between the power devices operating in parallel.

According to a first aspect of the present disclosure, a control method for a semiconductor switch is provided, wherein the semiconductor switch comprises a plurality of power devices connected in parallel. The method comprises the following steps: setting an unbalanced driving impedance to the plurality of parallel power devices such that only one power device controls an on transition of the switch and only one power device controls an off transition of the switch.

According to a second aspect of the present disclosure, there is provided a semiconductor switch comprising a plurality of power devices connected in parallel, characterized in that: the plurality of parallel power devices have unequal control terminal drive impedances such that only one power device controls an on transition of the switch and only one power device controls an off transition of the switch.

In some embodiments, the power device may be a MOSFET. In other embodiments, the power device may be a bipolar transistor. In still other embodiments, the power device may be an IGBT.

In some embodiments, having only one power device controlling the on transition of the switch and only one power device controlling the off transition of the switch may include any of:

when the switch is turned on, the power device for controlling the turn-on transition of the switch is turned on first, and other power devices start to be turned on after the power device is in a saturation region; and

when the switch is closed, the power device which controls the closing transition of the switch is enabled to be switched off after other power devices are in a cut-off region.

In some embodiments, when a switch is turned on, the power device that controls the turn-on transition of the switch is turned on first, and other power devices start to be turned on after the power device is in a saturation region: setting the conduction driving impedance of the power device controlling the turn-on transition of the switch to be smaller than the conduction driving impedances of the other power devices. Wherein the on-drive impedance is the drive impedance of the control terminal of the power device when the switch is turned on.

Optionally, the on-drive impedances of the plurality of parallel power devices satisfy the following condition:

wherein R is_{g_on}Is the on-drive impedance, R, of the power device controlling the turn-on transition of the switch_{g_other_on}Is the on-drive impedance, V, of other power devices_drvIs the turn-on drive voltage, V, of the power device_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

In some embodiments, the closing of the switch may be implemented such that the power device controlling the closing transition of the switch begins to turn off after the other power devices are in the cut-off region: and setting the turn-off driving impedance of the power device controlling the turn-off transition of the switch to be larger than the turn-off driving impedances of other power devices, wherein the turn-off driving impedance is the driving impedance of the control end of the power device when the switch is turned off.

Optionally, the turn-off driving impedances of the plurality of parallel power devices satisfy the following condition:

wherein R is_{g_off}Is controlling said switchTurn-off drive impedance, R, of the power device that is turned off for the transition_{g_other_off}Is the turn-off driving impedance, V, of other power devices_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

In some embodiments, the control terminal of at least one of the plurality of parallel power devices that controls the conduction transition of the switch is connected to a parallel drive circuit, the parallel drive circuit comprising:

a first branch consisting of a diode and a first impedance, and

and a second branch consisting of a diode and a second impedance.

In some embodiments, the control terminal of at least one of the plurality of parallel power devices that controls the turn-off transition of the switch is connected to a parallel drive circuit, the parallel drive circuit comprising:

a first branch consisting of a diode and a third impedance, and

and a second branch consisting of a diode and a fourth impedance.

In some embodiments, the power device that controls the on transition of the switch and the power device that controls the off transition of the switch are different power devices.

In other embodiments, the power device that controls the conduction transition of the switch and the power device that controls the closing transition of the switch may be the same power device.

According to the embodiments of the present disclosure, parasitic oscillation of the parallel type semiconductor switch during switching transition is avoided, and impedance matching is not required, and the influence on the switching characteristics (such as switching loss and switching speed) is small.

Drawings

The above and other features of the present disclosure will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which:

fig. 1 schematically shows a schematic diagram of a parallel semiconductor switch according to an embodiment of the invention.

Fig. 2 schematically shows a schematic diagram of a parallel semiconductor switch according to another embodiment of the invention.

In the drawings, like reference characters designate the same or similar elements.

Detailed Description

The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the present disclosure should not be limited to the specific embodiments described below. In addition, for the sake of brevity, detailed descriptions of well-known technologies not directly related to the present disclosure are omitted to prevent confusion of understanding of the present disclosure.

In order to avoid parasitic oscillation in the parallel semiconductor switch, the disclosed embodiment proposes: it is ensured that only one of the plurality of power devices operating in parallel is switched on and off during a transition of a switching transition of the parallel semiconductor switch. That is, only one power device controls the on transition of the switch, and only one power device controls the off transition of the switch.

The power devices used to control the on-transitions of the switches and the power devices used to control the off-transitions of the switches may be the same or different. Since the switching losses will be concentrated on the devices selected to control the on-transitions and off-transitions, in most cases it is preferred, but not limited to, to select different devices to control the on-transitions and off-transitions separately to share the heat generated due to the switching losses.

In the following embodiments, a MOSFET will be mainly used as an example of a power semiconductor device, but it should be understood that the embodiments of the present invention are also applicable to switches formed by connecting other types of power semiconductor devices in parallel, such as an insulated gate bipolar transistor IGBT or a bipolar transistor BJT.

Fig. 1 schematically shows a schematic diagram of a parallel semiconductor switch according to an embodiment of the invention.

As shown, the parallel semiconductor switch includes a plurality of power devices Q1, Q2.. Qn. It should be understood that although only three power devices are shown in fig. 1, the parallel semiconductor switch may include more or fewer (e.g., two) power devices, and the present disclosure is not limited in the number of power devices to that shown. Furthermore, although the power device is shown as a MOSFET in fig. 1, it may be other power semiconductor devices, such as a bipolar transistor BJT, etc., in other embodiments.

In the example of fig. 1, an example of using an unbalanced (i.e., different) drive impedance to select power devices for controlling on-transitions and off-transitions is shown. Specifically, in this example, Q1 is selected to control the power devices for the on transition, while Qn is selected to control the power devices for the off transition.

For the sake of design and description, the drive circuit of each power device Qi (i 1, 2.) includes two branches, which are activated during the on-period and the off-period of the switch, respectively, by the configuration of the diodes. As shown, due to the configuration of the diodes in the driver circuit, Rg _ on is the on drive impedance of the selected power device Q1 that controls the conduction transition, while Rg _ other _ on is the on drive impedance of all other power devices connected in parallel. Herein, the on-drive impedance refers to a drive impedance of a control terminal of the power device when the switch is turned on, such as a drive impedance of a gate during the turn-on of the switch of a MOSFET Qi (i ═ 1, 2. -).

Rg _ off is the turn-off drive impedance of the selected power device Qn that controls the turn-off transition, and Rg _ other _ off is the turn-off drive impedance of all other power devices connected in parallel. Herein, the turn-off driving impedance refers to a driving impedance of a control terminal of the power device when the switch is turned off, such as a driving impedance of a gate during turn-off of the switch in fig. 1 of a MOSFET Qi (i-1, 2).

To ensure that the device Q1 selected to control the conduction transition in this example is the only device that will conduct during the switch conduction transition, the on drive impedance of the device may be determined according to the miller effect equation. The basic idea is that when a selected power device Q1 is in a conducting transition, the falling slope of the voltage VDS across the drain and source of Q1 should keep all other power devices Qj (j ≠ 1) in parallel off due to the miller effect. This will result in the following equation:

wherein R is_{g_on}Is the on-drive impedance, R, of the power device (i.e., Q1 in this example) controlling the turn-on transition of the switch_{g_other_on}Is the on-drive impedance, V, of other power devices_drvIs the turn-on drive voltage, V, of the power device_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

When equation (1) is satisfied, only the selected power device Q1 will participate in the conduction transition of the switch, while all other power devices connected in parallel will only conduct with a Zero Voltage Switch (ZVS) after the conduction transition is over.

It should be understood that the on-drive impedance R of the other power devices shown in FIG. 1_{g_other_on}May be the same or different as long as the on-drive impedance R is different for each of the other powers_{g_other_on}Satisfying equation (1) ensures that the device Q1 selected to control the conduction transition is the only device that will conduct during the conduction transition of the switch.

To ensure that the device Qn selected for controlling the turn-off transition in this example is the only device that will be turned off during the switch turn-off transition, this device Qn should be the device that has the largest turn-off drive impedance Rg _ off that is turned off last. This means that all other devices connected in parallel have a lower turn-off drive impedance and will turn off at ZVS before Qn begins to turn off. In addition, to prevent other devices from being turned on during the turn-off transition of the selected device Qn, the turn-off drive impedance may also be determined according to the miller effect equation. The basic idea is that when a selected power device Qn is in an off transition, the rising slope of VDS of Qn should keep all other devices Qj (j ≠ n) in parallel off due to the miller effect. This will result in the following equation:

wherein R is_{g_off}Is the off drive impedance, R, of the power device (i.e., Qn in this example) that controls the turn-off transition of the switch_{g_other_off}Is the turn-off driving impedance, V, of other power devices_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

When equation (2) is satisfied, only the selected power device Qn will participate in the turn-off transition of the switch, and all other power devices connected in parallel have been turned off at ZVS before Qn begins the turn-off transition.

It should be understood that the off drive impedance R of the other power devices shown in FIG. 1_{g_other_off}May be the same or different, as long as the off drive impedance R for each of the other powers_{g_other_off}Satisfying equation (2) ensures that the device selected for controlling the turn-off transition Qn is the only device that will turn off during the turn-off transition of the switch.

With the present embodiment, parasitic oscillations due to the parallel operation of the power devices can be avoided. In addition, for parallel operation, switching characteristics do not have to be sacrificed, such as not significantly affecting switching losses and switching speed. The desired turn-on characteristic may be determined by Rg _ on and Rg _ other _ on alone according to equation (1), and the desired turn-off characteristic may be determined by Rg _ off and Rg _ other _ off alone according to equation (2).

It should be understood that the configuration of fig. 1 is by way of example only. The drive circuit of the parallel power device is not limited to the configuration using the diode and the resistor shown in fig. 1, but may be any configuration capable of providing a drive impedance satisfying equations (1) and (2).

For example, in the example of fig. 1, the on driving impedance and the off driving impedance are separately designed and illustrated by arranging diodes for convenience of design and illustration. However, in practice, Rg _ other _ on and Rg _ other _ off may not be separately designed but have the same impedance, as shown in FIG. 2.

Fig. 2 schematically shows a schematic diagram of a parallel semiconductor switch according to another embodiment of the invention.

Similar to fig. 1, Q1 is selected to control the power devices for the on-transition, while Qn is selected to control the power devices for the off-transition. The driving circuit of the control terminals of Q1 and Qn still comprises two branches, which are made active during the on-period and the off-period of the switch respectively by the configuration of the diodes. The difference from the circuit in fig. 1 is that the driver circuit for the power devices not selected to control the conduction and turn-off transitions is simplified, no longer having two legs whose driving impedances Rg _ other _ on and Rg _ other _ off upon turning on and off of the switch are the same, both Rg _ other.

Rg _ other _ on and Rg _ other _ off in equations (1) and (2) are both replaced with Rg _ other. The following equations (3) and (4) can be obtained:

wherein R is_{g_on}Is the on-drive impedance, R, of the power device (i.e., Q1 in this example) controlling the turn-on transition of the switch_{g_off}Is the off drive impedance, R, of the power device (i.e., Qn in this example) that controls the turn-off transition of the switch_{g_other}Is the driving impedance, V, of other power devices_drvIs the turn-on drive voltage, V, of the power device_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

When equations (3) and (4) are satisfied, it can be ensured that only the selected power device Q1 will participate in the on-transition of the switch, while all other power devices connected in parallel will only turn on with Zero Voltage Switching (ZVS) after the on-transition is over, and that only the selected power device Qn will participate in the off-transition of the switch, and all other power devices connected in parallel will have turned off with ZVS before Qn begins the off-transition.

In the above embodiments, the MOSFET is used as an example of the power semiconductor device, but it should be understood that the embodiments of the present invention are also applicable to switches formed by connecting other types of power semiconductor devices in parallel, such as an insulated gate bipolar transistor IGBT or a bipolar transistor. When using other power semiconductor devices in parallel as switches, the driving circuit will vary accordingly with the type of power device, but still obey the basic idea of the present disclosure, i.e. to set an unbalanced driving impedance to a plurality of power devices in parallel, such that only one power device controls the on-transition of the switch and only one power device controls the off-transition of the switch.

According to another aspect of the present disclosure, a control method for a parallel semiconductor switch is also provided. The method comprises the following steps: setting an unbalanced driving impedance to the plurality of parallel power devices such that only one power device controls an on transition of the switch and only one power device controls an off transition of the switch.

In some embodiments, the power device may be a MOSFET. In other embodiments, the power device may be a bipolar transistor BJT. In still other embodiments, the power device may be an IGBT.

In some embodiments, having only one power device controlling the on transition of the switch and only one power device controlling the off transition of the switch may include any of:

when the switch is turned on, the power device for controlling the turn-on transition of the switch is turned on first, and other power devices start to be turned on after the power device is in a saturation region; and

when the switch is closed, the power device which controls the closing transition of the switch is enabled to be switched off after other power devices are in a cut-off region.

In some embodiments, when a switch is turned on, the power device that controls the turn-on transition of the switch is turned on first, and other power devices start to be turned on after the power device is in a saturation region: setting the conduction driving impedance of the power device controlling the turn-on transition of the switch to be smaller than the conduction driving impedances of the other power devices. Wherein the on-drive impedance is the drive impedance of the control terminal of the power device when the switch is turned on.

Optionally, the on-drive impedances of the plurality of parallel power devices satisfy the following condition:

wherein R is_{g_on}Is the on-drive impedance, R, of the power device controlling the turn-on transition of the switch_{g_other_on}Is the on-drive impedance, V, of other power devices_drvIs the turn-on drive voltage, V, of the power device_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

In some embodiments, the closing of the switch may be implemented such that the power device controlling the closing transition of the switch begins to turn off after the other power devices are in the cut-off region: and setting the turn-off driving impedance of the power device controlling the turn-off transition of the switch to be larger than the turn-off driving impedances of other power devices, wherein the turn-off driving impedance is the driving impedance of the control end of the power device when the switch is turned off.

Optionally, the turn-off driving impedances of the plurality of parallel power devices satisfy the following condition:

wherein R is_{g_off}Is the turn-off drive impedance, R, of the power device controlling the turn-off transition of the switch_{g_other_off}Is the turn-off driving impedance, V, of other power devices_{th_min}And V_{th_max}Minimum and maximum conduction thresholds, C, of the power device, respectively_{dg_min}And C_{dg_max}Respectively, the minimum and maximum reverse transfer capacitances of the power device.

In some embodiments, the control terminal of at least one of the plurality of parallel power devices that controls the conduction transition of the switch is connected to a parallel drive circuit, the parallel drive circuit comprising:

a first branch consisting of a diode and a first impedance, and

and a second branch consisting of a diode and a second impedance.

In some embodiments, the control terminal of at least one of the plurality of parallel power devices that controls the turn-off transition of the switch is connected to a parallel drive circuit, the parallel drive circuit comprising:

a first branch consisting of a diode and a third impedance, and

and a second branch consisting of a diode and a fourth impedance.

In some embodiments, the power device that controls the on transition of the switch and the power device that controls the off transition of the switch are different power devices.

In other embodiments, the power device that controls the conduction transition of the switch and the power device that controls the closing transition of the switch may be the same power device.

The control method for the parallel semiconductor switch according to the embodiment of the disclosure can avoid parasitic oscillation of the parallel semiconductor switch during switching conversion. For specific details, reference may be made to the description of the circuits shown in fig. 1 and fig. 2, which are not described herein again.

It should be understood that in the foregoing description, the technical solutions of the present application are shown by way of example only, and the present application is not meant to be limited to the circuit structures and method steps described above. Where possible, the circuit structures and method steps may be modified or eliminated as desired. Accordingly, certain steps and elements are not essential elements for implementing the general inventive concept of the present application. Therefore, the technical features necessary for the present application are only limited by the minimum requirements capable of realizing the general inventive concept of the present application, and are not limited by the above specific examples.

According to the embodiments of the present disclosure, parasitic oscillation of the parallel type semiconductor switch during switching transition is avoided, and impedance matching is not required, and the influence on the switching characteristics (such as switching loss and switching speed) is small.

The present application has thus been described with reference to the preferred embodiments. It should be understood that various other changes, substitutions, and additions may be made by those skilled in the art without departing from the spirit and scope of the present application. Accordingly, the scope of the present application is not limited to the particular embodiments described above, but is instead defined by the following claims.