阅读说明：本技术 计算资源分配方法、装置及电子设备和存储介质 (Computing resource allocation method and device, electronic equipment and storage medium ) 是由 万晓国 于 2021-09-14 设计创作，主要内容包括：本申请实施例公开了一种计算资源分配方法、装置及电子设备和存储介质,在电子设备启动过程中,获取枚举到的PCIE设备发送的内存映射输入/输出地址分配请求；若确定PCIE设备所请求的内存映射输入/输出地址的类型与电子设备的启动方式不匹配,为PCIE设备分配与电子设备的启动方式匹配的类型的内存空间作为PCIE设备的内存映射输入/输出地址。避免PCIE设备所请求的内存映射输入/输出地址的类型与电子设备的启动方式不匹配导致电子设备启动后PCIE设备运行出错的问题。(The embodiment of the application discloses a computing resource allocation method, a computing resource allocation device, electronic equipment and a storage medium, wherein in the starting process of the electronic equipment, enumerated memory mapping input/output address allocation requests sent by PCIE equipment are obtained; if it is determined that the type of the memory mapped input/output address requested by the PCIE device does not match the starting mode of the electronic device, allocating a memory space of a type matching the starting mode of the electronic device to the PCIE device as the memory mapped input/output address of the PCIE device. The problem that operation of the PCIE equipment is wrong after the electronic equipment is started due to the fact that the type of the memory mapping input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment is solved.)

1. A method of computing resource allocation, the method comprising:

during the start-up process of the electronic device,

acquiring a memory mapping input/output address allocation request sent by enumerated PCIE equipment;

if it is determined that the type of the memory mapped input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapped input/output address of the PCIE equipment.

2. The method of claim 1, wherein the determining that the type of the memory mapped input/output address requested by the PCIE device does not match a starting manner of the electronic device comprises:

the memory mapping input/output address type carried in the allocation request is different from the memory mapping input/output address type corresponding to the starting mode of the electronic equipment;

alternatively, the first and second electrodes may be,

and the identification identifier of the PCIE equipment determined by enumeration is positioned in a target equipment list corresponding to the starting mode.

3. The method of claim 2, the identification of the PCIE device comprises at least one of:

the PCIE equipment comprises a manufacturer identifier, an equipment identifier and a sub-equipment identifier of the PCIE equipment.

4. The method of claim 1, wherein the type of the memory mapped i/o address requested by the PCIE device does not match a starting manner of the electronic device, comprising:

the memory mapping input/output address requested by the PCIE equipment corresponds to a first addressing space;

the starting mode of the electronic equipment corresponds to a second addressing space;

the first addressing space is different from the second addressing space.

5. The method of claim 4, the first addressing space being different from the second addressing space, comprising:

the first addressing space is larger than the second addressing space.

6. The method according to claim 1, wherein the allocating a memory space of a type that matches a starting manner of the PCIE device includes:

and allocating the memory space with the requested size for the PCIE equipment in the addressing space corresponding to the starting mode of the electronic equipment according to the size of the memory mapping input/output address carried in the allocation request.

7. The method of claim 1, further comprising: if it is determined that the type of the memory mapping input/output address requested by the PCIE equipment is matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapping input/output address of the PCIE equipment.

8. A computing resource allocation apparatus comprising:

the request acquisition module is used for acquiring enumerated memory mapping input/output address allocation requests sent by the PCIE equipment in the starting process of the electronic equipment;

the request processing module is configured to, if it is determined that the type of the memory mapped input/output address requested by the PCIE device does not match the starting manner of the electronic device, allocate a memory space of a type matching the starting manner of the electronic device to the PCIE device as the memory mapped input/output address of the PCIE device.

9. An electronic device, comprising:

a memory for storing a program;

a processor for invoking and executing said program in said memory, said program being executable to perform the steps of the computing resource allocation method of any of claims 1-7.

10. A readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of the computing resource allocation method according to any one of claims 1 to 7.

Technical Field

The present application relates to the field of information processing technologies, and in particular, to a method and an apparatus for allocating computing resources, an electronic device, and a storage medium.

Background

The starting process of the electronic device includes a hardware initialization process, and when the hardware initialization process is performed, an address is allocated to a Peripheral Component Interface Express (PCIE) device according to an address request of a peripheral device (i.e., a PCIE device such as a display card) of a Central Processing Unit (CPU), where the address is a Memory mapping I/O (MMIO) address of the PCIE device, and is used for interaction between the CPU and the PCIE device after the electronic device is started.

The electronic device is mainly started based on a Basic Input Output System (BIOS), and currently, a mainstream starting manner includes a conventional BIOS (denoted as legacy) or a new BIOS (i.e., Unified Extensible Firmware Interface, UEFI). When the electronic device is started based on legacy, the MMIO address allocated to the PCIE device is usually below 4G, and when the electronic device is started based on UEFI, the MMIO address allocated to the PCIE device is mostly above 4G, and only a small part is below 4G.

At present, some electronic devices support only one of the booting modes, and some electronic devices are compatible with both booting modes. When the electronic device is compatible with the two starting modes, only one starting mode can be selected to start the electronic device, and when the starting mode is legacy, if the MMIO address requested by the PCIE device in the starting process is a 64-bit address, an address of more than 4G may be allocated to the PCIE device, and at this time, a problem of operation error of the PCIE device may occur.

Disclosure of Invention

The application aims to provide a computing resource allocation method, a computing resource allocation device, an electronic device and a storage medium, and the method comprises the following technical scheme:

a method of computing resource allocation, the method comprising:

during the start-up process of the electronic device,

acquiring a memory mapping input/output address allocation request sent by enumerated PCIE equipment;

if it is determined that the type of the memory mapped input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapped input/output address of the PCIE equipment.

In the foregoing method, preferably, the determining that the type of the memory mapped input/output address requested by the PCIE device is not matched with the starting mode of the electronic device includes:

the memory mapping input/output address type carried in the allocation request is different from the memory mapping input/output address type corresponding to the starting mode of the electronic equipment;

alternatively, the first and second electrodes may be,

and the identification identifier of the PCIE equipment determined by enumeration is positioned in a target equipment list corresponding to the starting mode.

In the foregoing method, preferably, the identification identifier of the PCIE device includes at least one of the following:

the PCIE equipment comprises a manufacturer identifier, an equipment identifier and a sub-equipment identifier of the PCIE equipment.

In the foregoing method, preferably, the type of the memory mapped input/output address requested by the PCIE device is not matched with the starting mode of the electronic device, including:

the memory mapping input/output address requested by the PCIE equipment corresponds to a first addressing space;

the starting mode of the electronic equipment corresponds to a second addressing space;

the first addressing space is different from the second addressing space.

The method preferably, wherein the first addressing space is different from the second addressing space, and includes:

the first addressing space is larger than the second addressing space.

In the foregoing method, preferably, the allocating a memory space of a type matched with a starting manner of the electronic device to the PCIE device includes:

and allocating the memory space with the requested size for the PCIE equipment in the addressing space corresponding to the starting mode of the electronic equipment according to the size of the memory mapping input/output address carried in the allocation request.

The above method, preferably, further comprises: if it is determined that the type of the memory mapping input/output address requested by the PCIE equipment is matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapping input/output address of the PCIE equipment.

A computing resource allocation apparatus comprising:

the request acquisition module is used for acquiring enumerated memory mapping input/output address allocation requests sent by the PCIE equipment in the starting process of the electronic equipment;

the request processing module is configured to, if it is determined that the type of the memory mapped input/output address requested by the PCIE device does not match the starting manner of the electronic device, allocate a memory space of a type matching the starting manner of the electronic device to the PCIE device as the memory mapped input/output address of the PCIE device.

An electronic device, comprising:

a memory for storing a program;

a processor for calling and executing the program in the memory, and implementing the steps of the computing resource allocation method according to any one of the above by executing the program.

A readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of the method of allocating computational resources as set forth in any one of the preceding claims.

According to the scheme, the method, the device, the electronic device and the storage medium for allocating the computing resources provided by the application can acquire the memory mapping input/output address allocation request sent by the enumerated PCIE device in the starting process of the electronic device; if it is determined that the type of the memory mapped input/output address requested by the PCIE device does not match the starting mode of the electronic device, allocating a memory space of a type matching the starting mode of the electronic device to the PCIE device as the memory mapped input/output address of the PCIE device. In the starting process of the electronic equipment, if a memory mapping input/output address allocation request sent by enumerated PCIE equipment is acquired, the requested memory mapping input/output address is not directly allocated to the PCIE equipment, whether the type of the memory mapping input/output address requested by the PCIE equipment is matched with the starting mode of the electronic equipment is judged, if not, a memory space of the type matched with the starting mode of the electronic equipment is allocated to the PCIE equipment to serve as the memory mapping input/output address of the PCIE equipment, and therefore the problem that the operation of the PCIE equipment is wrong after the electronic equipment is started due to the fact that the type of the memory mapping input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment is solved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.

FIG. 1 is a flowchart of an implementation of a computing resource allocation method according to an embodiment of the present disclosure;

FIG. 2 is a schematic structural diagram of a computing resource allocation apparatus according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings described above, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in other sequences than described or illustrated herein.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without inventive step, are within the scope of the present disclosure.

The method for allocating computing resources is used in an electronic device, a basic input/output system and a PCIE device are configured in the electronic device, and during a starting process of the electronic device, the electronic device sends an address request to a central processing unit CPU according to an external device (i.e., the PCIE device) of the CPU, so as to request the CPU to allocate an MIMO address to the PCIE device, so that after the electronic device is started, the CPU interacts with the PCIE device.

The method for allocating computing resources provided in the embodiment of the present application is used in a starting process of an electronic device, and as shown in fig. 1, an implementation flowchart of the method for allocating computing resources provided in the embodiment of the present application may include:

step S101: and acquiring a memory mapping input/output address allocation request sent by the enumerated PCIE equipment.

The process of the electronic device enumerating PCIE devices may include: in the starting process, all buses of the electronic device are enumerated, whether the PCIE devices are mounted on the buses or not is checked, and the PCIE devices mounted on the buses are determined as the enumerated PCIE devices.

PCIE devices may include, but are not limited to, at least one of the following: a video card, an independent sound card, an independent network card, a wireless network card, a USB interface expansion card, a raid (redundant Arrays of independent disks) card, a solid State drive (ssd), and the like.

During the starting process of the electronic equipment, the PCIE equipment sends an MMIO address allocation request to the CPU.

Step S102: if it is determined that the type of the memory mapped input/output address requested by the PCIE device does not match the starting mode of the electronic device, allocating a memory space of a type matching the starting mode of the electronic device to the PCIE device as the memory mapped input/output address of the PCIE device. The MMIO address allocated to the PCIE device is the computing resource allocated to the PCIE device.

The starting mode of the electronic device can include but is not limited to any one of at least two of the following modes: a legacy BIOS-based boot method, namely legacy boot method; the starting mode based on the new BIOS is UEFI starting mode. Different starting modes correspond to different types of addressing spaces. Generally, the addressing space corresponding to the UEFI activation mode is larger than the addressing space corresponding to the legacy activation mode, for example, the UEFI activation mode corresponds to an addressing space of 36 bits, that is, the size of the addressing space is 64G, and the legacy activation mode corresponds to an addressing space of 32 bits, that is, the size of the addressing space is 4G.

When the type of the memory mapped input/output address requested by the PCIE device does not match the starting mode of the electronic device, it indicates that after the MMIO address of the requested type is allocated to the PCIE device, the electronic device may have a running error report, and the PCIE device is abnormal. At this time, the memory space of the request type is no longer allocated to the PCIE device as the MMIO address, but a content space of a type matching the starting mode of the electronic device is allocated to the PCIE device as the MMIO address of the PCIE device.

The type of the memory space may refer to an address bit number used for addressing, for example, the type of the memory space may be 32 bits, or the type of the memory space may be 36 bits. In order to distinguish different types of memory spaces, the memory space may be referred to as a 32-bit memory space, or a 36-bit memory space, etc.

In the method for allocating computing resources provided in this embodiment of the present application, in the process of starting an electronic device, if a memory mapping input/output address allocation request sent by an enumerated PCIE device is obtained, instead of directly allocating a requested memory mapping input/output address to the PCIE device, it is first determined whether the type of the memory mapping input/output address requested by the PCIE device matches the starting manner of the electronic device, and if not, a memory space of the type matching the starting manner of the electronic device is allocated to the PCIE device as the memory mapping input/output address of the PCIE device, so as to avoid the problem that the operation of the PCIE device is faulty after the electronic device is started due to the mismatch between the type of the memory mapping input/output address requested by the PCIE device and the starting manner of the electronic device, and improve the compatibility of the starting manner of the electronic device, enhancing the stability of the overall system of the electronic device.

In an optional embodiment, an implementation manner of the determining that the type of the memory mapped input/output address requested by the PCIE device does not match the starting manner of the electronic device may be:

if the memory mapping input/output address type carried in the allocation request is different from the memory mapping input/output address type corresponding to the starting mode of the electronic equipment, determining that the type of the memory mapping input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment; otherwise, determining that the type of the memory mapping input/output address requested by the PCIE equipment is matched with the starting mode of the electronic equipment.

The MMIO address allocation request sent by the PCIE device carries the type of the MMIO address requested by the PCIE device, and in the starting process, the starting manner is known (for example, selected by a user after power-on or a default starting manner), so the MMIO address type corresponding to the starting manner is also known, and therefore, it may be determined that the type of the memory mapped input/output address requested by the PCIE device is not matched with the starting manner of the electronic device by directly comparing the type of the MMIO address requested by the PCIE device.

In an optional embodiment, another implementation manner of determining that the type of the memory mapped input/output address requested by the PCIE device does not match the starting manner of the electronic device may be:

if the identification identifier of the PCIE device determined by enumeration is located in the target device list corresponding to the started mode, it is determined that the type of the memory mapped input/output address requested by the PCIE device is not matched with the started mode of the electronic device, otherwise, it is determined that the type of the memory mapped input/output address requested by the PCIE device is matched with the started mode of the electronic device.

In the embodiment of the application, a PCIE device list that does not match the starting manner (i.e., the target device list) is configured in advance, where the target device list records an identifier of a PCIE device whose requested memory mapped input/output address type does not match the starting manner of the electronic device, so that in a starting process of the electronic device, whether the type of the memory mapped input/output address requested by the PCIE device matches the starting manner of the electronic device is determined by determining whether the enumerated identifier of the PCIE device is located in the target device list.

In an optional embodiment, the identification of the PCIE device may include at least one of the following: a vendor identifier, a device identifier, and a sub-device identifier of the PCIE device.

Generally, PCIE devices provided by multiple vendors may be configured in one electronic device, based on which, if types of MMIO addresses requested by all PCIE devices provided by a vendor in the electronic device are all unmatched with a starting manner of the electronic device, only vendor identifiers are recorded in a target device list corresponding to the PCIE devices provided by the vendor, and if types of MMIO addresses requested by only some PCIE devices in different PCIE devices provided by the same vendor are unmatched with the starting manner of the electronic device, for a PCIE device that needs to be recorded in the target device list, its device identifier needs to be recorded in the target device list. In some scenarios, the device identifiers of devices provided by different vendors may be the same, and at this time, the devices cannot be distinguished only by the device identifiers, so that the vendor identifiers and the device identifiers need to be recorded in the target device list. In addition, there are some cases that a PCIE device in the electronic device may be provided by a vendor of the electronic device, or may be provided by another vendor, and when the vendor of the electronic device and the vendor of the PCIE device are different, the vendor of the electronic device may configure a new device identifier for a PCIE device provided by another vendor, and the device identifiers configured by the PCIE device provided by the same vendor are the same, at this time, the identification identifier of the PCIE device may further include a sub-device identifier, where the sub-device identifier is a device identifier configured by the vendor of the PCIE device for the PCIE device.

In an optional embodiment, the step of determining that the type of the memory mapped input/output address requested by the PCIE device is not matched with the starting mode of the electronic device may include:

the memory mapping input/output address requested by the PCIE equipment corresponds to a first addressing space;

the starting mode of the electronic equipment corresponds to the second addressing space;

the first addressing space is different from the second addressing space.

Optionally, the first addressing space is larger than the second addressing space. For example, the first addressing space is 36-bit addressing space, and the specific size is 64G, and the second addressing space is 32-bit addressing space, and the specific size is 4G.

In an optional embodiment, one implementation manner of allocating the memory space of the type matched with the starting manner of the electronic device to the PCIE device may be:

and according to the size of the memory mapping input/output address carried in the allocation request, allocating a content space with the requested size to the PCIE equipment in an addressing space corresponding to the starting mode of the electronic equipment.

For example, in the process of starting the electronic device in legacy mode, a certain PCIE device requests an input/output address of 36 bits, and the size is 256M, based on the present application, the input/output address of 32 bits provided for the PCIE device is 256M.

In an optional embodiment, the method for allocating computing resources provided in the embodiment of the present application may further include:

if the type of the memory mapping input/output address requested by the PCIE equipment is determined to be matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapping input/output address of the PCIE equipment.

For example, in the process of starting the electronic device in legacy mode, a certain PCIE device requests a 32-bit input/output address, and the size is 128M, based on the present application, the 32-bit input/output address provided for the PCIE device is 128M in size.

Corresponding to the method embodiment, an embodiment of the present application further provides a computing resource allocation apparatus, and a schematic structural diagram of the computing resource allocation apparatus provided in the embodiment of the present application is shown in fig. 2, and may include:

a request acquisition module 201 and a request processing module 202; wherein the content of the first and second substances,

the request obtaining module 201 is configured to obtain an enumerated memory mapping input/output address allocation request sent by the PCIE device in a starting process of the electronic device;

the request processing module 202 is configured to, in a starting process of an electronic device, allocate, to the PCIE device, a memory space of a type that matches a starting manner of the electronic device as a memory mapped input/output address of the PCIE device if it is determined that the type of the memory mapped input/output address requested by the PCIE device does not match the starting manner of the electronic device.

In the computing resource allocation device provided in this embodiment of the present application, in the process of starting the electronic device, if a memory mapping input/output address allocation request sent by an enumerated PCIE device is obtained, instead of directly allocating a requested memory mapping input/output address to the PCIE device, it is first determined whether the type of the memory mapping input/output address requested by the PCIE device matches the starting manner of the electronic device, and if not, a memory space of the type matching the starting manner of the electronic device is allocated to the PCIE device as the memory mapping input/output address of the PCIE device, so as to avoid the problem that the operation of the PCIE device is faulty after the electronic device is started due to the mismatch between the type of the memory mapping input/output address requested by the PCIE device and the starting manner of the electronic device, and improve the compatibility of the starting manner of the electronic device, enhancing the stability of the overall system of the electronic device.

In an optional embodiment, the type of the memory mapped input/output address requested by the PCIE device is not matched with the starting mode of the electronic device, and the method may include:

the memory mapping input/output address type carried in the allocation request is different from the memory mapping input/output address type corresponding to the starting mode of the electronic equipment;

alternatively, the first and second electrodes may be,

and the identification identifier of the PCIE equipment determined by enumeration is positioned in a target equipment list corresponding to the starting mode.

In an optional embodiment, the identification of the PCIE device includes at least one of the following:

the PCIE equipment comprises a manufacturer identifier, an equipment identifier and a sub-equipment identifier of the PCIE equipment.

In an optional embodiment, the step of determining that the type of the memory mapped input/output address requested by the PCIE device does not match the starting mode of the electronic device includes:

the memory mapping input/output address requested by the PCIE equipment corresponds to a first addressing space;

the starting mode of the electronic equipment corresponds to a second addressing space;

the first addressing space is different from the second addressing space.

In an alternative embodiment, the first addressing space is different from the second addressing space, including:

the first addressing space is larger than the second addressing space.

In an optional embodiment, when allocating a memory space of a type matched with a starting manner of the electronic device to the PCIE device, the request processing module is configured to:

and allocating the memory space with the requested size for the PCIE equipment in the addressing space corresponding to the starting mode of the electronic equipment according to the size of the memory mapping input/output address carried in the allocation request.

In an optional embodiment, the request processing module may be further configured to:

if it is determined that the type of the memory mapping input/output address requested by the PCIE equipment is matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapping input/output address of the PCIE equipment.

Corresponding to the embodiment of the method, the present application further provides an electronic device, a schematic structural diagram of which is shown in fig. 3, and the electronic device may include: at least one processor 1, at least one communication interface 2, at least one memory 3 and at least one communication bus 4;

in the embodiment of the application, the number of the processor 1, the communication interface 2, the memory 3 and the communication bus 4 is at least one, and the processor 1, the communication interface 2 and the memory 3 complete mutual communication through the communication bus 4;

the processor 1 may be a central processing unit CPU, or an application Specific Integrated circuit asic, or one or more Integrated circuits configured to implement embodiments of the present application, etc.;

the memory 3 may include a high-speed RAM memory, and may further include a non-volatile memory (non-volatile memory) or the like, such as at least one disk memory;

wherein the memory 3 stores a program, and the processor 1 may call the program stored in the memory 3, the program being configured to:

during the start-up process of the electronic device,

acquiring a memory mapping input/output address allocation request sent by enumerated PCIE equipment;

if it is determined that the type of the memory mapped input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapped input/output address of the PCIE equipment.

Alternatively, the detailed function and the extended function of the program may be as described above.

Embodiments of the present application further provide a storage medium, where a program suitable for execution by a processor may be stored, where the program is configured to:

during the start-up process of the electronic device,

acquiring a memory mapping input/output address allocation request sent by enumerated PCIE equipment;

if it is determined that the type of the memory mapped input/output address requested by the PCIE equipment is not matched with the starting mode of the electronic equipment, allocating a memory space of the type matched with the starting mode of the electronic equipment to the PCIE equipment as the memory mapped input/output address of the PCIE equipment.

Alternatively, the detailed function and the extended function of the program may be as described above.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

It should be understood that the technical problems can be solved by combining and combining the features of the embodiments from the claims.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.