阅读说明：本技术 一种基于逐脉冲取样的功率调节系统及其控制方法 (Power regulation system based on pulse-by-pulse sampling and control method thereof ) 是由 倪振宇 丁增敏 廖自升 姚建 于 2021-07-15 设计创作，主要内容包括：本发明公开了一种基于逐脉冲取样的功率调节系统,包括用于采集电流信号的第一电流采集电路和第二电流采集电路,所述第一电流采集电路和第二电流采集电路的输出端连接数字锁相环的输入端,数字锁相环的输入端连接相位参考信号发生器,数字锁相环的输出端连接连接PWM波发生模块,第一电流采集电路与数字锁相环之间连接有过零检测电路。定时器计算出两个脉冲波形之间的时间差,通过限制两者之间的时间差来确保感应加热设备逆变输出的电压和电流保持在弱感性状态下从而保证设备的正常运行,如果出现容性就会增加PWM输出频率来降低加热功率,实现闭环调节中的相位限制,如果容性出现超过设定的安全阈值则会直接报警,停止设备加热。(The invention discloses a power regulating system based on pulse-by-pulse sampling, which comprises a first current collecting circuit and a second current collecting circuit for collecting current signals, wherein the output ends of the first current collecting circuit and the second current collecting circuit are connected with the input end of a digital phase-locked loop, the input end of the digital phase-locked loop is connected with a phase reference signal generator, the output end of the digital phase-locked loop is connected with a PWM wave generating module, and a zero-crossing detection circuit is connected between the first current collecting circuit and the digital phase-locked loop. The timer calculates the time difference between two pulse waveforms, the time difference between the two pulse waveforms is limited to ensure that the voltage and the current output by the inversion of the induction heating equipment are kept in a weak induction state so as to ensure the normal operation of the equipment, the PWM output frequency is increased to reduce the heating power if the capacitance occurs, the phase limitation in closed-loop regulation is realized, and the alarm is directly given out if the capacitance exceeds a set safety threshold value, so that the equipment is stopped from heating.)

1. The utility model provides a power governing system based on pulse-by-pulse sampling, includes first current acquisition circuit (1) and second current acquisition circuit (2) that are used for gathering the current signal, its characterized in that, the input of digital phase-locked loop is connected to the output of first current acquisition circuit (1) and second current acquisition circuit (2), and phase reference signal generator (9) are connected to the input of digital phase-locked loop, and PWM ripples generation module (10) are connected to the output connection of digital phase-locked loop, are connected with zero cross detection circuit (3) between first current acquisition circuit (1) and the digital phase-locked loop.

2. The power regulation system of claim 1, wherein the power regulation system further comprises: the digital phase-locked loop comprises a phase detection module (4), the input end of the phase detection module (4) is respectively connected with a second current acquisition circuit (2), the output ends of a zero-crossing detection circuit (3) and a phase reference signal generator (9), the output end of the phase detection module (4) is connected with the input end of a timer (5), the output end of the timer (5) is connected with the input end of a filter (6), the output end of the filter (6) is connected with the input end of a PID control module (7), the output end of the PID control module (7) is connected with the input end of a frequency divider (8), and the output end of the frequency divider (8) is connected with the input end of a PWM wave generation module (10).

3. A pulse-by-pulse sampling based power conditioning system as defined in claim 2, wherein: and the output end of the frequency divider (8) is respectively connected with the input ends of the phase detection module (4) and the PID control module (7).

4. A pulse-by-pulse sampling based power conditioning system as defined in claim 2, wherein: the first current acquisition circuit (1) comprises a first current acquisition module (11) for acquiring high-frequency direct-current signals, the output end of the first current acquisition module (11) is connected with the input end of a first ADC module (12), and the output end of the first ADC module (12) is connected with the input end of a zero-crossing detection circuit (3).

5. A pulse-by-pulse sampling based power conditioning system as defined in claim 2, wherein: the second current acquisition circuit (2) comprises a second current acquisition module (21) for acquiring high-frequency alternating-current signals, the output end of the second current acquisition module (21) is connected with the input end of a second ADC module (22), and the output end of the second ADC module (22) is connected with the input end of a phase detection module (4).

6. A pulse-by-pulse sampling based power conditioning system as defined in claim 2, wherein: the PID control module (7) is an all-digital processing system based on an M451 ARM Cortex-M4 kernel.

7. A control method for a power conditioning system based on pulse-by-pulse sampling according to any one of claims 1 to 6, characterized by comprising the steps of:

s1, recording the high frequency power sent from the zero-crossing detection circuit (3) through the timer (5)Input time value T when the zero-crossing signal of the current reaches the timer (5)₀At the same time, the time value T of the PWM wave output by the system at the moment_xTo obtain a phase difference value delta₀，

δ₀＝T₀-T_x；

S2, recording the delay time value T when the high-frequency alternating current signal sent from the second current acquisition circuit (2) reaches the timer (5) through the timer (5)_cWhen T is_c＝δ₀At the moment, the actual working current and voltage are in a synchronous state, and the system outputs the maximum power; if T_c>δ₀Proceeding to step S3; if T_c<δ₀Proceeding to step S4;

s3, when T_c>δ₀When the system is in a capacitive state, the current leads the driving voltage, and the set power is reduced through the control of the PID control module (7);

s4, when T_c<δ₀When the system is in a resistive state, the current lags behind the driving voltage, the actual power is compared with the set power, when the acquired actual power is higher than the set power, the PID control module (7) controls to reduce the output frequency of the PWM wave, and when the acquired actual power is lower than the set power, the PID control module (7) controls to increase the output frequency of the PWM wave.

8. The method of claim 7, wherein the step-by-step sampling based power conditioning system comprises: t in the step S1₀The input time value of the current signal is obtained by calculating an average value after continuously recording results for N times, and the formula is as follows:

T₀＝(T₁+T₂+T₃+...+T_n)/n；

wherein, T₀Is an average value of T₁、T₂、T₃、...、T_nThe high-frequency current zero-crossing signal is sent from the zero-crossing detection circuit (3) to a timer (5) for 1 st, 2 nd, 3 rd.

Technical Field

The present application relates to the field of power regulation systems, and more particularly, to a power regulation system based on pulse-by-pulse sampling and a control method thereof.

Background

At present, in China, a gas stove or a coal stove is mainly adopted in the aspect of high-power heating, no matter the gas stove or the coal stove is heated by naked fire, the gas stove or the coal stove has heat radiation and causes pollution, and compared with the traditional heating modes of gas, coal and the like, the induction heating has the following advantages: 1. the heating speed is high; 2. the heat loss is less and the heating efficiency is high; 3. the environment is protected and no pollution is caused; 4. the automatic control is easy to realize; 5. the isolation of the heating part and the converter part is realized, the electric leakage caused by the damage of the protective layer is avoided, and the safety is greatly improved.

The electromagnetic oven is also called as an electromagnetic range, is a standard configuration of modern kitchens, and can directly generate heat at the bottom of a pot without open fire or conduction heating, so that the heat efficiency is greatly improved. Is a high-efficiency energy-saving kitchen utensil and is completely different from all the traditional kitchen utensils with fire or without fire conduction heating. The electromagnetic oven is an electric cooking appliance made by utilizing the electromagnetic induction heating principle. The device consists of a high-frequency induction heating circuit, a high-frequency power conversion device, a control unit, a crystallized ceramic plate, a ferromagnetic material pot bottom cooker and the like; when the metal pot is used, alternating current is introduced into the heating coil, an alternating magnetic field is generated around the coil, most of magnetic lines of the alternating magnetic field pass through the metal pot body, and a large amount of eddy current is generated in the pot bottom, so that heat required by cooking is generated. However, most of the existing control on the power of the induction cooker inputs set power through a control panel, and the on-off and power regulation of the induction cooker cannot be realized through the phase difference between the connected voltage and current.

Disclosure of Invention

In view of the above-mentioned shortcomings of the prior art, the present patent application aims to provide a power regulation system based on pulse-by-pulse sampling and a control method thereof, which solve the above-mentioned problems of the prior art.

In order to achieve the purpose, the invention provides the following technical scheme:

the utility model provides a power governing system based on pulse-by-pulse sampling, includes first current acquisition circuit and the second current acquisition circuit that is used for gathering the current signal, the input of digital phase-locked loop is connected to first current acquisition circuit and second current acquisition circuit's output, and phase reference signal generator is connected to digital phase-locked loop's input, and PWM ripples generation module is connected in digital phase-locked loop's output connection, is connected with zero cross detection circuit between first current acquisition circuit and the digital phase-locked loop.

Furthermore, the digital phase-locked loop comprises a phase detection module, the input end of the phase detection module is respectively connected with the output ends of the second current acquisition circuit, the zero-crossing detection circuit and the phase reference signal generator, the output end of the phase detection module is connected with the input end of the timer, the output end of the timer is connected with the input end of the filter, the output end of the filter is connected with the input end of the PID control module, the output end of the PID control module is connected with the input end of the frequency divider, and the output end of the frequency divider is connected with the input end of the PWM wave generation module.

Furthermore, the output end of the frequency divider is respectively connected with the input ends of the phase detection module and the PID control module.

Furthermore, the first current collection circuit comprises a first current collection module for collecting high-frequency direct-current signals, the output end of the first current collection module is connected with the input end of the first ADC module, and the output end of the first ADC module is connected with the input end of the zero-crossing detection circuit.

Furthermore, the second current collecting circuit comprises a second current collecting module for collecting high-frequency alternating-current signals, the output end of the second current collecting module is connected with the input end of the second ADC module, and the output end of the second ADC module is connected with the input end of the phase detection module.

Further, the PID control module is an all-digital processing system based on an M451 ARM Cortex-M4 kernel.

A method for controlling a power regulation system based on pulse-by-pulse sampling as described above, comprising the steps of:

s1, recording the input time value T when the high-frequency current zero-crossing signal sent from the zero-crossing detection circuit reaches the timer through the timer₀At the same time, the PWM wave is output at the moment through the systemTime value T of_xTo obtain a phase difference value delta₀，

δ₀＝T₀-T_x；

S2, recording the delay time value T when the high-frequency alternating current signal sent from the second current acquisition circuit reaches the timer through the timer_cWhen T is_c＝δ₀At the moment, the actual working current and voltage are in a synchronous state, and the system outputs the maximum power; if T_c>δ₀Proceeding to step S3; if T_c<δ₀Proceeding to step S4;

s3, when T_c>δ₀When the system is in a capacitive state, the current leads the driving voltage, and the set power is reduced through the control of the PID control module;

s4, when T_c<δ₀When the collected actual power is lower than the set power, the PID control module controls to increase the output frequency of the PWM wave.

Further, T in the step S1₀The input time value of the current signal is obtained by calculating an average value after continuously recording results for N times, and the formula is as follows:

T₀＝(T₁+T₂+T₃+...+T_n)/n；

wherein, T₀Is an average value of T₁、T₂、T₃、...、T_nThe time value of the high-frequency current zero-crossing signal is sent from the zero-crossing detection circuit to the timer for 1 st, 2 nd, 3 rd.

Compared with the prior art, the invention has the beneficial effects that: the power regulating system based on pulse-by-pulse sampling is characterized in that a timer sharing PWM0 is used for synchronous counting, PWM0_ CH0 is used for comparing an output function and is responsible for outputting PWM output, PWM _ CH2 is used for capturing an input function and is specially used for capturing a feedback current signal after signal processing, the timer calculates a time difference between two pulse waveforms, the time difference between the two pulse waveforms is limited to ensure that the voltage and the current of the inversion output of the induction heating equipment are kept in a weak inductance state so as to ensure the normal operation of the equipment, the PWM output frequency is increased to reduce the heating power if capacitance occurs, phase limitation in closed-loop regulation is realized, and if the capacitance occurs and exceeds a set safety threshold value, an alarm is directly given, and the equipment is stopped from heating. The phase difference obtained by comparing the pulse wave obtained through the processed current signal with the pulse wave output by the PWM is more flexible and stable than the phase difference realized through hardware alone in the prior art.

Drawings

FIG. 1 is a schematic diagram of the power regulation control principle of the present invention;

FIG. 2 is a schematic diagram of a timing waveform of the digital phase-locked loop of the present invention;

FIG. 3 is a schematic diagram of phase shifting in the output comparison mode of the digital phase-locked loop of the present invention;

FIG. 4 is a schematic diagram of the phase advance of the AC system current with respect to voltage;

FIG. 5 is a schematic diagram of the phase lag of the current to the voltage in the AC system of the present invention;

FIG. 6 is a flow chart of the system operation of the present invention.

The reference numbers illustrate: the device comprises a first current acquisition circuit 1, a first current acquisition module 11, a first ADC module 12, a second current acquisition circuit 2, a second current acquisition module 21, a second ADC module 22, a zero-crossing detection circuit 3, a phase detection module 4, a timer 5, a filter 6, a PID control module 7, a frequency divider 8, a phase reference signal generator 9 and a PWM wave generation module 10.

Detailed Description

The following description of the embodiments of the present application is provided by way of specific examples, and other advantages and effects of the present application will be readily apparent to those skilled in the art from the disclosure herein. The present application is capable of other and different embodiments and its several details are capable of modifications and variations in various respects, all without departing from the spirit of the present application. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.

Referring to fig. 1-6, the present invention provides a technical solution:

a power regulating system based on pulse-by-pulse sampling is disclosed, as shown in figure 1, and comprises a first current collecting circuit 1 and a second current collecting circuit 2 for collecting current signals, wherein the output ends of the first current collecting circuit 1 and the second current collecting circuit 2 are connected with the input end of a digital phase-locked loop, the input end of the digital phase-locked loop is connected with a phase reference signal generator 9, the output end of the digital phase-locked loop is connected with a PWM wave generating module 10, and a zero-crossing detection circuit 3 is connected between the first current collecting circuit 1 and the digital phase-locked loop.

The digital phase-locked loop comprises a phase detection module 4, wherein the input end of the phase detection module 4 is respectively connected with the output ends of a second current acquisition circuit 2, a zero-crossing detection circuit 3 and a phase reference signal generator 9, the output end of the phase detection module 4 is connected with the input end of a timer 5, the output end of the timer 5 is connected with the input end of a filter 6, the output end of the filter 6 is connected with the input end of a PID control module 7, the PID control module 7 is a full-digital processing system based on an M451 ARM Cortex-M4 inner core, the output end of the PID control module 7 is connected with the input end of a frequency divider 8, the output end of the frequency divider 8 is connected with the input end of a PWM wave generation module 10, and the output end of the frequency divider 8 is respectively connected with the input ends of the phase detection module 4 and the PID control module 7.

As shown in fig. 2, the digital phase-locked loop detects a phase difference between the phase reference signal output from the phase reference signal generator 9 and the phase error signal output from the phase detection module 4, rapidly adjusts the frequency and phase of the driving pulse reference signal output from the digital phase-locked loop, and further changes the frequency and phase of the pulse output from the PWM wave generation module 10, in actual operation, under the condition of unchanged frequency, the phase difference between the driving pulse of the inverter circuit and the resonant current is constant, therefore, the change of the frequency and the phase of the output pulse can cause the phase change of the resonant current, and after the adjustment of the dynamic tracking process, the digital phase-locked loop enters a locking state, phase difference signals output by the first current acquisition circuit 1 and the second current acquisition circuit 2 are locked to phases of phase reference signals output by the phase reference signal generator 9, the frequencies of the phase reference signals and the phases of the phase reference signals are equal, and the phase difference is zero or constant.

As shown in fig. 3, the driving pulses of the upper and lower switching tubes of the same bridge arm are complementary to each other, so that a phase angle is staggered between the driving signals of the switching tubes of the two original bridge arms, and thus a zero voltage region can be inserted between the positive and negative alternating square waves output by the load, so that the effective value of the output voltage is changed, and the output power is also changed.

The first current collection circuit 1 includes a first current collection module 11 for collecting a high-frequency direct current signal, an output end of the first current collection module 11 is connected to an input end of a first ADC module 12, an output end of the first ADC module 12 is connected to an input end of a zero-crossing detection circuit 3, the second current collection circuit 2 includes a second current collection module 21 for collecting a high-frequency alternating current signal, an output end of the second current collection module 21 is connected to an input end of a second ADC module 22, and an output end of the second ADC module 22 is connected to an input end of a phase detection module 4, as shown in fig. 6, a work flow diagram of the system is shown.

A control method of the power regulation system based on pulse-by-pulse sampling as described above, comprising the steps of:

s1, recording the input time value T of the high-frequency current zero-crossing signal sent from the zero-crossing detection circuit 3 when the high-frequency current reaches the timer 5 through the timer 5₀At the same time, the time value T of the PWM wave output by the system at the moment_xTo obtain a phase difference value delta₀，

δ₀＝T₀-T_x；

S2, recording the delay time value T when the high-frequency alternating current signal sent from the second current acquisition circuit 2 reaches the timer 5 through the timer 5_cWhen T is_c＝δ₀At the moment, the actual working current and voltage are in a synchronous state, and the system outputs the maximum power; if T_c>δ₀Proceeding to step S3; if T_c<δ₀Proceeding to step S4;

s3, when T_c>δ₀While the system is in a capacitive state, and electricityThe flow leads the driving voltage, as shown in fig. 4, and the set power is controlled to be reduced by the PID control module 7;

s4, when T_c<δ₀When the system is in a resistive state, the current lags behind the driving voltage, as shown in fig. 5, according to comparison between the collected actual power and the set power, when the collected actual power is higher than the set power, the PID control module 7 controls to reduce the output frequency of the PWM wave, and when the collected actual power is lower than the set power, the PID control module 7 controls to increase the output frequency of the PWM wave.

Preferably, T in step S1₀The input time value of the current signal is obtained by calculating an average value after continuously recording results for N times, and the formula is as follows:

T₀＝(T₁+T₂+T₃+...+T_n)/n；

wherein, T₀Is an average value of T₁、T₂、T₃、...、T_nIs the time value when the high-frequency current zero-crossing signal reaches the timer 5 sent from the zero-crossing detection circuit 3 for 1 st, 2 nd, 3 rd.

The power regulating system based on pulse-by-pulse sampling is characterized in that a timer 5 sharing PWM0 is used for synchronous counting, PWM0_ CH0 is used for comparing an output function and is responsible for outputting the output of the PWM, PWM _ CH2 is used for capturing an input function and is specially used for capturing a feedback current signal after signal processing, the timer 5 calculates a time difference between two pulse waveforms, the time difference between the two pulse waveforms is limited to ensure that the voltage and the current of the inversion output of the induction heating equipment are kept in a weak inductance state so as to ensure the normal operation of the equipment, the PWM output frequency is increased to reduce the heating power if capacitance occurs, phase limitation in closed-loop regulation is realized, and an alarm is directly given to stop the heating of the equipment if the capacitance exceeds a set safety threshold. The phase difference obtained by comparing the pulse wave obtained through the processed current signal with the pulse wave output by the PWM is more flexible and stable than the phase difference realized through hardware alone in the prior art.

In addition, the first current collecting circuit 1, the second current collecting circuit 2, and the like in this document are all products that have been actually produced and used in the prior art, and are components that have been disclosed in the prior art, wherein the first current collecting module 11 and the second current collecting module 21 may be current collecting modules of a DAM-7021 model, the first ADC module 12 and the second ADC module 22 may be ADC modules of an ADS7812 model, the zero-crossing detecting circuit 3 may be a photocoupler access circuit of a PC817 model, the phase detecting module 4 may be a phase difference measuring module of a YH-X9256 model, the PID control module 7 may be a controller of a KSD123 model, and the PWM wave generating module 10 may be a PWM generator of a UC3842 model, which is not described herein in detail.

The above-described embodiments are merely illustrative of the principles and utilities of the present patent application and are not intended to limit the present patent application. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of this patent application. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical concepts disclosed in the present application shall be covered by the claims of the present application.