阅读说明：本技术 磷化铟基板 (Indium phosphide substrate ) 是由 冈俊介 铃木健二 林英昭 于 2020-12-23 设计创作，主要内容包括：本发明提供一种通过背磨等方法从晶片背面进行研磨时,晶片边缘的尖锐得到抑制的磷化铟基板。一种磷化铟基板,其特征在于,在晶片中取与主面平行的平面A时,包含晶片边缘与平面A的交线且与晶片边缘相切的平面B与平面A的向晶片外侧方向延长的面在主面侧所成的角θ,就距主面的距离成为100μm以上且200μm以下的所有平面A而言均为0°＜θ≤110°,在与晶片边缘正交的剖面中,至少在主面侧具有边缘圆角,主面侧的边缘圆角的曲率半径R-(f)为200～350μm。(The invention provides a method for carrying out wafer back grinding from the back surface of a waferThe sharpness of the wafer edge is suppressed during polishing. An indium phosphide substrate characterized in that, when a plane A parallel to the main surface is taken as a wafer, an angle theta formed on the main surface side by a plane B including the intersection line of the wafer edge and the plane A and tangent to the wafer edge and a plane A extending in the wafer outer side direction is 0 DEG & lt theta & lt 110 DEG for all planes A having a distance of 100 [ mu ] m or more and 200 [ mu ] m or less from the main surface, and in a cross section orthogonal to the wafer edge, the main surface side has an edge fillet at least on the main surface side, and the radius of curvature R of the edge fillet on the main surface side is f 200 to 350 μm.)

1. An indium phosphide substrate characterized in that,

when a plane A parallel to a main surface is taken in a wafer, an angle theta formed by a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and a plane A extending in a wafer outer side direction of the plane A on the main surface side is 0 DEG & lt theta & lt 110 DEG for all the planes A having a distance of 100 to 200 mu m from the main surface,

in a cross section orthogonal to the wafer edge, the wafer has an edge round at least on the main surface side, and the edge round on the main surface side has a curvature radius R_f200 to 350 μm.

2. The indium phosphide substrate according to claim 1, wherein,

the angle theta is 60 DEG-100 DEG for all the planes A with the distance of 100-200 mu m from the main surface.

3. An indium phosphide substrate characterized in that,

when a plane A parallel to a main surface is taken in a wafer, an angle theta formed by a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and a plane A extending in a wafer outer side direction of the plane A on the main surface side is 0 DEG & lt theta & lt 100 DEG for all the planes A having a distance of 150 to 200 mu m from the main surface,

in a cross section orthogonal to the wafer edge, the wafer has an edge round at least on the main surface side, and the edge round on the main surface side has a curvature radius R_f200 to 350 μm.

4. The indium phosphide substrate according to claim 3, wherein,

the angle theta is 60 DEG-95 DEG for all the planes A with the distance of 150-200 mu m from the main surface.

5. An indium phosphide substrate characterized in that,

when a plane A parallel to the main surface is taken in the wafer, an angle theta formed by a plane B including an intersection line of the edge of the wafer and the plane A and tangent to the edge of the wafer and a plane A extending in the wafer outer side direction is 60 DEG-90 DEG for all the planes A having a distance of 100 to 200 mu m from the main surface,

in a cross section orthogonal to the wafer edge, the wafer has an edge round at least on the main surface side, and the edge round on the main surface side has a curvature radius R_fIs 200 to 350 μm in diameter,

the diameter of the substrate is 50.8mm or less.

6. The indium phosphide substrate according to claim 5, wherein,

the angle theta is 60 DEG-90 DEG for all the planes A with the distance of 150-200 mu m from the main surface.

7. An indium phosphide substrate characterized in that,

when a plane A parallel to the main surface is taken in the wafer, an angle theta formed by a plane B including an intersection line of the edge of the wafer and the plane A and tangent to the edge of the wafer and a plane A extending in the wafer outer side direction is 80 DEG-110 DEG for all the planes A with a distance of 100 to 200 mu m from the main surface,

in a cross section orthogonal to the wafer edge, the wafer has an edge round at least on the main surface side, and the edge round on the main surface side has a curvature radius R_fIs 200 to 350 μm in diameter,

the diameter of the substrate is 76.2mm or less.

8. The indium phosphide substrate according to claim 7, wherein,

the angle theta is 80 DEG-100 DEG for all the planes A with the distance of 150-200 mu m from the main surface.

9. An indium phosphide substrate characterized in that,

when a plane A parallel to the main surface is taken in the wafer, an angle theta formed by a plane B including an intersection line of the edge of the wafer and the plane A and tangent to the edge of the wafer and a plane A extending in the wafer outer side direction is 80 DEG-100 DEG for all the planes A with a distance of 100 to 200 mu m from the main surface,

in a cross section orthogonal to the wafer edge, the wafer has an edge round at least on the main surface side, and the edge round on the main surface side is curvedRadius of curvature R_fIs 200 to 350 μm in diameter,

the diameter of the substrate is 100mm or less.

10. The indium phosphide substrate according to claim 9, wherein,

the angle theta is 80 DEG-95 DEG for all the planes A with the distance of 150-200 mu m from the main surface.

11. The indium phosphide substrate according to any one of claims 1 to 10, wherein,

radius of curvature R of the edge fillet of the main surface side_fIs 223 to 338 μm.

Technical Field

The invention relates to an indium phosphide substrate.

Background

Indium phosphide (InP) is a group III-V compound semiconductor material composed of group III indium (In) and group V phosphorus (P). As the characteristics of the semiconductor material, the following characteristics are provided: band gap of 1.35eV, electron mobility of 5400cm²The electron mobility under a high electric field is higher than that of other general semiconductor materials such as silicon and gallium arsenic. Further, the following features are also provided: the crystal structure stable at normal temperature and pressure is a cubic zinc blende structure, and the lattice constant thereof is larger than that of compound semiconductors such as gallium arsenide (GaAs), gallium phosphide (GaP), and the like.

An ingot of indium phosphide, which is a raw material of an indium phosphide substrate, is generally sliced to a predetermined thickness, ground to a desired shape, and subjected to etching, precision polishing (buffing) or the like after appropriate mechanical polishing in order to remove polishing debris and damage caused by the polishing.

An epitaxial crystal layer may be formed on a main surface of an indium phosphide substrate by epitaxial growth (patent document 1).

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open publication No. 2003 and 218033

Disclosure of Invention

Problems to be solved by the invention

When the subsequent steps are performed after the epitaxial growth, the thickness of the substrate is not required, and therefore the substrate is polished from the back surface of the wafer by a back grinding (back lap) method or the like to be thinned to, for example, 100 μm or more and 200 μm or less. Here, since the edge portion of the wafer is generally sharp, there are problems in that: when the wafer is ground from the back surface by a method such as back grinding (also referred to as back grinding), the edge portion is further sharpened, and therefore the wafer is easily broken.

The present invention has been made to solve the above-described problems, and an object of the present invention is to provide an indium phosphide substrate in which sharpness of a wafer edge is suppressed when polishing is performed from the back surface of the wafer by a back-grinding method or the like.

Means for solving the problems

The embodiments of the present invention are defined by the following (1) to (11).

(1) An indium phosphide substrate characterized in that, when a plane A parallel to a main surface is taken as a wafer, an angle theta formed by a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and a plane A extending in a wafer outer direction of the plane A on the main surface side is 0 DEG & lt theta & lt 110 DEG for all planes A having a distance of 100 [ mu ] m or more and 200 [ mu ] m or less from the main surface, and in a cross section orthogonal to the wafer edge, the substrate has an edge fillet at least on the main surface side, and the edge fillet on the main surface side has a radius of curvature R_f200 to 350 μm.

(2) The indium phosphide substrate according to the item (1), wherein the angle θ is 60 ° ≦ θ ≦ 100 ° for all the planes A having a distance of 100 μm or more and 200 μm or less from the main surface.

(3) An indium phosphide substrate characterized in that, when a plane A parallel to a principal surface is taken out of a wafer, a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and the plane A are extended in a direction outward of the waferAn angle theta formed by the surface(s) on the main surface side is 0 DEG < theta.ltoreq.100 DEG for all the planes A having a distance of 150 to 200 [ mu ] m from the main surface, and the wafer has an edge fillet at least on the main surface side in a cross section orthogonal to the wafer edge, and the radius of curvature R of the edge fillet on the main surface side is_f200 to 350 μm.

(4) The indium phosphide substrate according to item (3), wherein the angle θ is 60 ° ≦ θ ≦ 95 ° for all the planes A having a distance of 150 μm or more and 200 μm or less from the main surface.

(5) An indium phosphide substrate characterized in that, when a plane A parallel to a main surface is taken as a wafer, an angle theta formed by a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and a plane A extending outward from the wafer and located on the main surface side is 60 DEG-90 DEG for all planes A having a distance of 100 to 200 [ mu ] m from the main surface, and that an edge fillet is provided at least on the main surface side in a cross section orthogonal to the wafer edge, and the radius of curvature R of the edge fillet on the main surface side is_f200 to 350 μm, and the diameter of the substrate is 50.8mm or less.

(6) The indium phosphide substrate according to item (5), wherein the angle θ is 60 ° ≦ θ ≦ 90 ° for all the planes A having a distance of 150 μm or more and 200 μm or less from the main surface.

(7) An indium phosphide substrate characterized in that, when a plane A parallel to a main surface is taken as a wafer, an angle theta formed by a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and a plane A extending outward from the wafer and located on the main surface side is 80 DEG-110 DEG for all planes A having a distance of 100 to 200 [ mu ] m from the main surface, and that an edge fillet is provided at least on the main surface side in a cross section orthogonal to the wafer edge, and the radius of curvature R of the edge fillet on the main surface side is set to be equal to or larger than 80 DEG-110 DEG_f200 to 350 μm, and the diameter of the substrate is 76.2mm or less.

(8) The indium phosphide substrate according to (7), wherein the angle θ is 80 ° ≦ θ ≦ 100 ° for all the planes A having a distance of 150 μm or more and 200 μm or less from the main surface.

(9) An indium phosphide substrate characterized in that, when a plane A parallel to a main surface is taken as a wafer, an angle theta formed by a plane B including an intersection line of a wafer edge and the plane A and tangent to the wafer edge and a plane A extending outward from the wafer and located on the main surface side is 80 DEG-100 DEG for all planes A having a distance of 100 to 200 [ mu ] m from the main surface, and that an edge fillet is provided at least on the main surface side in a cross section orthogonal to the wafer edge, and the radius of curvature R of the edge fillet on the main surface side is set to be equal to or larger than 80 DEG-100 DEG_f200 to 350 μm, and the diameter of the substrate is 100mm or less.

(10) The indium phosphide substrate according to item (9), wherein the angle θ formed is 80 ° ≦ θ ≦ 95 ° for all the planes A having a distance of 150 μm or more and 200 μm or less from the main surface.

(11) The indium phosphide substrate according to any one of (1) to (10), wherein the radius of curvature R of the edge round on the main surface side is_fIs 223 to 338 μm.

Effects of the invention

According to the embodiments of the present invention, an indium phosphide substrate in which the sharpness of the wafer edge is suppressed when polishing is performed from the back surface of the wafer by a back-grinding method or the like can be provided.

Drawings

FIG. 1 is a schematic cross-sectional view of an indium phosphide substrate near the wafer edge.

FIG. 2 is a schematic cross-sectional view of an indium phosphide substrate near the wafer edge.

FIG. 3 is a schematic cross-sectional view of an indium phosphide substrate near the wafer edge.

FIG. 4 is a schematic sectional view of the indium phosphide substrate of the example in the vicinity of the wafer edge.

FIG. 5 is a view for explaining a radius of curvature R of an edge round of an InP substrate_fIs shown schematically in cross-section.

FIG. 6 is a schematic cross-sectional view of an indium phosphide substrate near the edge of a wafer having a tapered portion and a straight portion.

Detailed Description

[ indium phosphide substrate ]

The following describes the structure of the indium phosphide substrate of the present embodiment.

The indium phosphide (InP) substrate of the present embodiment has: for forming a main surface of the epitaxial crystal layer and a back surface on the opposite side of the main surface.

The main surfaces for forming the epitaxial crystal layer are as follows: when the indium phosphide substrate of the present embodiment is used as a substrate for epitaxial growth in order to form a semiconductor device structure, the surface on which epitaxial growth is actually performed.

The maximum diameter of the main surface of the indium phosphide substrate is not particularly limited, and may be 49 to 151mm or 49 to 101 mm. The plane shape of the indium phosphide substrate can be circular or rectangular or the like.

The thickness of the indium phosphide substrate is not particularly limited, but is, for example, preferably 300 to 900 μm, more preferably 300 to 700. mu.m. In particular, when the diameter is large, the indium phosphide substrate may be broken if its thickness is less than 300 μm, and when it exceeds 900 μm, the base material crystal may be wasted.

The indium phosphide substrate of the present embodiment can be doped with a dopant (impurity) having a carrier concentration of 1 × 10¹⁶cm^-3Above and 1 × 10¹⁹cm^-3Zn is contained in the following manner, and the carrier concentration may be 1X 10¹⁶cm^-3Above and 1 × 10¹⁹cm^-3The following embodiment contains S, and the carrier concentration may be 1X 10¹⁶cm^-3Above and 1 × 10¹⁹cm^-3The following embodiment contains Sn, and the carrier concentration may be 1X 10⁶cm^-3Above and 1 × 10⁹cm^-3The following embodiment includes Fe.

In the indium phosphide substrate of the present embodiment, when a plane A parallel to the principal surface is taken out of the wafer on one side surface, an angle theta formed by a plane B including an intersection line of the edge of the wafer and the plane A and being tangent to the edge of the wafer and a plane A extending in the wafer outer direction on the principal surface side is such that the distance from the principal surface is 100 [ mu ] m or more and 200 [ mu ] m or less, and all planes A are 0 DEG < theta < 110 deg.

In order to understand the plane a, the plane B, the angle θ, and the like, fig. 1 to 3 respectively show schematic cross-sectional views of the indium phosphide substrate near the wafer edge. The cross section of the edge of the InP substrate wafer is curved by cutting (chamfering) the corners of a rectangle as shown in FIGS. 1 to 3. Therefore, the magnitude of the angle θ changes depending on which portion of the wafer the plane a is taken on. Further, the closer the angle θ is to 180 °, the sharper the wafer edge becomes. Fig. 1 to 3 are drawings for understanding the plane a, the plane B, the intersecting line, and the angle θ of the indium phosphide substrate of the present invention, respectively, and do not directly show the indium phosphide substrate of the present invention. In the present invention, the "wafer edge" refers to a side surface of the indium phosphide substrate, that is, an outer surface excluding a main surface and a back surface.

In the example shown in fig. 1, a plane a is taken at the center in the thickness direction of the wafer. Thus, an angle θ formed by a plane B including an intersection of the wafer edge and the plane a and tangent to the wafer edge and a plane extending outward of the wafer of the plane a is 90 °.

In the example shown in fig. 2, a plane a is taken at the upper portion in the thickness direction of the wafer. Thus, when the plane A is taken at the upper portion of the wafer in the thickness direction, an angle θ formed by a plane B including the intersection line of the wafer edge and the plane A and tangent to the wafer edge and a plane A extending in the wafer outer direction becomes an obtuse angle (90 ° < θ < 180 °).

In the example shown in fig. 3, a plane a is taken at the lower portion of the wafer in the thickness direction. Thus, when the plane A is taken at the lower portion of the wafer in the thickness direction, the angle θ formed by the plane B including the intersection line of the wafer edge and the plane A and tangent to the wafer edge and the plane A extending in the wafer outer direction is an acute angle (0 ° < θ < 90 °).

In the indium phosphide substrate of the present embodiment, the angle θ is controlled so that 0 ° < θ ≦ 110 ° for all the planes a having a distance of 100 μm or more and 200 μm or less from the main surface. According to such a configuration, when the indium phosphide substrate is polished from the wafer back surface to the plane a by a back-grinding method or the like, the sharpness of the wafer edge is suppressed. Therefore, for example, in a process or the like, generation of damage such as chipping at the wafer edge can be favorably suppressed. The angle theta is preferably controlled so that 60 DEG-100 DEG is provided for all planes A having a distance of 100 to 200 mu m from the main surface.

As described above, the plane B is a plane including the intersection between the wafer edge and the plane a and tangent to the wafer edge, and even if the intersection between the wafer edge and the plane a is determined, the value of the angle θ formed by the plane B and the plane a extending outward from the wafer on the main surface side changes to some extent depending on the degree of roughness of the surface of the wafer edge. The change in the angle θ due to the surface roughness of the wafer edge is considered to have a very small influence on the suppression of the sharpness of the wafer edge, which is particularly effective in the present invention and is generated when polishing is performed from the back surface of the wafer by a back grinding method or the like. Each angle θ defined in the embodiment of the present invention is a value measured by observing the shape of the Wafer Edge by means of a Wafer Edge Profile Checker (EPRO-212 EO, manufactured by the ministry of male flight electronics) as described later, and the plane B may be measured with accuracy to the extent that it can be measured using the Wafer Edge Profile Checker, regardless of the degree of surface roughness of the Wafer Edge.

In the present embodiment, the reason why the flat surfaces a are all flat surfaces a having a distance of 100 μm or more and 200 μm or less from the main surface is that the above-described effects can be obtained for an indium phosphide substrate having a thickness of 100 μm or more and 200 μm or less from the back surface of the wafer by back grinding or the like.

As shown in fig. 5, the indium phosphide substrate of the present embodiment has an edge fillet having a radius of curvature R at least on the principal surface side in a cross section orthogonal to the wafer edge_f. The indium phosphide substrate may also have an edge fillet on the back side, the edge fillet having a prescribed radius of curvature R_b. Further, the wafer edge may be configured as a bag as shown in FIG. 6Comprises the following steps: a tapered portion formed by reducing the thickness of the wafer from the main surface side and the back surface side; an edge fillet smoothly connected with the tapered portion; and a straight line portion L along the thickness direction and smoothly connected with the edge round corner.

In another aspect of the indium phosphide substrate of the present embodiment, when a plane A parallel to the major surface is taken as the wafer, an angle θ formed by a plane B including an intersection between the edge of the wafer and the plane A and being tangent to the edge of the wafer and a plane A extending in the wafer outer direction on the major surface side is 0 ° < θ ≦ 100 ° for all planes A having a distance of 150 μm or more and 200 μm or less from the major surface. In this embodiment, the angle θ is controlled so that 0 ° < θ ≦ 100 ° for all the planes A having a distance of 150 μm or more and 200 μm or less from the main surface. With this configuration, when the indium phosphide substrate is polished from the wafer back surface to the plane a by a back-grinding method or the like, the sharpness of the wafer edge is suppressed. Therefore, for example, in a process or the like, damage such as chipping or the like generated at the edge of the wafer can be favorably suppressed. The angle theta is preferably controlled so that 60 DEG-95 DEG is formed for all planes A having a distance of 150 to 200 mu m from the main surface.

In the present embodiment, the reason why the flat surfaces a are all flat surfaces a having a distance of 150 μm or more and 200 μm or less from the main surface is that the above-described effects can be obtained for an indium phosphide substrate having a thickness of 150 μm or more and 200 μm or less from the back surface of the wafer by back grinding or the like.

In still another aspect of the indium phosphide substrate of the present embodiment, when a plane A parallel to the major surface is taken out of the wafer, an angle θ formed by a plane B including an intersection between the edge of the wafer and the plane A and being tangent to the edge of the wafer and a plane A extending in the wafer outer direction on the major surface side is such that the distance from the major surface is not less than 100 μm and not more than 200 μm, in all planes A, θ is not less than 60 ° and not more than 90 °, and the diameter of the substrate is not more than 50.8 mm. In this embodiment, the angle θ is controlled so that the angle θ is 60 ° ≦ θ ≦ 90 ° for all the planes A whose distance from the main surface is 100 μm or more and 200 μm or less. According to the structure, when the indium phosphide substrate with the diameter of less than 50.8mm is ground from the back surface of the wafer to the plane A by a back grinding method, the sharp edge of the wafer is inhibited. Therefore, for example, in a process or the like, generation of damage such as chipping at the wafer edge can be favorably suppressed. The angle theta is preferably controlled so that the angle theta is 60 DEG-90 DEG for all planes A having a distance of 150 to 200 [ mu ] m from the main surface.

In another aspect of the indium phosphide substrate of the present embodiment, when a plane A parallel to the major surface is taken as a wafer, an angle θ formed by a plane B including an intersection between the edge of the wafer and the plane A and being tangent to the edge of the wafer and a plane A extending in the wafer outer direction on the major surface side is 80 DEG-110 DEG in all planes A having a distance of 100 to 200 [ mu ] m from the major surface, and the diameter of the substrate is 76.2mm or less. In this embodiment, the angle θ is controlled so that the angle θ is 80 ° ≦ θ ≦ 110 ° for all the planes A whose distance from the main surface is 100 μm or more and 200 μm or less. With this configuration, when the indium phosphide substrate having a substrate diameter of 76.2mm or less is polished from the back side of the wafer to the plane a by a back grinding method or the like, the edge sharpness of the wafer is suppressed. Therefore, for example, in a process or the like, generation of damage such as chipping at the wafer edge can be favorably suppressed. The angle theta is preferably controlled so that the angle theta is 80 DEG-100 DEG for all planes A having a distance of 150 to 200 [ mu ] m from the main surface.

In another aspect of the indium phosphide substrate of the present embodiment, when a plane A parallel to the major surface is taken as a wafer, an angle θ formed by a plane B including an intersection between the edge of the wafer and the plane A and being tangent to the edge of the wafer and a plane A extending in the wafer outer direction on the major surface side is 80 DEG-100 DEG in all planes A having a distance of 100 to 200 [ mu ] m from the major surface, and the diameter of the substrate is 100mm or less. In this embodiment, the angle θ is controlled so that the angle θ is 80 ° ≦ θ ≦ 100 ° for all the planes A whose distance from the main surface is 100 μm or more and 200 μm or less. According to this configuration, when the indium phosphide substrate having a substrate diameter of 100mm or less is polished from the back surface of the wafer to the plane a by a back grinding method or the like, the edge sharpness of the wafer is suppressed. Therefore, for example, in a process or the like, generation of damage such as chipping at the wafer edge can be favorably suppressed. The angle theta is preferably controlled so that the angle theta is 80 DEG-95 DEG for all planes A having a distance of 150 to 200 [ mu ] m from the main surface.

In the present embodiment, the reason why the flat surfaces a are all flat surfaces a having a distance of 100 μm or more and 200 μm or 150 μm or more and 200 μm or less from the main surface is that the above-described effects can be obtained for an indium phosphide substrate having a thickness of 100 μm or more and 200 μm or 150 μm or more and 200 μm or less from the back surface of the wafer to which polishing is performed by a back grinding method or the like until the distance from the main surface is 100 μm or more and 200 μm or less.

Further, in all the embodiments described above, the radius of curvature R of the edge round of the principal surface side of the indium phosphide substrate_f200 to 350 μm. Radius of curvature R if the edge of the main face is rounded_fIf the thickness is less than 200 μm, the taper portion becomes long when the wafer edge having the taper portion as shown in fig. 6 is formed, and the taper portion remains when the back grinding is made thin, so that the sharpness of the wafer edge cannot be suppressed. In addition, the radius of curvature R when the edge on the main surface side is rounded_fWhen the thickness exceeds 350 μm, the thickness of the substrate increases when the wafer edge having the tapered portion as shown in FIG. 6 is formed. Radius of curvature R of edge fillet of main surface side_fMore preferably 223 to 338 μm.

[ method for producing indium phosphide substrate ]

Next, a method for manufacturing an indium phosphide substrate according to an embodiment of the present invention will be described.

As a method for producing an indium phosphide substrate, first, an ingot of indium phosphide is produced by a known method.

Next, the ingot of indium phosphide was ground to form a cylinder.

Next, a wafer having a main surface and a back surface was cut out from the ground indium phosphide ingot. At this time, both ends of the crystal of the indium phosphide ingot were cut along a predetermined crystal plane using a wire saw, and a plurality of wafers were cut out to a predetermined thickness.

Next, in order to remove the work-affected layer generated in the dicing step by the wire saw, the diced wafer is subjected to double-sided etching (primary etching) with a predetermined etching solution. The wafer can be etched by immersing the entire wafer in an etching solution.

Next, the outer peripheral portion of the wafer is chamfered, and at least one of the surfaces of the chamfered wafer is preferably polished on both sides. This polishing step is also called a lapping (lapping) step, and removes irregularities on the wafer surface while maintaining the flatness of the wafer by polishing with a predetermined polishing agent.

Next, the polished wafer is subjected to double-sided etching (secondary etching) using a predetermined etching solution. The wafer can be etched by immersing the entire wafer in the etching solution.

Next, the main surface of the wafer is polished with a polishing material for mirror polishing to finish the wafer into a mirror surface.

Next, the indium phosphide wafer according to the embodiment of the present invention was produced by cleaning.

In the indium phosphide substrate of the present embodiment, in order to control the angle θ formed by the plane B tangent to the wafer edge and the plane a extending outward from the wafer on the principal surface side among all the planes a having a predetermined range of distance from the principal surface, the shape of the wafer edge can be controlled by appropriately adjusting the chamfering amount based on the amount of cut of the wafer in the above-described brushing, etching and polishing. More specifically, by setting the chamfering amounts (chamfering widths from the edge of the wafer) on the main surface side and the back surface side of the wafer to be in the range of 50 to 150 μm and removing (polishing) the removal amounts on the main surface side and the back surface side after chamfering in the range of 150 μm or less in the thickness direction of the wafer, the angle θ formed by the plane B tangent to the edge of the wafer and the plane a extending in the wafer outer direction on the main surface side can be appropriately controlled in all planes a having a predetermined distance from the main surface.

[ semiconductor epitaxial wafer ]

A semiconductor epitaxial wafer can be produced by epitaxially growing a semiconductor thin film on the main surface of the indium phosphide substrate according to the embodiment of the present invention by a known method to form an epitaxial crystal layer. As an example of the epitaxial growth, a HEMT (High Electron Mobility Transistor) structure may be formed by epitaxially growing an InAlAs buffer layer, an InGaAs channel layer, an InAlAs spacer layer, and an InP Electron supply layer on the main surface of an indium phosphide substrate. In the case of fabricating a semiconductor epitaxial wafer having such a HEMT structure, an indium phosphide substrate after mirror finishing is usually subjected to an etching treatment with an etching solution such as sulfuric acid/hydrogen peroxide water to remove impurities such as silicon (Si) adhering to the substrate surface. An epitaxial film is formed on the main surface of the indium phosphide substrate by Molecular Beam Epitaxy (MBE) or Metal Organic Chemical Vapor Deposition (MOCVD) in a state in which the back surface of the etched indium phosphide substrate is in contact with and supported by a susceptor (susceptor).

Examples

Hereinafter, examples for better understanding of the present invention and advantages thereof will be provided, but the present invention is not limited to these examples.

Examples 1 to 4 and comparative examples 1 to 2 were produced as follows.

First, a single crystal ingot of indium phosphide was prepared, which was grown with a predetermined diameter.

Next, the outer periphery of the ingot of the single crystal of indium phosphide was ground to form a cylinder.

Next, a wafer having a main surface and a back surface was cut out from the ground indium phosphide ingot. At this time, both ends of the crystal of the indium phosphide ingot were cut along a predetermined crystal plane using a wire saw, and a plurality of wafers were cut out to a predetermined thickness. In the step of cutting out the wafer, a new wire is continuously conveyed while reciprocating the wire, and indium phosphide is moved to a wire saw. The dimensions (wafer diameter and wafer thickness) of the wafers produced herein are shown in table 1.

Next, in order to remove the work-affected layer generated in the dicing step with the wire saw, the diced wafer was etched from both sides with a mixed solution of 85 mass% phosphoric acid aqueous solution and 30 mass% hydrogen peroxide aqueous solution (primary etching). The entire wafer is immersed in an etching solution to be etched.

Next, the outer peripheral portion of the wafer is chamfered, and both surfaces of the chamfered wafer are polished (brushed). At this time, by polishing with the abrasive, irregularities on the wafer surface are removed while maintaining the flatness of the wafer.

Next, the polished wafers were etched from both sides with a mixed solution of 85 mass% phosphoric acid aqueous solution, 30 mass% hydrogen peroxide water and ultrapure water in the total etching amount (thickness etched from the surface) shown in table 1 (secondary etching). The wafer is etched by immersing the entire wafer in the etching solution.

Next, the principal surface of the wafer was polished (polished) to a mirror surface with a polishing material for mirror polishing, and then cleaned, thereby producing an indium phosphide substrate.

Table 1 shows the conditions in the wafer manufacturing process described above. For each condition in table 1, a schematic cross-sectional view of the indium phosphide substrate near the wafer edge shown in fig. 4 can be referred to.

In table 1, "post-chamfering process, main surface side removal amount: wafer thickness direction (μm) "," post-chamfering process, backside removal amount: the wafer thickness direction (μm) "represents the total of the amounts removed by the above-described brushing, secondary etching and polishing on the main surface side and the back surface side of the wafer, respectively.

In examples 1 to 4, when the plane a parallel to the main surface of the wafer is taken in each wafer, the wafer production was adjusted so that the angle θ between the plane a at a predetermined distance from the main surface, the plane B including the intersection between the wafer edge and the plane a and being tangent to the wafer edge, and the plane a extending in the wafer outer direction was within a predetermined range. Further, a radius of curvature R for a major face side edge fillet_fThe wafer manufacturing is adjusted so as to fall within a predetermined range.

(evaluation)

The Edge shape of the wafers of examples 1 to 4 and comparative examples 1 to 2 was measured using a Wafer Edge Profile Checker (EPRO-212 EO manufactured by Male Electron Mills). Angle (theta)₁、θ₂、θ₃) The calculation of (a) is carried out by the following method: a straight line A (corresponding to a plane A) parallel to the main surface and corresponding to the back-ground thickness is drawn, a tangent line B (corresponding to a plane B) having an intersection of the straight line A and the wafer edge as a tangent point is drawn, and an angle formed by the straight line A and the tangent line B is obtained.

The shapes of the wafers produced, the wafer production conditions, and the above evaluation results of the wafers are shown in table 1.

In example 1 of table 1, the radius of curvature R of the edge fillet on the main surface side_fThe numerical value of the wafer after chamfering is shown. On the other hand, examples 2 to 4 and comparative examples 1 to 2 in table 1 show the numerical values of the wafers whose main surfaces were polished (polished) to mirror surfaces with the polishing material for mirror polishing. Radius of curvature R of edge fillet on principal surface side of wafer_fThe radius of curvature after grinding (polishing) and the radius of curvature after chamfering are assumed to be the same.

[ Table 1]

The substrate of examples 1 to 4 was excellent in suppressing the sharpness of the edge of the wafer after the back surface removal. In contrast, the substrate of comparative examples 1 and 2 had a large edge sharpness of the wafer after the back surface removal.