General series-parallel connection architecture of lithium battery pack

文档序号:37444 发布日期:2021-09-24 浏览:19次 中文

阅读说明:本技术 通用锂电池组串并联架构 (General series-parallel connection architecture of lithium battery pack ) 是由 朱希平 李光明 高海刚 兰丽菊 万亚当 于 2021-07-16 设计创作,主要内容包括:本发明公开一种通用锂电池组串并联架构,包括串联或并联连接的若干电池组和分别与一电池组对应的若干控制模组,各个电池组分别由一控制模组独立进行充电管理,过压过充现象发生时,可以将故障造成的不良影响隔离限制在独立的本地模块内,不影响整个电池系统的功能。控制模组包括串联均衡电路和并联均衡电路,串联均衡电路用于控制串联的电池组之间和/或电池组中的若干电芯之间的电压均衡,并联均衡电路用于对并联的电池组中的电芯的电流进行自动均衡,通过串联均衡电路、并联均衡电路降低了对串联电池组之间和/或电池组中各单体电芯之间以及并联电池组之间一致性的要求,提高电池组串并联使用的可行性。(The invention discloses a general series-parallel connection architecture of lithium battery packs, which comprises a plurality of battery packs connected in series or in parallel and a plurality of control modules corresponding to the battery packs respectively, wherein each battery pack is independently subjected to charging management by one control module, and when an overvoltage and overcharge phenomenon occurs, adverse effects caused by faults can be isolated and limited in an independent local module without affecting the function of the whole battery system. The control module comprises a series equalization circuit and a parallel equalization circuit, the series equalization circuit is used for controlling voltage equalization between the series-connected battery packs and/or between a plurality of battery cells in the battery packs, the parallel equalization circuit is used for automatically equalizing the current of the battery cells in the parallel-connected battery packs, the requirements on consistency between the series-connected battery packs and/or between the single battery cells in the battery packs and between the parallel-connected battery packs are reduced through the series equalization circuit and the parallel equalization circuit, and the feasibility of series-parallel connection use of the battery packs is improved.)

1. The utility model provides a general lithium battery group series-parallel connection framework, its characterized in that includes a plurality of groups of batteries and respectively with one a plurality of control module groups that the group battery corresponds, establish ties or parallel connection between a plurality of groups of batteries, each the group battery includes a plurality of electric cores of establishing ties in proper order, the control module group is including series equalization circuit and parallelly connected equalization circuit, series equalization circuit is used for the control to establish ties between the group battery and/or voltage balance between a plurality of electric cores in the group battery, parallelly connected equalization circuit is used for carrying out automatic equalization to parallelly connected the electric current of electric core in the group battery.

2. The universal series-parallel architecture for lithium battery packs as claimed in claim 1, wherein the parallel equalization circuit comprises a plurality of ntc thermistors, and the cells in the same sequence in all the parallel battery packs are connected in parallel through the corresponding ntc thermistors to form corresponding internal charging and discharging branches, and all the internal charging and discharging branches are arranged in parallel, and the ntc thermistors perform automatic equalization on the currents of all the cells in the parallel battery packs.

3. The universal lithium battery string-parallel architecture as recited in claim 2, wherein the ntc thermistor is a power ntc thermistor.

4. The universal lithium battery pack series-parallel architecture of claim 2, wherein one of the positive electrodes and the negative electrodes of the cells in the same sequence in the parallel-connected adjacent battery packs is electrically connected through the ntc thermistor, and the other of the positive electrodes and the negative electrodes of the cells in the same sequence in the parallel-connected adjacent battery packs is electrically connected through a conducting wire, so that the cells in the same sequence in the battery packs are arranged in parallel.

5. The series-parallel architecture of a universal lithium battery pack as claimed in claim 2, wherein the battery pack is provided with a current equalizing interface, and the current equalizing interfaces of the parallel and adjacent battery packs are electrically connected through corresponding current equalizing harnesses, so that all internal charging and discharging branches are arranged in parallel through the corresponding current equalizing harnesses.

6. The universal lithium battery pack series-parallel architecture of claim 1, wherein the series equalization circuit comprises a module-level equalization circuit and a cell-level equalization circuit, the cell-level equalization circuit is configured for equalization among a plurality of cells in the corresponding battery pack, and the module-level equalization circuit is configured for equalization among a plurality of battery packs connected in series.

7. The universal lithium battery pack series-parallel architecture according to claim 6, wherein the series equalization circuit comprises an equalization control unit, the cell-level equalization circuit comprises a first discharge resistor and a first switch, the first discharge resistor and the first switch correspond to a plurality of cells in the battery pack in a one-to-one manner, the cells, the first discharge resistor and the first switch, which correspond to each other, are connected in series to form a loop, and the equalization control unit controls on/off of the first switch in each loop; the module level equalization circuit comprises a second discharge resistor and a second switch which correspond to the battery pack, the second discharge resistor and the second switch which correspond to each other are connected in series to form a loop, and the equalization control unit controls the on-off of the second switch in each loop.

8. The series-parallel architecture of universal lithium battery set according to claim 1, wherein at least one of the control modules is a master module, and the other control modules are slave modules, the master module comprises a master charging loop, an equalizing charging loop and a charging control circuit, the equalizing charging loop is connected in parallel with the master charging loop and comprises a current limiting resistor, and the charging control circuit is connected with the equalizing charging loop, the master charging loop and the equalizing charging loop for conducting the master charging loop to charge the battery set; or when the series equalization circuit starts equalization, the main charging loop is disconnected and the equalization charging loop is conducted to charge the battery pack.

9. The series-parallel architecture of a universal lithium battery pack according to claim 8, wherein the charge control circuit comprises an or gate, a photoelectric coupler and a switch circuit, an input end of the or gate is connected to the equalizing circuit, an output end of the or gate is connected to a transmitting end of the photoelectric coupler, the switch circuit is connected between a receiving end of the photoelectric coupler and the equalizing charge loop, and the switch circuit is turned on when the photoelectric coupler is turned on to turn on the equalizing charge loop to charge the battery pack.

10. The series-parallel architecture of universal lithium battery set according to claim 1, wherein the plurality of control modules are distributed in a matrix form, each control module includes a plurality of connection ports, the plurality of connection ports are connected in parallel, in a column direction and a row direction, every two adjacent control modules are connected through the corresponding connection port, at least one control module serves as a master control module, the other control modules serve as slave control modules, and the switching signal of each slave control module is sequentially transmitted to the master control module through the connection ports.

Technical Field

The invention relates to the technical field of lithium batteries, in particular to a series-parallel framework of a universal lithium battery pack.

Background

Due to the special physical and chemical properties and electrical indexes of the lithium ion battery, in practical application, customized design is often required according to indexes such as voltage, capacity and overall dimension, namely, a large-scale battery system is formed by smaller single battery packs in a series or parallel connection mode so as to improve the voltage and the capacity. And also needs to be matched with a corresponding electrical Battery Management System (BMS) to meet specific practical requirements.

The existing system architecture of the customized outer box matched with the corresponding BMS has the following defects: 1. the battery box has a complex appearance structure and poor universality, and cannot be directly replaced with the existing lead-acid system in the market; 2. the whole battery system has high requirements on the consistency of the single battery cells of the battery pack for ensuring the performance and the safety; 3. when a single battery pack breaks down, the whole battery system must be replaced, the cost is high, and the maintainability is poor; BMS circuit structure is complicated, the reliability is poor; 5. data transmission depends on a connector, a wire harness or other communication links, so that the cost is high and the reliability is poor; 6. most of the designs add protection function in each single battery pack, and the power loss is large; 7. most of the discharge used in the design is balanced, the effect is poor, and the loss is large; 8. when the battery packs are used in series, the whole battery system fails due to the factors such as poor consistency, performance attenuation and the like of a single battery pack, and the reliability of the battery system is low; 9. when the battery packs are connected in parallel, no special current-sharing design exists, and the problems of poor consistency, performance attenuation and the like are easily caused in the using process.

Therefore, it is desirable to provide a new series-parallel connection architecture of a general lithium battery pack to solve the above problems in the prior art.

Disclosure of Invention

The invention aims to provide a series-parallel connection architecture of a universal lithium battery pack, which improves the feasibility of series-parallel connection of the universal lithium battery pack without complex auxiliary circuits and communication links.

In order to achieve the above object, the present invention provides a series-parallel connection architecture for a general lithium battery pack, which includes a plurality of battery packs and a plurality of control modules respectively corresponding to one of the battery packs. The battery packs are connected in series or in parallel, and each battery pack comprises a plurality of electric cores which are connected in series in sequence. The control module group comprises a series equalization circuit and a parallel equalization circuit, the series equalization circuit is used for controlling voltage equalization between the battery groups connected in series and/or between a plurality of battery cells in the battery groups, and the parallel equalization circuit is used for automatically equalizing the current of the battery cells in the battery groups connected in parallel.

Compared with the prior art, each battery pack is independently subjected to charging management by a control module, when an overvoltage and overcharge phenomenon occurs, adverse effects caused by faults can be isolated and limited in an independent local module, the functions of the whole battery system are not influenced, further, the influence of the consistency of each single battery pack on the whole charging effect of the battery system is weakened, and the functional integrity of the whole battery system is ensured to the maximum extent; the requirement on the consistency among the battery packs is reduced, the application range of a single battery pack is improved, namely the battery cell matching rate and the utilization rate, and the cost of the battery pack is further reduced; meanwhile, as each battery pack is independently charged and managed, the quantity and complexity of connectors, wiring harnesses, communication links and other related circuits and components are reduced to the maximum extent, so that the reliability of the battery system is improved, and the cost is reduced. Each control module comprises a series equalization circuit and a parallel equalization circuit, and the series equalization circuit is used for controlling the voltage equalization among the series battery packs and/or among a plurality of battery cells in the battery packs, so that the requirement on the consistency among the series battery packs and/or among the single battery cells in the battery packs is lowered, the reliability of a battery system is further improved, and the feasibility of series use of the battery packs is improved; the parallel balancing circuit realizes automatic current sharing of the currents of all the electric cores in the parallel battery packs, so that the requirement on the consistency of the parallel battery packs is lowered, the reliability of a battery system is further improved, and the feasibility of parallel use of the battery packs is improved. When the single battery pack needs to be replaced, specific equipment such as a balance charger and the like does not need to be balanced in advance or used, and the technical difficulty and the working strength of field maintenance are reduced.

Preferably, the parallel balancing circuit includes a plurality of ntc thermistors, the electric cores in the battery packs connected in parallel and located in the same sequence are connected in parallel through corresponding ntc thermistors to form corresponding internal charging and discharging branches, all the internal charging and discharging branches are arranged in parallel, and the ntc thermistors automatically balance the currents of all the electric cores in the battery packs connected in parallel.

Preferably, the NTC thermistor is a power type NTC thermistor.

Preferably, one of the positive electrode and the negative electrode of the battery cells located in the same sequence in the parallel and adjacent battery packs is electrically connected through the negative temperature coefficient thermistor, and the other of the positive electrode and the negative electrode of the battery cells located in the same sequence in the parallel and adjacent battery packs is electrically connected through a lead, so that the battery cells located in the same sequence in the battery packs are arranged in parallel.

Preferably, the battery pack is provided with a current equalizing interface, and the current equalizing interfaces of the battery packs which are connected in parallel and adjacent to each other are electrically connected through corresponding current equalizing harnesses, so that all internal charging and discharging branches are arranged in parallel through the corresponding current equalizing harnesses.

Preferably, the series equalization circuit includes a module-level equalization circuit and a cell-level equalization circuit, the cell-level equalization circuit is used for equalization among a plurality of cells in the corresponding battery pack, and the module-level equalization circuit is used for equalization among a plurality of battery packs connected in series.

Preferably, the series equalization circuit includes an equalization control unit, the cell-level equalization circuit includes first discharge resistors and first switches that are in one-to-one correspondence with the plurality of cells in the battery pack, and the cells, the first discharge resistors and the first switches that correspond to each other are connected in series to form a loop, and the equalization control unit controls on/off of the first switches in each loop; the module level equalization circuit comprises a second discharge resistor and a second switch which correspond to the battery pack, the second discharge resistor and the second switch which correspond to each other are connected in series to form a loop, and the equalization control unit controls the on-off of the second switch in each loop.

Preferably, at least one of the control modules is used as a master control module, and the other control modules are used as slave control modules, the master control module includes a main charging loop, an equalizing charging loop and a charging control circuit, the equalizing charging loop is connected in parallel with the main charging loop and includes a current-limiting resistor, and the charging control circuit is connected with the equalizing circuit, the main charging loop and the equalizing charging loop and is used for conducting the main charging loop to charge the battery pack; or when the series equalization circuit starts equalization, the main charging loop is disconnected and the equalization charging loop is conducted to charge the battery pack.

Preferably, the charge control circuit includes an or gate, a photoelectric coupler and a switch circuit, an input end of the or gate is connected to the equalizing circuit, an output end of the or gate is connected to a transmitting end of the photoelectric coupler, the switch circuit is connected between a receiving end of the photoelectric coupler and the equalizing charge circuit, and the switch circuit is turned on when the photoelectric coupler is turned on, so as to turn on the equalizing charge circuit to charge the battery pack.

Preferably, a plurality of control module groups are distributed in a matrix form, each control module group comprises a plurality of connecting ports, the connecting ports are connected in parallel, the control modules are connected in the row direction and the row direction, every two adjacent control module groups are connected through the corresponding connecting ports, at least one control module group serves as a master control module group, the other control module groups serve as slave control module groups, and the switching signals of the slave control module groups are sequentially transmitted to the master control module group through the connecting ports.

Drawings

Fig. 1 is a block diagram of a series-parallel connection architecture of a general lithium battery pack according to an embodiment of the present invention.

Fig. 2 is an equivalent circuit diagram of a parallel equalizer circuit according to an embodiment of the present invention.

Fig. 3 is a simplified schematic diagram of a battery pack having a current sharing interface according to an embodiment of the present invention.

Fig. 4 is a schematic structural diagram of two battery packs electrically connected through a current sharing interface according to an embodiment of the present invention.

Fig. 5 is a block diagram of a part of the serial-parallel connection architecture of the general lithium battery pack according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of a charger detection circuit according to an embodiment of the present invention

Fig. 7 is a partial schematic diagram of a master control module according to an embodiment of the invention.

FIG. 8 is a partial schematic diagram of a slave control module according to an embodiment of the present invention.

Fig. 9 is a schematic diagram of a second switch circuit according to an embodiment of the invention.

Fig. 10 is a schematic diagram of an equalizing charge loop according to an embodiment of the invention.

Fig. 11 is a flowchart illustrating a cell-level and module-level two-level equalization mechanism according to an embodiment of the present invention.

Fig. 12 is a schematic diagram illustrating connection of a control module signaling architecture according to an embodiment of the present invention.

Fig. 13 is an equivalent circuit diagram of the signal transmission architecture shown in fig. 11.

Fig. 14 is an enlarged view of a portion a in fig. 13.

Detailed Description

In order to explain technical contents and structural features of the present invention in detail, the following description is made with reference to the embodiments and the accompanying drawings. It is to be understood that the described embodiments are merely a subset of embodiments of the invention and not all embodiments of the invention, with the understanding that the invention is not limited to the example embodiments described herein. All other embodiments, which can be derived by a person skilled in the art from the described embodiments without inventive effort, shall fall within the scope of protection of the invention.

Referring to fig. 1 to 14, the general series-parallel connection architecture for lithium battery packs of the present invention includes a plurality of battery packs 1 and a plurality of control modules 2 respectively corresponding to one battery pack 1, wherein the plurality of battery packs 1 are connected in series or in parallel, and each battery pack 1 includes a plurality of cells 11 connected in series in sequence. The control module 2 comprises a series equalization circuit and a parallel equalization circuit, the series equalization circuit is used for controlling voltage equalization between the series-connected battery packs 1 and/or between a plurality of battery cells 11 in the battery packs 1, and the parallel equalization circuit is used for automatically equalizing the current of the battery cells 11 in the parallel-connected battery packs 1.

Hereinafter, the series-parallel connection architecture of the general lithium battery pack according to the present invention will be described in detail with reference to fig. 1 to 14.

Referring to fig. 1 to 4, fig. 2 is an equivalent circuit diagram of a parallel equalizing circuit when 4 battery packs 1 are connected in parallel. As shown in fig. 2, the parallel balancing circuit includes a plurality of ntc thermistors 31, the cells 11 in the same sequence in the four battery packs 1 are connected in parallel through the corresponding ntc thermistors 31 to form corresponding internal charging and discharging branches 32, all the internal charging and discharging branches 32 are arranged in parallel, and the ntc thermistors 31 automatically balance the currents of all the cells 11.

By utilizing the inherent physical characteristics of the negative temperature coefficient thermistor 31, the real-time automatic equalization of the battery pack 1 is effectively realized without complex auxiliary circuits and communication links; meanwhile, the negative temperature coefficient thermistor 31 has stable characteristics and high equalization efficiency, can realize real-time equalization by simply transforming the traditional parallel battery pack 1, has a simple circuit structure, low cost and high reliability, and is convenient for later maintenance and replacement of the battery pack 1.

In a preferred embodiment, the ntc thermistor 31 is a power-type ntc thermistor 31, so that the ntc thermistor 31 can withstand a large power to satisfy the normal operation of the battery system. Due to the inherent negative temperature coefficient characteristic of the power type negative temperature coefficient thermistor 31, the power type negative temperature coefficient thermistor 31 can automatically match and adjust the equalizing current of the internal charging and discharging branch 32 in which the power type negative temperature coefficient thermistor is located according to the voltage difference between the battery cells 11 in real time, so that each battery cell 11 of the current internal charging and discharging branch 32 has the same equalizing current. Since each internal charging and discharging branch 32 is arranged in parallel, all the battery cells 11 have the same balance current under the common current balance effect of each internal charging and discharging branch 32, so as to realize the real-time current balance of all the battery cells 11 of the battery pack 1.

During actual circuit design, appropriate equalization current can be achieved only by selecting the power type negative temperature coefficient thermistor 31 with appropriate temperature coefficient, power and zero power resistance values according to the specification, model, internal resistance, voltage and other parameters of all the electric cores 11 in the current battery pack 1, so as to meet the requirement of real-time current equalization of all the electric cores 11 of the battery pack 1. According to the design, an additional control circuit or a BMS system is not required to be arranged, the circuit design complexity of the parallel equalization circuit is effectively reduced, the design cost is effectively reduced, and the reliability is improved.

As shown in fig. 2, as a preferred embodiment, one of the positive electrodes and the negative electrodes of the battery cells 11 in the same order in the adjacent battery packs 1 is electrically connected through the negative temperature coefficient thermistor 31, and the other of the positive electrodes and the negative electrodes of the battery cells 11 in the same order in the adjacent battery packs 1 is electrically connected through a lead, so that the battery cells 11 in the same order in all the battery packs 1 are arranged in parallel. Specifically, the adjacent internal charge and discharge branches 32 share all the ntc thermistors 31 in the same order in the battery pack 1.

For example, for the cells 11 in the first sequence, since the respective battery packs 1 are arranged in parallel, the positive electrodes of the cells 11 in the first sequence are electrically connected by a conducting wire, and the adjacent cells 11 are electrically connected by the corresponding ntc thermistors 31, that is, the cells 11 in the first sequence are arranged in parallel by three ntc thermistors 31, and all the cells 11 in the first sequence and the corresponding ntc thermistors 31 constitute an internal charging and discharging branch 32, and the internal charging and discharging branch 32 performs a real-time current balancing operation on the respective cells 11 therein.

For the cells 11 in the second sequence, since the cells 11 of the same battery pack 1 are connected in series in sequence, the positive electrodes of the cells 11 in the second sequence share the three ntc thermistors 31 in the first sequence, and the negative electrodes of the cells 11 in the second sequence are electrically connected through a wire, that is, at this time, the cells 11 in the second sequence are arranged in parallel through the three ntc thermistors 31, at this time, all the cells 11 in the second sequence and the corresponding ntc thermistors 31 form an internal charging and discharging branch 32, and the internal charging and discharging branch 32 performs a real-time current balancing operation on the cells 11 therein.

The connection modes of the battery cells 11 in the third order and the fourth order are set as described above, and are not described in detail. At this time, the parallel balancing circuit has four internal charging and discharging branches 32 connected in parallel, the four internal charging and discharging branches 32 perform current balancing operation in real time, and real-time balancing of all the battery cells 11 is realized under the combined action of the internal charging and discharging branches 32. In addition, the adjacent internal charging and discharging branches 32 share all the negative temperature coefficient thermistors 31 which are positioned in the same sequence in the battery pack 1, so that the number of the negative temperature coefficient thermistors 31 is effectively saved, and the circuit manufacturing cost is effectively reduced.

In some embodiments, the ntc thermistor 31 may be disposed in the corresponding battery pack 1 to prevent the ntc thermistor 31 from being directly exposed to the external environment, and effectively prevent the ntc thermistor 31 from affecting the stability due to environmental changes. In other embodiments, the battery pack 1 is provided with a current equalizing interface 33 (as shown in fig. 3), the current equalizing interfaces 33 of all battery packs 1 are electrically connected through corresponding current equalizing harnesses 34 (as shown in fig. 4) also provided with current equalizing interfaces 33, so that all internal charging and discharging branches 32 are arranged in parallel through the corresponding current equalizing harnesses 34, and the ntc thermistors 31 are located in the corresponding current equalizing harnesses 34. Through the above arrangement, the wiring rationality of the flow equalizing wire harness 34 is improved, and the assembly, the overhaul and the replacement are convenient.

It should be noted that, in the present embodiment, the battery pack 4S4P is used to illustrate the novel design concept, and the number of the battery packs 1 and the number of the battery cells 11 in each battery pack 1 may be set according to actual situations, which is not limited herein.

When charging and discharging the series-connected battery cells 11 in the battery pack 1 or the battery pack 1, since it cannot be ensured that all the electrical and physical and chemical indexes of the series-connected battery cells 11 or the battery pack 1 are completely consistent, a situation that a certain series-connected battery cell 11 or the battery pack 1 reaches a charge and discharge cutoff condition before other series-connected battery cells 11 or the battery pack 1 occurs in the charge and discharge process. If this happens at the time of charging, it means that the other series cells 11 or the battery pack 1 in the entire power battery are not fully charged, and if the charging is stopped at this time, a situation where the capacity of the entire power battery is insufficient may result.

Referring next to fig. 5 to 11, fig. 7 and 8 respectively show partial schematic diagrams of the control module 2 as a master and a slave. As shown in fig. 7 and 8, the series equalization circuit 4 includes a module-level equalization circuit 41 and a cell-level equalization circuit 42, where the cell-level equalization circuit 42 is used for equalization among a plurality of cells in the corresponding battery pack 1, and when each cell in the battery pack 1 reaches a cell equalization threshold, cell-level equalization is started. The module level equalization circuit 41 is used for equalization among the plurality of battery packs 1, and starts module level equalization when the total voltage of the battery packs 1 reaches a module equalization threshold value. The battery cell balance threshold value and the module balance threshold value can be flexibly set according to specific conditions.

Specifically, the series equalization circuit 4 further includes an equalization control unit 43, the cell-level equalization circuit 42 includes a first discharge resistor R7 and a first switch K7 that are in one-to-one correspondence with the plurality of cells B1-B4 in the corresponding battery pack 1, and the cells, the first discharge resistor R7 and the first switch K7 that correspond to each other are connected in series to form a loop. The module-level equalizing circuit 41 includes a second discharging resistor R8 and a second switch K8 corresponding to the battery pack 1, and the battery pack 1, the second discharging resistor R8 and the second switch K8 corresponding to each other are connected in series to form a loop. The equalization control unit 43 is connected to the first switch K7 and the second switch K8.

When cell level equalization needs to be started, the equalization control unit 43 controls the first switch K7 connected with the corresponding cell to be switched on, and discharges electricity through the first discharge resistor R7 connected with the cell; when the battery cell is balanced, the first switch K7 corresponding to the battery cell is controlled to be switched off, and at the moment, the battery cell level balance is switched off. When the module level equalization needs to be started, the equalization control unit 43 controls the second switch K8 connected with the corresponding battery pack 1 to be conducted, and the second switch K8 is discharged through a second discharge resistor R8 connected with the battery pack 1; when the battery pack 1 is balanced, the second switch K8 corresponding to the battery pack 1 is controlled to be switched off, and at the moment, the module level is balanced and switched off.

By means of a cell-level and module-level two-level equalization mechanism, after a single series battery pack 1 is overcharged to a certain degree, the whole charging loop is not disconnected, so that other battery packs 1 can be continuously charged; after a single series-connected battery cell in the battery pack 1 is overcharged to a certain extent, the whole charging loop cannot be disconnected, so that other battery cells in the battery pack 1 and other battery packs 1 can be continuously charged, and the functionality of the battery is ensured to the maximum extent.

One of the control modules 2 is used as a master control module, and the other control modules 2 are used as slave control modules. As shown in fig. 7 and 8, the master control module is different from the slave control module in that the master control module further includes a master charging circuit 5, an equalizing charging circuit 6, a pre-charging circuit, a normal charging/discharging circuit, a charger detection circuit 7 and a charging control circuit 8, wherein the master charging circuit 5, the equalizing charging circuit 6, the pre-charging circuit and the normal charging/discharging circuit are connected in parallel, and one of the master charging circuit 5, the equalizing charging circuit 6, the pre-charging circuit and the normal charging/discharging circuit is selectively turned on by a selection switch.

The main charging circuit 5 is connected to both positive and negative ends of a battery Pack (as shown in fig. 6) composed of a plurality of battery packs 1, and is used for normally charging each battery Pack 1 in the battery Pack. A switching device K (as shown in fig. 6) is connected in series to the main charging loop 5, and the switching device K is used for controlling on/off of the main charging loop 5. When the charger 001 is connected to the main charging circuit 5 and the switching device K is turned on (connected), the main charging circuit 5 is turned on, and the charger 001 can charge the battery pack 1 through the main charging circuit 5; when the switching device K is turned off, the main charging circuit 5 is turned off. The equalizing charge circuit 6 is a circuit for charging the battery pack 1 by the charger 001 in an equalizing state, and includes a current limiting resistor, through which the charge current is reduced. The charger detection circuit 7 is used to detect whether the charger 001 is connected to the main charging loop 5 (as shown in fig. 6).

As shown in fig. 5 and 7, the charging control circuit 8 is connected to the equalizing charge circuit 6, the charger detection circuit 7, the main charge circuit 5 and the equalizing charge circuit 6, and is configured to conduct the main charge circuit 5 to charge the battery pack 1 under normal conditions; alternatively, when the charger detection circuit 7 detects that the charger 001 is connected and the equalizing charge circuit 6 starts equalizing, the main charge circuit 5 is turned off and the equalizing charge circuit 6 is turned on to charge the battery pack 1, so as to reduce the charge current, enhance the effect of discharging through the first discharge resistor R7 and/or the second discharge resistor R8, and further enhance the equalizing effect.

When the cell level equalization and the module level equalization are both closed, the charging control circuit 8 disconnects the equalization charging loop 6, controls the switching device K to be switched to a normal charging and discharging mode, and charges the battery pack 1 through the main charging loop 5. The specific work flow can be seen in fig. 11.

The "normal condition" is a state when the equalizing charge circuit 6 does not start equalization, and the "equalized state" is a state when the equalizing charge circuit 6 starts equalization. When the charger detection circuit 7 detects that the charger 001 is connected and the equalizing charge circuit 6 does not start equalizing, the battery pack 1 is charged through the main charge circuit 5 to realize quick charging; when the charger detection circuit 7 detects that the charger 001 is connected and the equalizing charge circuit 6 starts equalizing, the battery pack 1 is charged through the equalizing charge circuit 6 to protect the battery cells.

Referring to fig. 6, in the embodiment shown in fig. 6, the charger detection circuit 7 includes a first resistor R1, a photocoupler O1 and a first switch circuit, and the first switch circuit includes a photocoupler O2, a photocoupler O3, a diode D1, a thyristor T1, a field-effect transistor Q2, a triode Q3, an and gate U1, a zener diode Z1, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a resistor R6. One end of the first resistor R1 is connected to the battery pack 1, the other end is connected to the emitting end O1A of the photo-electric coupler O1, the receiving end O1B of the photo-electric coupler O1 is connected to the control electrode of the thyristor T1, the anode of the thyristor T1 is connected to the emitting end O2A of the photo-electric coupler O2, the receiving end O3B of the photo-electric coupler O3 is connected in series to the emitting end O2A of the photo-electric coupler O2, the receiving end O2B of the photo-electric coupler O2 is connected to the gate of the field effect transistor Q2, the source of the field effect transistor Q2 is connected to the first input end of the and gate U2, the second input end of the gate U2 is connected to the base of the transistor Q2 to the signal OC, the emitter of the transistor Q2 is connected to the emitting end O3 2 of the photo-electric coupler O2, the emitting end O3 2 of the photo-electric coupler O2 is connected in series to the resistor R2, the zener diode Z2, and the output end of the and gate circuit U368.

In an idle state (no load 002 is connected), the switching device K is turned off, and in a normal state, the signal OC is at a high level, and the transistor Q3 and the emitting terminal O3A are turned on. After the charger 001 is connected, because the switching device K is disconnected, the charging current flows through the transmitting terminal O1A, the receiving terminal O1B is triggered, the thyristor T1 is triggered, the transmitting terminal O2A and the receiving terminal O3B are triggered, the receiving terminal O2B and the field-effect transistor Q2 are triggered, and at this time, the first input terminal of the gate U1 is at a high level; meanwhile, since the signal OC is high, the and gate U1 outputs high to the charge control circuit 8, so that the charge control circuit 8 generates a turn-on control signal to turn on the switching device K, thereby enabling the charger 001 to charge the battery pack 1 through the main charging loop 5. After the switching device K is turned on, the emitting terminal O1A is short-circuited, and since the receiving terminal O3B is in a conducting state, the thyristor T1 is kept conducting, so the switching device K is kept conducting.

When the battery pack 1 is fully charged or the series equalization circuit 4 starts equalization, the signal OC is at a low level, the and gate U1 outputs the low level to the charge control circuit 8, so that the charge control circuit 8 generates a disconnection control signal to disconnect the switching device K, and the triode Q3, the photoelectric coupler O3, the photoelectric coupler O2, the thyristor T1 and the field effect transistor Q2 are all turned off. When the voltage of the battery pack 1 is reduced to the voltage threshold value and the series equalization circuit 4 does not start equalization, the signal OC is restored to the high level, the switching device K is restored to be on, and the battery pack 1 is restored to be charged through the main charging loop 5.

In the embodiment shown in fig. 6, the charger detection circuit 7 realizes automatic charger identification without changing the existing charger and without complex auxiliary circuits, dedicated communication interfaces and communication protocols, has strong versatility, and can realize seamless replacement with the existing lead-acid system. Meanwhile, the switch device K is conducted to short the transmitting terminal O1A, so that the power consumption is reduced; moreover, the charger detection circuit 7 is simple and reliable, and can be compatible with the same port and the separate port.

Of course, the charger detection circuit 7 is not limited to the above circuit connection relationship and components, for example, in some embodiments, a triode is used instead of the fet Q2; for another example, the first resistor R1 or the like is replaced with a constant current source circuit.

Referring to fig. 7 to 9, in the embodiment shown in fig. 7 to 9, the charging control circuit 8 includes a linkage control circuit 81 and a second switch circuit 82, an input end of the linkage control circuit 81 is connected to the equalizing control unit 43, an output end of the linkage control circuit 81 is connected to the second switch circuit 82, the second switch circuit 82 is connected to the equalizing charge circuit 6, and the linkage control circuit 81 turns on or off the second switch circuit 82 based on a signal output by the equalizing control unit 43 to turn on the equalizing charge circuit 6 for equalizing charge or turn off the equalizing charge circuit 6 to switch to the main charge circuit 5 for normal charge.

As shown in fig. 7, the interlock control circuit 81 includes an or gate U2 and a photocoupler O4, an input terminal of the or gate U2 is connected to the equalization control unit 43, a transmitting terminal of the photocoupler O4 is connected to an output terminal of the or gate U2, and a second switch circuit 82 is connected to a receiving terminal of the photocoupler O4. When the equalizing control unit 43 outputs a control signal to start the cell level equalization and/or the module level equalization, the or gate U2 outputs a high level, the photoelectric coupler O4 is turned on to trigger the second switch circuit 82 to be turned on, and the equalizing charge circuit 6 is turned on to perform equalizing charge. On the contrary, when the balance control unit 43 turns off the cell level balance and the module level balance, the photoelectric coupler O4 and the second switch circuit 82 are not turned on, and the equalizing charge circuit 6 is turned off. The O4 isolated protection signal triggering, transmitting and controlling circuit of the photoelectric coupler can be universally used for a low-side or high-side protection mechanism, a circuit and components, is close to the application scene and the use method of the existing lead-acid battery to the maximum extent, and is compatible with two wiring modes of same port and split port.

As shown in fig. 9, the second switch circuit 82 includes field effect transistors Q4, Q5, Q6, Q7, and Q8, when the photocoupler O4 is turned on, Q4, Q5, Q6, Q7, and Q8 are triggered to be turned on, so that the entire second switch circuit 82 is turned on, BC is at a high level, and the battery pack 1 is charged through the equalizing charge circuit 6. Conversely, when the photocoupler O4 is non-conductive, the second switching circuit 82 is non-conductive; at this time, the charging control circuit 8 may turn on the switching device K to switch to the normal charging and discharging mode, and charge the battery pack 1 through the main charging circuit 5.

Referring to fig. 10, in the embodiment shown in fig. 10, the current limiting resistor is a positive temperature coefficient thermistor. By the design, the equalizing charge circuit 6 has the functions of automatic constant current, automatic overcurrent protection and automatic recovery. Of course, in other embodiments, a common resistor may be used as the current limiting resistor. Specifically, the equalizing charge circuit 6 includes two current limiting resistors PTC1 and PTC2 and a field effect transistor Q9 connected in series, when BC is at a high level, the field effect transistor Q9 is turned on, the equalizing charge circuit 6 is turned on, and the battery pack 1 is charged through the equalizing charge circuit 6. Of course, the equalizing charge circuit 6 in the embodiment is not limited to use of two current limiting resistors, and the fet Q9 may be eliminated.

Referring to fig. 12 to 14, as shown in fig. 12, the plurality of control modules 2 are distributed in a matrix, and the plurality of control modules 2 are distributed in M rows and N columns. One of the control modules located at one end of the diagonal line of the matrix is used as a master control module 2a, and the other control modules are used as slave control modules 2 b. Each control module 2a, 2b includes a plurality of connection ports, and the connection ports are connected in parallel. In the column direction and the row direction, every two adjacent control modules 2b and 2b/2a and 2b are connected through corresponding connecting ports. The switch signals of the slave modules 2b are sequentially transmitted to the master module 2a through the connection ports.

In the embodiment shown in fig. 12 to 14, the control module includes 12 control modules 2a and 2b, the 12 control modules 2a and 2b are distributed into 3 rows and 4 columns, one control module in the 3 rd row and the 4 th column is the master control module 2a, and the other control modules are the slave control modules 2 b. The battery packs 1 corresponding to the control modules 2a, 2b in each column are connected in series, and the battery packs 1 corresponding to the control modules 2a, 2b in each row are connected in parallel.

Referring to fig. 13 and 14, as shown in fig. 13 and 14, each of the control modules 2a and 2b has four connection ports RU, RD, RL, RR, which are respectively disposed on four different sides of the control modules 2a and 2b, two corresponding connection ports of the two adjacent control modules 2b and 2b/2a and 2b are connected by a wire harness 9, and two corresponding connection ports of the two adjacent control modules 2b and 2b/2a and 2b are disposed adjacent to and opposite to each other. As shown in fig. 13, for two adjacent control modules 2b and 2b/2a and 2b in the column or row direction, the connection port RU of one control module is connected to the connection port RD of the other control module, and the connection port RR of the control module is connected to the connection port RL of the other control module. Specifically, the connection ports RU, RD, RL, RR have insertion portions (not shown), and the insertion portions between the two adjacent control modules 2b and 2b/2a and 2b are inserted and connected through the wire harness 9 to connect the two adjacent control modules 2b and 2b/2a and 2 b.

By respectively arranging one connecting port RU, RD, RL and RR at four different sides of the control modules 2a and 2b and enabling the two connecting ports of the two adjacent control modules 2b and 2b/2a and 2b to be adjacent and opposite, the connecting distance of the wiring harness 9 between the two connecting ports of the two adjacent control modules 2b and 2b/2a and 2b is further shortened, thereby further shortening the transmission distance of signals and saving the cost of the wiring harness 9.

As a preferred embodiment, the wire harness 9 is a general-purpose type wire harness, which is strong in versatility. Plugs (not shown) matched with the plugging parts of the connection ports RU, RD, RL and RR are arranged at two ends of the wire harness 9, and the plugs are matched with the plugging parts of the connection ports RU, RD, RL and RR in a plugging manner, so that connection between the connection ports RR and RL of the two adjacent control modules 2b and 2b/2a and 2 b/connection between RU and RD are realized, and further connection between the two adjacent control modules 2b and 2b/2a and 2b is realized.

Referring to fig. 14, as shown in fig. 14, the positive terminals of the four connection ports RU, RD, RL, RR in each slave control module 2b are connected to the first loop 21, and the negative terminals of the four connection ports RU, RD, RL, RR are connected to the second loop 22. Each slave control module 2b is provided with a switching device S and a battery management system 23, the switching device S is connected between the first loop 21 and the second loop 22, the battery management system 23 controls the switching device S to be switched on in a first state, and controls the switching device S to be switched off in a second state, and the first state and the second state respectively correspond to one of a fault state of the battery pack 1 and a normal state of the battery pack 1.

In the embodiment shown in fig. 14, the switching device S is a single-contact switch, and one end of the switching device S is connected to the first loop 21 and the pull-up resistor R, and the other end is connected to the second loop 22 and grounded. Of course, the specific implementation is not limited to the specific form of the switching device S.

As shown in fig. 14, the positive terminals of the four connection ports RU, RD, RL, RR in the main control module 2a are connected to the first circuit 21, and the negative terminals of the four connection ports RU, RD, RL, RR are connected to the second circuit 22. One end of the switching device S is connected to the first loop 21 and the pull-up resistor R, and the other end is connected to the second loop 22 and grounded. Unlike the slave module 2b, the battery management system 23 in the master module 2a is provided with a signal receiving terminal ER connected to the first loop 21 of the master module 2a to receive the switching signal of the slave module 2 b.

In an embodiment, in the case that the battery management system 23 of the slave module 2b can independently handle the problem (e.g., overcharge, overdischarge, over-temperature, etc.) of the corresponding battery pack 1, the switching device S is turned off, and the slave module 2b outputs a switching signal (e.g., high level) representing normal operation to the master module 2 a. In the case that the battery management system 23 of the slave control module 2b cannot independently handle the problem of the corresponding battery pack 1, i.e. the fault state, the battery management system 23 controls the switch device S to be closed, and the slave control module 2b outputs a switch signal (e.g. low level) representing the fault state to the master control module 2a to trigger the master control module 2a to start protection, e.g. shut down the whole battery system.

In combination with the practical application of the battery pack 1, each control module 2b, 2a is provided with a plurality of parallel connection ports RU, RD, RL, RR, and each control module 2b, 2a is connected with the adjacent control module 2b, 2a nearby through the wiring harness 9 and the connection ports RU, RD, RL, RR to form a matrix signal network. The switch signals of the control module 2b as the slave module can be transmitted to the control module 2a as the master module through the connection ports RU, RD, RL, RR thereof and the connection ports RU, RD, RL, RR of the slave module 2b connected thereto, and since the same switch signal of the slave module 2b is transmitted through the connection ports RU, RD, RL, RR, there is an excellent redundancy backup effect, and the reliability of signal transmission is greatly improved. Meanwhile, the switch signals of the slave control modules 2b are sequentially transmitted in a relay manner, and the space distance between the control modules 2b and 2b, and the space distance between the control modules 2a and 2b are short, so that the signal transmission distance is short, the anti-interference capability is high, the reliability is high, and the cost of the wiring harness 9 for connecting the control modules 2b and 2b/2a and 2b is low.

In summary, each battery pack 1 is independently subjected to charging management by a control module 2, when an overvoltage and overcharge phenomenon occurs, adverse effects caused by faults can be isolated and limited in an independent local module, the functions of the whole battery system are not affected, further, the influence of the consistency of each single battery pack 1 on the whole charging effect of the battery system is weakened, and the functional integrity of the whole battery system is ensured to the maximum extent; the requirement on the consistency among the battery packs 1 is reduced, the application range of the single battery pack 1 is improved, namely the battery cell matching rate and the utilization rate, and the cost of the battery pack 1 is further reduced; meanwhile, as each battery pack 1 is independently charged and managed, the number and complexity of connectors, wiring harnesses, communication links and other related circuits and components are reduced to the maximum extent, so that the reliability of the battery system is improved, and the cost is reduced. Moreover, each control module 2 comprises a series equalization circuit and a parallel equalization circuit, and the series equalization circuit controls the voltage equalization between the series battery packs 1 and between a plurality of battery cells in the battery packs 1, so that the requirement on the consistency between the series battery packs 1 and between the single battery cells in the battery packs 1 is lowered; the parallel balancing circuit realizes automatic current sharing of the currents of all the electric cores in the parallel battery pack 1, reduces the requirement on the consistency of the parallel battery pack 1, further improves the reliability of a battery system, and improves the feasibility of series-parallel connection use of the universal lithium battery pack 1. The problem that the charging and discharging energy and power of each series-parallel battery pack 1/battery cell 11 are inconsistent due to the consistency of the battery cells 11 and structural distribution parameters when the battery packs 1 are connected in series and parallel is solved, so that the design of the battery pack 1 is simplified, and the service life and the usability are improved. When the single battery pack 1 needs to be replaced, special equipment such as a pre-balancing charger or a balancing charger is not needed, and the technical difficulty and the working strength of field maintenance are reduced.

The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the scope of the present invention, therefore, the present invention is not limited by the appended claims.

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