Preparation method of semiconductor structure

文档序号:425991 发布日期:2021-12-21 浏览:8次 中文

阅读说明:本技术 一种半导体结构的制备方法 (Preparation method of semiconductor structure ) 是由 程凯 于 2019-05-16 设计创作,主要内容包括:本申请公开了一种半导体结构的制备方法,通过选择性外延生长的方法,不需要对n型半导体层以及p型半导体层刻蚀,避免了刻蚀深度无法控制、刻蚀表面损伤等问题;有效减少栅极漏电,保持沟道区域低电阻,抑制电流崩塌,提高器件可靠性、稳定性。(The application discloses a preparation method of a semiconductor structure, which is characterized in that an n-type semiconductor layer and a p-type semiconductor layer do not need to be etched by a selective epitaxial growth method, so that the problems of uncontrollable etching depth, damaged etching surface and the like are avoided; the grid leakage is effectively reduced, the low resistance of a channel region is kept, the current collapse is restrained, and the reliability and the stability of the device are improved.)

A method for fabricating a semiconductor structure, comprising:

preparing a channel layer, a barrier layer and a p-type semiconductor layer on a substrate in sequence;

preparing a dielectric layer in a grid region above the p-type semiconductor layer; and

preparing an n-type semiconductor layer in a region other than the gate region above the p-type semiconductor;

and activating the p-type impurity in the p-type semiconductor covered by the dielectric layer to form an active region.

The method of claim 1, further comprising: and removing the dielectric layer, and preparing a grid electrode above the active region of the p-type semiconductor layer.

The method of claim 2, wherein: and removing the dielectric layer by a wet etching method.

The method of claim 1, further comprising: and preparing a source electrode and a drain electrode in the source electrode region and the drain electrode region, wherein the source electrode and the drain electrode penetrate through the n-type semiconductor layer and the p-type semiconductor layer.

The method of claim 1, further comprising: the method of forming the active region includes annealing the epitaxial structure.

The method of claim 5, further comprising: the annealing includes performing in a hydrogen-free environment.

The method of claim 1, wherein: the above-mentionedThe dielectric layer comprises SiO2、Al 2O 3At least one of (1).

The method of claim 1, wherein: the p-type semiconductor layer and the n-type semiconductor layer are GaN-based semiconductors.

The method of claim 1, wherein: before forming the channel layer, a nucleation layer and a buffer layer are sequentially formed on the substrate.

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