阅读说明：本技术 电子装置 (Electronic device ) 是由 陈世敏 王澄光 于 2021-03-11 设计创作，主要内容包括：一种电子装置包括互相重叠的天线及显示面板。显示面板包括：第一基板；设置于第一基板上的第一扫描线、第一数据线、第一像素结构、第一栅极驱动电路、第二扫描线、第二数据线、第二像素结构、第二栅极驱动电路；第二基板、显示介质及遮光图案层。第一像素结构电性连接至第一扫描线及第一数据线,且第一栅极驱动电路电性连接至第一扫描线。第二像素结构电性连接至第二扫描线及第二数据线,且第二栅极驱动电路电性连接至第二扫描线。第二基板设置于第一基板的对向。显示介质设置于第一基板与第二基板之间。遮光图案层设置于第二基板上。第一扫描线与第二扫描线于结构上分离且具有多个间隙,而遮光图案层遮蔽间隙。(An electronic device includes an antenna and a display panel overlapped with each other. The display panel includes: a first substrate; the first scanning line, the first data line, the first pixel structure, the first gate drive circuit, the second scanning line, the second data line, the second pixel structure and the second gate drive circuit are arranged on the first substrate; the second substrate, a display medium and a shading pattern layer. The first pixel structure is electrically connected to the first scan line and the first data line, and the first gate driving circuit is electrically connected to the first scan line. The second pixel structure is electrically connected to the second scanning line and the second data line, and the second gate driving circuit is electrically connected to the second scanning line. The second substrate is arranged opposite to the first substrate. The display medium is arranged between the first substrate and the second substrate. The shading pattern layer is arranged on the second substrate. The first scanning line and the second scanning line are separated on the structure and provided with a plurality of gaps, and the light-shielding pattern layer shields the gaps.)

1. An electronic device, comprising:

an antenna; and

a display panel overlapping the antenna, wherein the display panel comprises:

a first substrate having a first region and a second region arranged in a first direction;

a plurality of first scan lines, a plurality of first data lines, and a plurality of first pixel structures disposed on the first region of the first substrate, wherein the first pixel structures are electrically connected to the first scan lines and the first data lines;

a first gate driving circuit disposed on the first substrate and electrically connected to the first scan lines;

a plurality of second scan lines, a plurality of second data lines, and a plurality of second pixel structures disposed on the second region of the first substrate, wherein the second pixel structures are electrically connected to the second scan lines and the second data lines;

a second gate driving circuit disposed on the first substrate and electrically connected to the second scan lines;

a second substrate disposed opposite to the first substrate;

a display medium disposed between the first substrate and the second substrate; and

a shading pattern layer arranged on the second substrate;

the first scanning lines and the second scanning lines are separated on the structure and provided with a plurality of gaps, and the shading pattern layer shields the gaps.

2. The electronic device of claim 1, wherein the light blocking pattern layer comprises:

a plurality of first light-shielding portions for shielding the first scanning lines and the second scanning lines; and

and a plurality of second light shielding parts for shielding the first data lines and the second data lines, wherein the first light shielding parts and the second light shielding parts have a plurality of intersections, and the gaps are overlapped at the intersections of the light shielding pattern layer.

3. The electronic device of claim 1, wherein each of the first pixel structures comprises a first pixel electrode having a plurality of first branches and a plurality of second branches, the first branches extending in a different direction than the second branches, the first branches connecting with the second branches and having a plurality of junctions; the plurality of vertical projections of the gaps on the first substrate and the plurality of vertical projections of the gaps on the first substrate are arranged in a second direction, and the first direction and the second direction are staggered.

4. The electronic device of claim 1, wherein each of the gaps is defined by an end point of the first scan line and an end point of the second scan line corresponding thereto, the end points of the first scan line and the second scan line having a distance in the first direction, the distance being a width of the gap; the gaps include a first gap and a second gap, and the width of the first gap is different from the width of the second gap.

5. The electronic device of claim 1, wherein a gap is defined by an end point of the first scan line and an end point of the second scan line, the end point of the first scan line and the end point of the second scan line have a distance D in the first direction, and D is greater than or equal to 6 μm and less than or equal to 30 μm.

6. The electronic device as claimed in claim 1, wherein a gap is defined by an end point of the first scan line and an end point of the second scan line, the end point of the first scan line and the end point of the second scan line have a distance D in the first direction, and D is greater than or equal to 6 μm and less than or equal to 90 μm.

7. The electronic device of claim 1, wherein the light blocking pattern layer comprises:

a plurality of first light-shielding portions for shielding the first scanning lines and the second scanning lines; and

and a plurality of second light shielding portions for shielding the first data lines and the second data lines, wherein a portion of the first light shielding portions in the first region shields at least a portion of the first gate driving circuit, and a portion of the first light shielding portions in the second region shields at least a portion of the second gate driving circuit.

8. The electronic device of claim 1, wherein the light blocking pattern layer comprises:

a plurality of first light-shielding portions for shielding the first scanning lines and the second scanning lines; and

and a plurality of second light-shielding portions for shielding the first data lines and the second data lines, wherein a portion of the second light-shielding portions in the first region shields at least a portion of the first gate driving circuit, and a portion of the second light-shielding portions in the second region shields at least a portion of the second gate driving circuit.

Technical Field

The present invention relates to an electronic device.

Background

Near Field Communication (NFC) allows two electronic devices equipped with antenna functions to communicate wirelessly at a distance of a few centimeters. Since the contactless data exchange mechanism has the advantages of high response speed, high security, convenience, etc., in recent years, many products, such as electronic ticket cards (e.g., a yo-yo card, etc.), electronic payment devices (e.g., a smart phone, a smart watch, etc.), etc., have been integrated with the near-field wireless communication function. The user only needs to approach an object with a near field wireless communication tag (NFC tag) to a card reader (NFC reader), and can complete identity verification and data exchange in a short time, so that a more convenient life style of the user is provided.

In order to reduce the volume and increase the added value of the product, the antenna and the display panel are assembled in the same electronic device. When the antenna and the display panel are assembled in the same electronic device, the antenna and the display panel are overlapped. When the antenna and the display panel are overlapped, the display panel may generate a shielding effect on the antenna, which may reduce the operating efficiency of the antenna.

Disclosure of Invention

The invention provides an electronic device with good performance.

The electronic device comprises an antenna and a display panel overlapped with the antenna. The display panel comprises a first substrate, a plurality of first scanning lines, a plurality of first data lines, a plurality of first pixel structures, a first grid drive circuit, a plurality of second scanning lines, a plurality of second data lines, a plurality of second pixel structures, a second grid drive circuit, a second substrate, a display medium and a shading pattern layer. The first substrate has a first region and a second region arranged in a first direction. The first pixel structures are disposed on the first region of the first substrate, wherein the first pixel structures are electrically connected to the first scan lines and the first data lines. The first gate driving circuit is disposed on the first substrate and electrically connected to the first scan line. The plurality of second scan lines, the plurality of second data lines and the plurality of second pixel structures are disposed on the second region of the first substrate, wherein the second pixel structures are electrically connected to the second scan lines and the second data lines. The second gate driving circuit is disposed on the first substrate and electrically connected to the second scan line. The second substrate is arranged opposite to the first substrate. The display medium is arranged between the first substrate and the second substrate. The shading pattern layer is arranged on the second substrate. The first scanning lines and the second scanning lines are separated on the structure and provided with a plurality of gaps, and the shading pattern layer shields the gaps.

In an embodiment of the invention, the light shielding pattern layer includes a plurality of first light shielding portions and a plurality of second light shielding portions. The first shading part shields the first scanning line and the second scanning line. The second shading part shields the first data line and the second data line. The first shading part and the second shading part have intersections, and the gaps are overlapped at the intersections of the shading pattern layers.

In an embodiment of the invention, each of the first pixel structures includes a first pixel electrode, the first pixel electrode has a plurality of first branches and a plurality of second branches, an extending direction of the first branches is different from an extending direction of the second branches, and the first branches are connected to the second branches and have a plurality of junctions. The plurality of vertical projections spaced on the first substrate and the plurality of vertical projections intersecting with each other on the first substrate are arranged in a second direction, and the first direction and the second direction are staggered.

In an embodiment of the invention, each of the gaps is defined by an end point of the corresponding first scan line and an end point of the corresponding second scan line, and the end points of the first scan line and the second scan line have a distance in the first direction, where the distance is a width of the gap; the plurality of gaps include a first gap and a second gap, and the width of the first gap is different from the width of the second gap.

In an embodiment of the invention, the gap is defined by the end point of the corresponding first scan line and the end point of the corresponding second scan line, the end points of the first scan line and the second scan line have a distance D in the first direction, and D is greater than or equal to 6 μm and less than or equal to 30 μm.

In an embodiment of the invention, the gap is defined by an end point of the corresponding first scan line and an end point of the corresponding second scan line, the end points of the first scan line and the second scan line have a distance D in the first direction, and D is greater than or equal to 6 μm and less than or equal to 90 μm.

In an embodiment of the invention, the light shielding pattern layer includes a plurality of first light shielding portions and a plurality of second light shielding portions. The first light shielding parts shield the first scanning lines and the second scanning lines. The plurality of second shading parts shade the plurality of first data lines and the plurality of second data lines. A part of the plurality of first light shielding parts located in the first region shields at least a part of the first gate driving circuit, and a part of the plurality of first light shielding parts located in the second region shields at least a part of the second gate driving circuit.

In an embodiment of the invention, the light shielding pattern layer includes a plurality of first light shielding portions and a plurality of second light shielding portions. The first light shielding parts shield the first scanning lines and the second scanning lines. The plurality of second shading parts shade the plurality of first data lines and the plurality of second data lines. A part of the plurality of second light shielding parts located in the first region shields at least a part of the first gate driving circuit, and a part of the plurality of second light shielding parts located in the second region shields at least a part of the second gate driving circuit.

Drawings

Fig. 1 is a perspective view of an electronic device 10 according to an embodiment of the invention.

Fig. 2 is a schematic top view of a display panel 100 according to an embodiment of the invention.

Fig. 3 is a schematic cross-sectional view of a display panel 100 according to an embodiment of the invention.

Fig. 4 is a schematic top view of a display panel 100A according to an embodiment of the invention.

Fig. 5 is a schematic top view of a display panel 100B according to an embodiment of the invention.

Fig. 6 is a schematic top view of a display panel 100C according to an embodiment of the invention.

Description of reference numerals:

10: electronic device

100. 100A, 100B, 100C: display panel

110: first substrate

111: first region

112: second region

120: second substrate

130: display medium

141: a first pixel electrode

141a, 142 a: first branch

141b, 142 b: second branch

141 c: junction area

142: second pixel electrode

150: light-shielding pattern layer

151: a first light shielding part

152: the second light shielding part

153: at the intersection

200: antenna with a shield

D. D1, D2, D3: distance between two adjacent plates

DL 1: first data line

DL 2: second data line

d1, d 2: direction of extension

E1, E2: endpoint

GP 1: first element group

GP 2: second element group

GDR 1: first gate drive circuit

GDR1a, GDR2 a: component

GDR 2: second gate drive circuit

g: gap

g 1: first gap

g 2: second gap

g 3: third gap

PX 1: first pixel structure

PX 2: second pixel structure

R: region(s)

SL 1: a first scanning line

SL 2: the second scanning line

T1: a first thin film transistor

T2: second thin film transistor

T1a, T2 a: first end

T1b, T2 b: second end

T1c, T2 c: control terminal

x: a first direction

y: second direction

I-I': cutting line

Detailed Description

Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.

It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to physical and/or electrical connections. Further, "electrically connected" or "coupled" may mean that there are additional elements between the elements.

As used herein, "about", "approximately", or "substantially" includes the stated value and the average value within an acceptable range of deviation of the specified value as determined by one of ordinary skill in the art, taking into account the measurement in question and the specified amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations of the stated value, or within ± 30%, ± 20%, ± 10%, ± 5%. Further, as used herein, "about", "approximately" or "substantially" may be selected based on optical properties, etch properties, or other properties, with a more acceptable range of deviation or standard deviation, and not all properties may be applied with one standard deviation.

Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Fig. 1 is a perspective view of an electronic device 10 according to an embodiment of the invention.

Referring to fig. 1, an electronic device 10 includes an antenna 200 and a display panel 100. The antenna 200 may be various antennas conforming to the RFID standard. For example, in the embodiment, the antenna 200 may be a Near-field communication (NFC) antenna, but the invention is not limited thereto.

The display panel 100 overlaps the antenna 200. For example, in the present embodiment, the antenna 200 may be selectively disposed under the display panel 100. However, the invention is not limited thereto, and in other embodiments, the antenna 200 may be disposed on the display panel 100.

Fig. 2 is a schematic top view of a display panel 100 according to an embodiment of the invention.

Fig. 3 is a schematic cross-sectional view of a display panel 100 according to an embodiment of the invention. Fig. 3 corresponds to the section line I-I' of fig. 2.

Referring to fig. 2 and 3, the display panel 100 includes a first substrate 110, a second substrate 120 and a display medium 130, wherein the second substrate 120 is disposed opposite to the first substrate 110, and the display medium 130 is disposed between the first substrate 110 and the second substrate 120.

In the present embodiment, the material of the first substrate 110 and/or the second substrate 120 may be glass, quartz, organic polymer, or other suitable materials; the material of the display medium 130 is, for example, liquid crystal; however, the present invention is not limited thereto.

The first substrate 110 has a first region 111 and a second region 112 arranged in the first direction x. The display panel 100 further includes a first element group GP1 and a second element group GP2 respectively disposed in the first region 111 and the second region 112 of the first substrate 110 and located between the display medium 130 and the first substrate 110.

The first device group GP1 includes a plurality of first scan lines SL1, a plurality of first data lines DL1 and a plurality of first pixel structures PX1 disposed on the first region 111 of the first substrate 110, the plurality of first pixel structures PX1 are electrically connected to the plurality of first scan lines SL1 and the plurality of first data lines DL1, the plurality of first data lines DL1 are arranged in a first direction x, the plurality of first scan lines SL1 are arranged in a second direction y, and the first direction x crosses the second direction y. For example, in the embodiment, the first direction x is substantially perpendicular to the second direction y, but the invention is not limited thereto.

In the present embodiment, each of the first pixel structures PX1 may include a first tft T1 and a first pixel electrode 141 electrically connected to the first tft T1, wherein the first tft T1 has a first end T1a, a second end T1b and a control end T1c, the first end T1a of the first tft T1 is electrically connected to a corresponding first data line DL1, the control end T1c of the first tft T1 is electrically connected to a corresponding first scan line SL1, and the second end T1b of the first tft T1 is electrically connected to the first pixel electrode 141.

FIG. 2 depicts an example of a first group of elements GP1 that may be driven in a tri-gate manner. However, the invention is not limited thereto, and in other embodiments, the first element group GP1 can be an element group that can be driven by other methods (e.g., 1G1D, 3G2D, etc.). In other words, the arrangement and electrical connection of the components of the first element group GP1 are not limited to those shown in fig. 2; depending on the driving method of the display panel 100, the components of the first element group GP1 may have other layouts (layout) and/or other electrical connections.

In the embodiment, the first pixel electrode 141 may have a plurality of first branches 141a and a plurality of second branches 141b, an extending direction d1 of the plurality of first branches 141a is different from an extending direction d2 of the plurality of second branches 141b, and the display media 130 (e.g., liquid crystal molecules) on the first pixel electrode 141 are respectively arranged along the extending direction d1 of the first branches 141a and the extending direction d2 of the second branches 141b to form a plurality of alignment regions. In short, in the present embodiment, the first pixel electrode 141 may be substantially composed of a plurality of laid-open chevron patterns spaced apart from each other. However, the present invention is not limited thereto, and in other embodiments, the first pixel electrode 141 may also be a conductive pattern with other shapes.

The second element group GP2 includes a plurality of second scan lines SL2, a plurality of second data lines DL2 and a plurality of second pixel structures PX2 disposed on the second region 112 of the first substrate 110, wherein the plurality of second pixel structures PX2 are electrically connected to the plurality of second scan lines SL2 and the plurality of second data lines DL2, the plurality of second data lines DL2 are arranged in the first direction x, and the plurality of second scan lines SL2 are arranged in the second direction y.

In the present embodiment, each of the second pixel structures PX2 may include a second tft T2 and a second pixel electrode 142 electrically connected to the second tft T2, wherein the second tft T2 has a first end T2a, a second end T2b and a control end T2c, the first end T2a of the second tft T2 is electrically connected to a corresponding second data line DL2, the control end T2c of the second tft T2 is electrically connected to a corresponding second scan line SL2, and the second end T2b of the second tft T2 is electrically connected to the second pixel electrode 142.

Fig. 2 shows an example of a second group GP2 of elements that can be driven in a tri-gate (tri-gate) manner. However, the invention is not limited thereto, and in other embodiments, the second element group GP2 may be an element group that can be driven by other methods (e.g., 1G1D, 3G2D, etc.). In other words, the arrangement and electrical connection of the components of the second group GP2 are not limited to those shown in fig. 2; according to the driving method of the display panel 100, the components of the second group GP2 may have other layouts (layout) and/or other electrical connections.

In the present embodiment, the second pixel electrode 142 may have a plurality of first branches 142a and a plurality of second branches 142b, the extending direction d1 of the plurality of first branches 142a is different from the extending direction d2 of the plurality of second branches 142b, and the display media 130 (e.g., liquid crystal molecules) on the second pixel electrode 142 are respectively arranged along the extending direction d1 of the first branches 142a and the extending direction d2 of the second branches 142b to form a plurality of alignment regions. In short, in the present embodiment, the second pixel electrode 142 may be substantially composed of a plurality of laid-open chevron patterns spaced apart from each other. However, the invention is not limited thereto, and in other embodiments, the second pixel electrode 142 may also be a conductive pattern with other shapes.

The display panel 100 further includes a light-shielding pattern layer 150 disposed on the second substrate 120 and between the second substrate 120 and the display medium 130. In the present embodiment, the light-shielding pattern layer 150 may include a plurality of first light-shielding portions 151 and a plurality of second light-shielding portions 152 crossing each other, wherein the plurality of first light-shielding portions 151 shield the plurality of first scan lines SL1 and the plurality of second scan lines SL2, and the plurality of second light-shielding portions 152 shield the plurality of first data lines DL1 and the plurality of second data lines DL 2. The light-shielding pattern layer 150 is commonly referred to as a Black matrix (Black matrix). In the present embodiment, the material of the light-shielding pattern layer 150 is, for example, black resin. However, the invention is not limited thereto, and in other embodiments, the material of the light-shielding pattern layer 150 may also be a metal with low reflectivity or other suitable materials.

Referring to fig. 2, the plurality of first scan lines SL1 of the first device group GP1 and the plurality of second scan lines SL2 of the second device group GP2 are structurally separated and have a plurality of gaps g. Referring to fig. 1 and 2, the magnetic field generated by the antenna 200 passes through a region R of the display panel 100, and a gap g between the first scan line SL1 of the first element group GP1 and the second scan line SL2 of the second element group GP2 falls within the region R. Therefore, the gap g between the first scan line SL1 of the first element group GP1 and the second scan line SL2 of the second element group GP2 allows the magnetic field generated by the antenna 200 to pass through, increasing the operating efficiency of the antenna 200.

Referring to fig. 2 and 3, the display panel 100 further includes a first gate driving circuit GDR1 and a second gate driving circuit GDR2 disposed on the first substrate 110. The plurality of first scan lines SL1 of the first device group GP1 and the plurality of second scan lines SL2 of the second device group GP2 may be electrically connected to the first gate driving circuit GDR1 and the second gate driving circuit GDR2, respectively, and are driven by the first gate driving circuit GDR1 and the second gate driving circuit GDR2 which are electrically independent of each other.

In the present embodiment, at least part of the components of the first gate driving circuit GDR1 and at least part of the components of the second gate driving circuit GDR2 can be fabricated together with the first thin film transistor T1 and the second thin film transistor T2. In other words, the first gate driving circuit GDR1 and the second gate driving circuit GDR2 may be integrated gate-on-array (gate-on-array), but the invention is not limited thereto.

In the embodiment, the first gate driving circuit GDR1 and the second gate driving circuit GDR2 may be selectively disposed on the first region 111 and the second region 112 of the first substrate 110, respectively. Specifically, in the present embodiment, the plurality of second light shielding portions 152 may shield the first thin film transistor T1 of the first element group GP1 and the second thin film transistor T2 of the second element group GP2, a portion of the second light shielding portion 152 located in the first region 111 may shield at least a portion of the first gate driving circuit GDR1, and a portion of the second light shielding portion 152 located in the second region 112 may shield at least a portion of the second gate driving circuit GDR 2.

That is, in the embodiment, at least part of the members GDR1a of the first gate driving circuit GDR1 and at least part of the members GDR2a of the second gate driving circuit GDR2 may be dispersed under the plurality of second light shielding portions 152 of the light shielding pattern layer 150, but the invention is not limited thereto.

It is noted that the light-shielding pattern layer 150 shields the gaps g between the first scan lines SL1 and the second scan lines SL 2. Therefore, even though the gaps g cannot block light, the light-shielding pattern layer 150 on the second substrate 120 can still effectively reduce the light leaking from the gaps g when viewed from a large viewing angle. Therefore, the display panel 100 not only can reduce the influence on the operating efficiency of the antenna 200 by the gap g between the first scanning line SL1 and the second scanning line SL2, but also can have good display quality.

Referring to fig. 2, in the present embodiment, the plurality of first light-shielding portions 151 and the plurality of second light-shielding portions 152 of the light-shielding pattern layer 150 have a plurality of intersections 153, and the plurality of gaps g of the plurality of first scan lines SL1 of the first element group GP1 and the plurality of second scan lines SL2 of the second element group GP2 may overlap the plurality of intersections 153 of the light-shielding pattern layer 150. However, the invention is not limited thereto, and in other embodiments, the plurality of gaps g between the plurality of first scan lines SL1 and the plurality of second scan lines SL2 may be disposed at other positions, which will be described in the following paragraphs with reference to other drawings.

The plurality of first scan lines SL1 of the first element group GP1 and the plurality of second scan lines SL2 of the second element group GP2 are structurally separated and have a plurality of gaps g. Each gap g is defined by an end point E1 of a corresponding first scan line SL1 and an end point E2 of a corresponding second scan line SL2, and the end point E1 of the first scan line SL1 and the end point E2 of the second scan line SL2 have a distance D in the first direction x, where the distance D is the width of the gap g. In the embodiment, the widths (i.e., the distances D) of the gaps g of the first scan lines SL1 and the second scan lines SL2 may be substantially the same, but the invention is not limited thereto.

The following table shows the observation results of the display quality of the display panel 100 at various widths (distances D) of the gap g. As shown in table one, in the embodiment, when the distance D is equal to 6 μm/18 μm/30 μm, the display quality of the display panel 100 is good, and bright lines corresponding to a plurality of gaps g are not easily observed; when the distance D is equal to 105 μm, the display quality of the display panel 100 is poor, and bright lines corresponding to a plurality of gaps g are easily observed. In summary, in the embodiment, the distance D preferably falls within a range of greater than or equal to 6 μm and less than or equal to 30 μm, but the invention is not limited thereto.

[ TABLE ] A

It should be noted that the following embodiments follow the reference numerals and parts of the contents of the foregoing embodiments, wherein the same reference numerals are used to indicate the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, which will not be repeated below.

Fig. 4 is a schematic top view of a display panel 100A according to an embodiment of the invention. The display panel 100A of fig. 4 may be used to replace the display panel 100 of fig. 1 to form another electronic device including the antenna 200. The display panel 100A of fig. 4 is similar to the display panel 100 of fig. 2, and the differences therebetween are explained as follows.

In the embodiment of fig. 2, widths (i.e., distances D) of the gaps g of the first scan lines SL1 and the second scan lines SL2 are substantially the same. However, in the embodiment of fig. 4, the gaps g of the first scan lines SL1 and the second scan lines SL2 include a first gap g1, a second gap g2 and a third gap g3, the widths of the first gap g1 (i.e., the distance D1 between the end point E1 of a first scan line SL1 and the end point E2 of a second scan line SL2 defining the first gap g 1), the widths of the second gap g2 (i.e., the distance D2 between the end point E1 of a first scan line SL1 and the end point E2 of a second scan line SL2 defining the second gap g 2), and the widths of the third gap g3 (i.e., the distance D3 between the end point E1 of a first scan line SL1 and the end point E2 of a second scan line SL2 defining the third gap g 3) may be different from each other. That is, in the embodiment of fig. 4, the widths (i.e., the distances D) of the gaps g of the first scan lines SL1 and the second scan lines SL2 may be different, and the display panel 100A may have a plurality of gaps g.

The following table two shows the observation results of the display quality of the display panel 100A under various ranges of the width (distance D) of the gap g. As shown in table two, in the present embodiment, when the distance D1, the distance D2, and the distance D3 fall within the range of 6 μm or more and 21 μm or less, the range of 21 μm or more and 25 μm or less, and the range of 79 μm or more and 90 μm or less, the display quality of the display panel 100A is good, and the bright lines corresponding to the plurality of gaps g are not easily observed. In summary, in the embodiment, the distance D1, the distance D2 and the distance D3 preferably fall within a range of greater than or equal to 6 μm and less than or equal to 90 μm, but the invention is not limited thereto.

[ TABLE II ]

Fig. 5 is a schematic top view of a display panel 100B according to an embodiment of the invention. The display panel 100B of fig. 5 may be used to replace the display panel 100 of fig. 1 to form another electronic device including the antenna 200. The display panel 100B of fig. 5 is similar to the display panel 100 of fig. 2, and the difference therebetween is: the position of the gap g in fig. 5 is different from the position of the gap g in fig. 2.

Referring to fig. 5, in the present embodiment, each of the first pixel structures PX1 includes a first pixel electrode 141, the first pixel electrode 141 has a plurality of first branches 141a and a plurality of second branches 141b, an extending direction d1 of the plurality of first branches 141a is different from an extending direction d2 of the plurality of second branches 141b, and the plurality of first branches 141a are connected to the plurality of second branches 141b and have a plurality of junctions 141 c. The display media 130 (e.g., liquid crystal molecules) on the first pixel electrode 141 are respectively arranged along the extending direction d1 of the first branch 141a and the extending direction d2 of the second branch 141b to form a plurality of alignment regions. The liquid crystal molecules on the first branch 141a and the second branch 141b of the first pixel electrode 141 are respectively arranged along different directions (i.e., the extending direction d1 and the extending direction d2), so as to form a discontinuous region at the junctions 141 c.

It is noted that the gaps g between the first scan lines SL1 and the second scan lines SL2 are arranged in the second direction y at the intersections 141c of the first pixel electrodes 141 and the vertical projections on the first substrate 110, wherein the first direction x is staggered with the second direction y.

That is, the plurality of gaps g are interposed by the plurality of intersections 141c of the plurality of first pixel electrodes 141. Since the liquid crystal efficiency of the display panel 100 at the junction 141c is poor, only a small amount of light can pass through the junction 141 c. Thus, the user can not easily perceive the light leaking from the gap g under a large viewing angle. Therefore, the display panel 100B not only can reduce the influence on the operating efficiency of the antenna 200 by the gap g between the first scanning line SL1 and the second scanning line SL2, but also can have good display quality.

Fig. 6 is a schematic top view of a display panel 100C according to an embodiment of the invention. The display panel 100C of fig. 6 may be used to replace the display panel 100 of fig. 1 to form another electronic device including the antenna 200. The display panel 100C of fig. 6 is similar to the display panel 100 of fig. 2, and the differences between the display panel 100C of fig. 6 and the display panel 100 of fig. 2 are described as follows.

Referring to fig. 6, in the present embodiment, the light-shielding pattern layer 150 also includes a plurality of first light-shielding portions 151 and a plurality of second light-shielding portions 152, wherein the first light-shielding portions 151 shield the first scan lines SL1 and the second scan lines SL2, and the second light-shielding portions 152 shield the first data lines DL1 and the second data lines DL 2.

Unlike the embodiment of fig. 2, in the present embodiment, at least a portion of the first gate driving circuit GDR1 may be shielded by a portion of the first light shielding portion 151 located in the first region 111, and at least a portion of the second gate driving circuit GDR2 may be shielded by a portion of the first light shielding portion 151 located in the second region 112.

The display panel 100C has similar technical effects and advantages to those of the display panel 100, and thus will not be repeated here.