阅读说明：本技术 半导体装置 (Semiconductor device with a plurality of semiconductor chips ) 是由 村上晴彦 江口佳佑 于 2020-10-23 设计创作，主要内容包括：本发明的目的在于提供抑制阻尼振荡的半导体装置。实施方式1的半导体装置(101)具有：IGBT(3)；SBD(2),其与IGBT(3)串联连接；PND(1),其与IGBT(3)串联连接,与SBD(2)并联连接；以及输出电极,其连接于IGBT(3)与SBD(2)以及PND(1)之间,PND(1)的阳极电极通过导线(8)经由SBD(2)的阳极电极而与输出电极连接。(The invention provides a semiconductor device for suppressing ringing. The semiconductor device (101) of embodiment 1 includes: an IGBT (3); an SBD (2) connected in series with the IGBT (3); a PND (1) connected in series with the IGBT (3) and connected in parallel with the SBD (2); and an output electrode connected between the IGBT (3) and the SBD (2) and the PND (1), wherein the anode electrode of the PND (1) is connected to the output electrode through a lead (8) via the anode electrode of the SBD (2).)

1. A semiconductor device, comprising:

a switching element;

at least 1 SBD connected in series with the switching element;

a PND connected in series with the switching element, connected in parallel with the at least 1 SBD; and

an output electrode connected between the switching element and the at least 1 SBD and the PND,

an anode electrode of the PND is connected with the output electrode through a lead via anode electrodes of the at least 1 SBD.

2. The semiconductor device according to claim 1,

the PND has an effective area that is smaller than an effective area of the at least 1 SBD.

3. The semiconductor device according to claim 1 or 2,

the at least 1 SBD is a plurality of SBDs connected in parallel to each other.

4. The semiconductor device according to any one of claims 1 to 3,

there is also an IGBT connected in parallel with the PND,

an anode electrode of the PND is connected with the output electrode through the wire via an emitter electrode of the IGBT and an anode electrode of the at least one SBD.

5. The semiconductor device according to claim 4,

the PND and the IGBT are composed of RC-IGBT,

the region directly above the IGBT region in the surface electrodes of the RC-IGBT and the anode electrode of the at least 1 SBD are connected by the wire.

Technical Field

The present invention relates to a semiconductor device.

Background

Currently, a power module is mounted with a Si-igbt (insulated Gate Bipolar transistor) and a Si-PiN diode (hereinafter, the PiN diode is referred to as a PND). The loss of the power module depends on the performance of power devices such as IGBTs or diodes. In recent years, a power module has been proposed in which a SiC-sbd (schottky Barrier diode) is substituted for a Si-PND for the purpose of reducing the loss of a diode. By using SiC-SBD, the on-off loss of the diode can be reduced, and particularly, under a use condition where the carrier frequency is high, a significant reduction in the on-off loss can be expected.

For example, a boost chopper circuit has an advantage that a reactor provided externally can be made small by raising a carrier frequency. On the other hand, if the carrier frequency rises, the on-off loss of the diode increases. Therefore, by using SiC-SBD, it can be expected to reduce the on-off loss. However, since the recovery current of the SBD is very small, di/dt increases, and ringing (ringing) occurs at the time of recovery.

In contrast, patent document 1 proposes a method of reducing noise by connecting a PND and an SBD in parallel. Patent document 1 describes that the forward currents of the SBD and the PND are stopped by the conduction of the IGBT after the currents flow in the SBD and the PND, and the carriers accumulated in the diodes flow in the reverse direction as a recovery current, which acts as a damper for suppressing noise caused by resonance of the circuit.

Patent document 1: japanese patent No. 4980126

Disclosure of Invention

However, the technique of patent document 1 has a problem that a ringing suppression effect cannot be sufficiently obtained due to the line inductance between the SBD and the PND and the terminal. The present invention has been made to solve the above-described problems, and an object thereof is to provide a semiconductor device in which ringing is suppressed.

The semiconductor device of the present invention includes: a switching element; at least 1 SBD connected in series with the switching element; a PND connected in series with the switching element, connected in parallel with at least 1 SBD; and an output electrode connected between the switching element and the at least 1 SBD and the PND, an anode electrode of the PND being connected to the output electrode through a lead via the anode electrode of the at least 1 SBD.

ADVANTAGEOUS EFFECTS OF INVENTION

With the semiconductor device of the present invention, the anode electrode of the PND is connected to the output electrode through the anode electrodes of at least 1 SBD by a wire, and therefore the inductance between the PND and the output electrode becomes larger than the inductance between the SBD and the output electrode. Thus, the time for decreasing the forward current of the PND becomes longer than the time for decreasing the forward current of the SBD, and ringing is suppressed.

Drawings

Fig. 1 is a circuit diagram of a semiconductor device according to embodiment 1.

Fig. 2 is a plan view of the semiconductor device according to embodiment 1.

Fig. 3 is a sectional view of a semiconductor device according to embodiment 1.

Fig. 4 is a diagram showing current waveforms of the SBD and the PND in the semiconductor device according to embodiment 1.

Fig. 5 is a circuit diagram of a semiconductor device according to embodiment 2.

Fig. 6 is a plan view of the semiconductor device according to embodiment 2.

Fig. 7 is a sectional view of a semiconductor device according to embodiment 2.

Fig. 8 is a circuit diagram of a semiconductor device according to embodiment 3.

Fig. 9 is a plan view of the semiconductor device according to embodiment 3.

Fig. 10 is a sectional view of a semiconductor device according to embodiment 3.

Fig. 11 is a circuit diagram of a semiconductor device according to embodiment 4.

Fig. 12 is a plan view of the semiconductor device according to embodiment 4.

Fig. 13 is a sectional view of a semiconductor device according to embodiment 4.

Fig. 14 is an enlarged cross-sectional view of a wire connection portion of an RC-IGBT in the semiconductor device of embodiment 4.

Description of the reference numerals

1 PND, 2, 21, 22 SBD, 3, 10 IGBT, 4, 5, 6, 7 lead frame, 8 wire, 11 RC-IGBT, 12 diode region, 13 IGBT region, 14 surface electrode, 101, 102, 103, 104 semiconductor device.

Detailed Description

< A. embodiment 1 >

Fig. 1 is a circuit diagram of a main part of a semiconductor device 101 according to embodiment 1. Fig. 2 is a plan view of a main part of the semiconductor device 101. Fig. 3 is a sectional view taken along line a-a' of fig. 2.

The semiconductor device 101 includes switching elements, i.e., an igbt (insulated Gate Bipolar transistor)3, an sbd (schottky Barrier diode)2, and a PND (hereinafter referred to as "PND") 1. The SBD2 and PND 1 are each connected in series with the IGBT3, and both are connected in parallel. An output electrode is provided between the IGBT3 and the SBD2 and PND 1. Here, the IGBT is shown as an example of the switching element, but a MOSFET may be used as the switching element instead of the IGBT.

An inductance L1 is provided between the anode of the SBD2 and the anode of the PND 1, and an inductance L2 is provided between the anode of the SBD2 and the output electrode. That is, the inductance between the anode and the output electrode of the PND 1 is L1+ L2, which is larger than the inductance L2 between the anode and the output electrode of the SBD 2.

As shown in fig. 2, the semiconductor device 101 includes lead frames 4, 5, 6, and 7. The lead frames 4, 5, and 7 correspond to an N terminal, a P terminal, and an output electrode of the semiconductor device 101, respectively. The PND 1 and SBD2 are mounted on the lead frame 5, and the IGBT3 is mounted on the lead frame 6.

As shown in fig. 2 and 3, the anode of the PND 1 and the anode of the SBD2 are connected by a wire 8, and the anode of the SBD2 and the lead frame 6 are connected by a wire 8. As shown in fig. 2, the lead frame 6 and the lead frame 7 corresponding to the output electrode are connected by a lead wire 8. In other words, the anode of the PND 1 is connected to the output electrode through the anode of the SBD2 by the wire 8. The inductance L1 is formed by the lead 8 connecting the anode of the PND 1 and the anode of the SBD2, and the inductance L2 is formed by the lead 8 connecting the anode of the SBD2 and the lead frame 6. As shown in fig. 2, the lead frame 4 and the emitter electrode of the IGBT3 are connected by a wire 8.

That is, the semiconductor device 101 of embodiment 1 includes: switching elements, i.e., IGBTs 3; SBD2 connected in series with IGBT 3; a PND 1 connected in series with the IGBT3 and connected in parallel with the SBD 2; and an output electrode connected between the IGBT3 and the SBD2 and the PND 1. The anode electrode of the PND 1 is connected to the output electrode via the anode electrode of the SBD2 via a lead 8. With such a configuration, the inductance between the anode and the output electrode of the PND 1 can be made larger than the inductance between the anode and the output electrode of the SBD 2. Thereby, the time for decreasing the forward current of the PND 1 becomes longer than the time for decreasing the forward current of the SBD 2.

FIG. 4 shows the SBD2 and PND with the horizontal axis as time1, current waveform. As shown in fig. 4, the SBD2 vibrates the current waveform after recovery. Forward current i of PND 1 through inductance_PNDIs reduced by time t_f(PND)Forward current i than SBD2_SBDIs reduced by time t_f(SBD)The vibration of the current waveform after the recovery of SBD2, that is, ringing is suppressed by this.

If the effective area of the PND 1 connected in parallel with the SBD2 is large, the recovery current increases, and the on-off loss reduction effect of the diode by the SBD2 cannot be sufficiently obtained. Therefore, the effective area of the PND 1 is preferably smaller than that of the SBD 2.

< B. embodiment 2 >

Fig. 5 is a circuit diagram of a main part of a semiconductor device 102 according to embodiment 2. Fig. 6 is a plan view of a main portion of the semiconductor device 102. Fig. 7 is a sectional view taken along line B-B' of fig. 6. The semiconductor device 102 is different from the semiconductor device 101 in that the SBD is configured by a plurality of chips. That is, if compared with the structure of the semiconductor device 101, the semiconductor device 102 has SBDs 21 and 22 instead of SBD 2. SBD 21 and SBD 22 are each connected in series with IGBT3, and both are connected in parallel. Output electrodes are provided between the IGBT3 and the PND 1, SBD 21, and SBD 22.

An inductance L1 is formed between the anode of the PND 1 and the anode of the SBD 21. An inductance L21 is formed between the anode of SBD 21 and the anode of SBD 22. An inductance L22 is formed between SBD 22 and the output electrode. Therefore, the inductance formed between the anode and the output electrode of the PND 1 becomes L1+ L21+ L22, which is larger than the inductance L21+ L22 formed between the anode and the output electrode of the SBD 21 and the inductance L22 formed between the anode and the output electrode of the SBD 22.

As shown in fig. 6, the SBD 21 and SBD 22 are mounted on the same lead frame 5 as the PND 1. The PND 1, SBD 21, and SBD 22 are sequentially mounted on the lead frame 5 in one direction.

As shown in fig. 7, the anode of the PND 1 and the anode of the SBD 21 are connected by a lead 8, and the anode of the SBD 21 and the anode of the SBD 22 are connected by a lead 8. In addition, the anode of the SBD 22 and the lead frame 6 are connected by a wire 8. The inductor L1 is formed by the lead 8 connecting the anode of the PND 1 and the anode of the SBD 21, the inductor L21 is formed by the lead 8 connecting the anode of the SBD 21 and the anode of the SBD 22, and the inductor L22 is formed by the lead 8 connecting the anode of the SBD 22 and the lead frame 6.

As described above, in the semiconductor device 102 according to embodiment 2, the plurality of SBDs 21 and 22 are connected in series to the IGBT3 serving as the switching element. The plurality of SBDs 21, 22 are connected in parallel with each other. The anode electrode of the PND 1 and the anode electrodes of the SBDs 21 and 22 are sequentially connected by a lead 8. In this way, even when the SBD is configured by a plurality of chips, the same effects as those of embodiment 1 can be obtained. Therefore, if embodiment 1 and embodiment 2 are summarized, at least 1 SBD may be connected in series to the IGBT3 as the switching element.

However, in the case where the SBD is configured by a plurality of chips as in embodiment 2, the total value of the effective areas of the SBD 21 and the SBD 22 is preferably made equal to the effective area of the SBD2 of embodiment 1. That is, compared to the semiconductor device 101 of embodiment 1, the semiconductor device 102 of embodiment 2 has a larger number of SBD chips than the semiconductor device 101 of embodiment 1, and thus improves heat dissipation of the chips and reduces loss during high-temperature operation of the SBD.

< C. embodiment 3 >

Fig. 8 is a circuit diagram of a main part of a semiconductor device 103 according to embodiment 3. Fig. 9 is a plan view of a main part of the semiconductor device 103. Fig. 10 is a sectional view taken along line C-C' of fig. 9. The semiconductor device 103 is a semiconductor device to which an IGBT10 connected in parallel to the PND 1 and the SBD2 is added to the structure of the semiconductor device 101. Hereinafter, a difference between the structure of the semiconductor device 103 and the semiconductor device 101 will be described.

An inductance L1 is formed between the anode of the PND 1 and the emitter of the IGBT10, an inductance L10 is formed between the emitter of the IGBT10 and the anode of the SBD2, and an inductance L2 is formed between the anode of the SBD2 and the output electrode.

As shown in fig. 9, the PND 1, the IGBT10, and the SBD2 are sequentially mounted on the lead frame 5 in one direction. As shown in fig. 10, the anode of the PND 1 and the emitter of the IGBT10 are connected by a wire 8, thereby forming an inductance L1. Further, the emitter of the IGBT10 and the anode of the SBD2 are connected by a wire 8, thereby forming an inductance L10. The other lead wirings are the same as those in embodiment 1.

In other words, the anode of the PND 1 is connected to the output electrode via the emitter electrode of the IGBT10 and the anode electrode of the SBD2 by the wire 8. According to the semiconductor device 103, since the IGBT10 is provided between the PND 1 and the SBD2, L10 is added to the inductance from the anode of the PND 1 to the output electrode. Accordingly, the inductance from the anode of the PND 1 to the output electrode is sufficiently larger than the inductance L2 from the anode of the SBD2 to the output electrode. As a result, the time for decreasing the forward current of the PND 1 is sufficiently longer than the time for decreasing the forward current of the SBD2, and ringing is sufficiently suppressed.

In the above description, the semiconductor device 103 of the present embodiment is described as a semiconductor device in which the IGBT10 is added to the structure of the semiconductor device 101 of embodiment 1. However, the same effect can be obtained by adding the IGBT10 to the structure of the semiconductor device 102 according to embodiment 2.

In fig. 3, 7, and 10, the lead wires 8 connecting the semiconductor chips are continuously spot-welded, but the lead wires 8 connecting the semiconductor chips may not be continuous.

The semiconductor device 103 is a semiconductor device in which the IGBT10 is added to the structure of the semiconductor device 101. The IGBT10 can be formed on the lead frame 5 by the same process as the process of forming the IGBT3 on the lead frame 6. Therefore, the semiconductor device 103 can be manufactured easily without adding a new manufacturing process as compared with the semiconductor device 101.

< D. embodiment 4 >

Fig. 11 is a circuit diagram of a main part of a semiconductor device 104 according to embodiment 4. Fig. 12 is a plan view of a main portion of the semiconductor device 104. Fig. 13 is a sectional view taken along line D-D' of fig. 12. Fig. 14 is an enlarged cross-sectional view of a conductor contact portion of an RC-IGBT (Reverse-converting IGBT) 11.

The semiconductor device 104 is a semiconductor device in which the PND 1 and the IGBT10 are formed of the RC-IGBT 11 in the semiconductor device 103 of embodiment 3. That is, the RC-IGBT 11 and the SBD2 are mounted on the lead frame 5. As shown in fig. 12 and 13, the RC-IGBT 11 and the anode of the SBD2 are connected by a wire 8, and the anode of the SBD2 and the lead frame 6 are connected by a wire 8.

As shown in fig. 14, the RC-IGBT 11 has a super junction structure including a diode region 12 of a semiconductor layer that operates as a diode, an IGBT region 13 of a semiconductor layer that operates as an IGBT, and a surface electrode 14 on the semiconductor layer. The wire 8 connecting the RC-IGBT 11 and the anode of the SBD2 is connected to a region directly above the IGBT region 13 in the surface electrode 14 at the RC-IGBT 11. In other words, the wire 8 connecting the RC-IGBT 11 and the anode of the SBD2 is connected to the IGBT region 13 via the surface electrode 14 at the RC-IGBT 11.

The inductance L10 is formed by the wire 8 connecting the RC-IGBT 11 with the anode of the SBD 2. In addition, inductance L1 is formed by surface electrode 14 spanning diode region 12 and IGBT region 13.

With the above-described configuration of the semiconductor device 104, the semiconductor device 104 can be made smaller than the semiconductor device 103 of embodiment 3 in which the PND 1 and the IGBT10 are provided separately.

The present invention can be freely combined with or appropriately modified or omitted from the respective embodiments within the scope of the present invention.