阅读说明：本技术 钳位开关驱动电路 (Clamp switch driving circuit ) 是由 周瑶 徐�明 孙巨禄 王宁 顾明理 于 2021-01-04 设计创作，主要内容包括：本发明公开了一种钳位开关驱动电路,应用于有源箝位反激拓扑,所述钳位开关驱动电路驱动所述有源箝位反激拓扑中的钳位开关,所包括信号翻转模块和驱动模块,所述信号翻转模块接受所述主控开关的控制信号,将所述控制信号翻转后输出给驱动模块,所述驱动模块输出适合驱动所述钳位开关的驱动信号。钳位开关驱动电路简单易设计,且成本较低。(The invention discloses a clamp switch driving circuit which is applied to an active clamp flyback topology, wherein the clamp switch driving circuit drives a clamp switch in the active clamp flyback topology, the clamp switch driving circuit comprises a signal turning module and a driving module, the signal turning module receives a control signal of a main control switch, the control signal is turned and then output to the driving module, and the driving module outputs a driving signal suitable for driving the clamp switch. The clamp switch driving circuit is simple and easy to design and low in cost.)

1. The clamp switch driving circuit is characterized in that a clamp switch clamps a main control switch, the clamp switch driving circuit drives the clamp switch, the clamp switch driving circuit comprises a signal turning module and a driving module, the signal turning module receives a control signal of the main control switch, the control signal is turned and then output to the driving module, and the driving module outputs a driving signal suitable for driving the clamp switch.

2. The clamp switch driving circuit of claim 1, wherein the signal flipping module comprises a first resistor and a first transistor, the first transistor is PNP type, a base of the first transistor receives the PWM signal of the control chip, an emitter of the first transistor is connected to a positive electrode of the auxiliary power supply, the first resistor is connected in parallel between the emitter and the base of the first transistor, and a collector of the first transistor is connected to the driving module.

3. The clamp switch driver circuit of claim 2, wherein the driver module comprises a second transistor of PNP type, a third resistor, and a first diode connected in parallel between a base and an emitter of the second transistor, an anode of the first diode being connected to the base of the second transistor, a cathode of the first diode being connected to the emitter of the second transistor, and a third resistor connected in parallel between the base and the collector of the second transistor.

4. The clamp switch drive circuit of claim 3, wherein a base of the second transistor is connected to a collector of the first transistor through a second resistor. And the emitter of the second triode is connected with the gate of the clamping switch.

5. The clamp switch driver circuit of claim 4, wherein the driver module further comprises a third transistor, a fourth resistor, and a second diode, the third transistor being of the PNP type, the second diode being connected in parallel between a base and an emitter of the third transistor, an anode of the second diode being connected to the base of the third transistor, a cathode of the second diode being connected to the emitter of the third transistor, and the fourth resistor being connected in parallel between the base and the collector of the third transistor.

6. The clamp switch driver circuit of claim 5, wherein said second transistor and said second transistor have their collectors connected in parallel, and wherein said first diode and said second diode are connected in series in a common direction and then to said clamp switch gate.

7. The clamp switch driving circuit as claimed in claim 1, wherein the signal flipping module comprises a totem-pole unit and an auxiliary clamp switch, the auxiliary clamp switch is connected in series with the clamp switch, the totem-pole unit is connected in parallel with an auxiliary power supply, an input terminal of the totem-pole unit receives the control signal, a first output terminal of the totem-pole unit is connected in series with a fourth resistor to charge a first capacitor, a second output terminal of the totem-pole unit is connected in series with a fifth resistor to charge a first capacitor, another terminal of the first capacitor is connected to a base of the auxiliary clamp switch through a sixth resistor, another terminal of the first capacitor is simultaneously connected to an anode of a third diode, and a cathode of the third diode is connected to a cathode of the auxiliary power supply.

8. The clamp switch driver circuit of claim 7, wherein the driver module comprises a second capacitor connected in parallel between the gate of the clamp switch and the negative terminal of the auxiliary power supply, a first zener diode and a second zener diode connected in series in an anti-parallel manner between the gate and the source of the clamp switch.

9. The clamp switch driving circuit of claim 8, wherein a third zener diode is connected in parallel between the drain and the source of the clamp switch.

10. An active clamped flyback circuit comprising the clamp switch driver circuit as claimed in claims 1-9, wherein the clamp switch driver circuit drives a clamp switch in the active clamped flyback circuit, and wherein the clamp switch is configured to clamp a main switch in the active clamped flyback circuit.

Technical Field

The invention relates to the technical field of driving circuits, in particular to a driving circuit of a clamp switch in an active clamp flyback topology.

Background

Under the condition that the output power of the flyback topology is large, the loss caused by the leakage inductance of a transformer in the flyback topology is increased; reverse spike voltage on a main switch in the flyback topology becomes large, and turn-on and turn-off losses become large. An Active Clamp Flyback topology (Active Clamp Flyback) can realize the conversion of the leakage inductance energy of the transformer and the soft turn-off and zero-voltage turn-on of the main switch.

As shown in fig. 1, in a low-end active clamping flyback topology, a clamping capacitor Cc absorbs energy in a leakage inductance of a transformer and feeds the energy back to a power grid side, so that reverse peak voltage caused by the leakage inductance is reduced, and voltage stress borne by a main switch is minimum. The clamp switch Qc in the low-end active clamp flyback topology uses a P-type tube, and the common ground driving is simple. But has the following disadvantages: the P-type tube has low withstand voltage and is not suitable for occasions with slightly high voltage, V_DSAnd no part is available when the voltage is more than about 200V, and a driving circuit of the clamping switch Qc is complex and high in cost.

Disclosure of Invention

The invention provides a clamp switch driving circuit which is applied to an active clamp flyback topology.

The technical scheme adopted by the invention is as follows:

the clamping switch driving circuit is applied to a clamping switch, clamps a main switch, is used for driving the clamping switch, and comprises a signal overturning module and a driving module, wherein the signal overturning module receives a control signal for driving the main switch, overturns the PWM signal and outputs the PWM signal to the driving module, and the driving module outputs a driving signal suitable for driving the clamping switch.

The signal overturning module comprises a first resistor and a first triode, the first triode is of a PNP type, the base of the first triode receives the PWM signal of the control chip, the emitting electrode of the first triode is connected with the positive electrode of the auxiliary power supply, the first resistor is connected between the emitting electrode of the first triode and the base in parallel, and the collecting electrode of the first triode is connected with the driving module.

The drive module comprises a second triode, a third resistor and a first diode, wherein the second triode is of a PNP type, the first diode is connected in parallel between the base electrode and the emitting electrode of the second triode, the anode of the first diode is connected with the base electrode of the second triode, the cathode of the first diode is connected with the emitting electrode of the second triode, and the third resistor is connected in parallel between the base electrode and the collecting electrode of the second triode.

And the base electrode of the second triode is connected with the collector electrode of the first triode through a second resistor. And the emitter of the second triode is connected with the gate of the clamping switch.

The driving module further comprises a third triode, a fourth resistor and a second diode, the third triode is of a PNP type, the second diode is connected in parallel between the base electrode and the emitting electrode of the third triode, the anode of the second diode is connected with the base electrode of the third triode, the cathode of the second diode is connected with the emitting electrode of the third triode, and the fourth resistor is connected in parallel between the base electrode and the collecting electrode of the third triode.

And the collectors of the second triode and the second triode are connected in parallel, and the first diode and the second diode are connected in series in the same direction and then are connected with the gate of the clamping switch.

The invention further provides another embodiment, the signal turning module includes a totem-pole unit and an auxiliary clamping switch, the auxiliary clamping switch is connected in series with the clamping switch, the totem-pole unit is connected in parallel with an auxiliary power supply, an input end of the totem-pole unit receives a PWM signal output by the control chip, a first output end of the totem-pole unit is connected in series with a fourth resistor and charges a first capacitor, a second output end of the totem-pole unit is connected in series with a fifth resistor and charges the first capacitor, the other end of the first capacitor is connected with a base of the auxiliary clamping switch through a sixth resistor, the other end of the first capacitor is simultaneously connected with an anode of a third diode, and a cathode of the third diode is connected with a cathode of the auxiliary power supply.

The driving module comprises a second capacitor, a first voltage stabilizing diode and a second voltage stabilizing diode, wherein the second capacitor is connected between the gate pole of the clamping switch and the negative pole of the auxiliary power supply in parallel, and the first voltage stabilizing diode and the second voltage stabilizing diode are connected between the gate pole and the source pole of the clamping switch in parallel after being connected in series in an inverted mode.

And a third voltage stabilizing diode is connected between the drain electrode and the source electrode of the clamping switch in parallel.

The clamp switch is an NPN type tube.

In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is a block diagram of a low-side active clamped flyback topology.

FIG. 2 is a diagram of a clamp switch driving circuit according to a first embodiment of the present invention.

FIG. 3 is a diagram of a clamp switch driving circuit according to a second embodiment of the present invention.

FIG. 4 is a waveform diagram of simulation of the embodiment shown in FIG. 3 when applied to the embodiment shown in FIG. 1.

Detailed Description

In order to make the purpose and technical solution of the embodiments of the present invention clearer, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.

The terms "first," "second," "third," and the like (if any) in this description are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the subject matter described herein are, for example, capable of operation in other sequences than those illustrated or otherwise described herein. Further, wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

The specific embodiment shown in fig. 2 is a scheme in which the clamp switch Qc is of NMOS type and is placed at the low side. The main switch Qm adopts an NMOS type pipe, and the clamp switch Qc adopts an NMOS type pipe. The module composed of the resistor R1 and the switch Q1 is used for generating a PWM signal with a complementary phase with the main switch Qm, and the switch Q1 is a high-voltage PNP tube. The resistor R2, the switch D1 and the switch D2 constitute a driving circuit of the clamping switch Qc. The circuit formed by the resistors R3 and R4 and the switches Q2 and Q3 simulates a Darlington transistor and is used for accelerating the turn-off of the clamping switch Qc.

The control chip 21 may adopt a frequency conversion controlled chip, such as a QR control chip, and when the MOSFET is turned on, the drain-source voltage of the MOSFET is at a valley and within a certain voltage range, even ZVS in a true sense; it is also possible to use a common constant frequency controlled pulse width modulation chip to achieve ZVS under the especially intended load conditions only by the main circuit design. The control chip 21 generates a control signal, for example, a PWM signal, which controls the normal operation of the main switch Qm.

When the PWM signal output from the control chip 21 is at a high level, the main switch Qm is turned on, and at this time, the base of the switch Q1 is at a high level, and the switch Q1 is turned off. The clamp switch Qc turns off itself through Q2, Q3 due to the absence of a drive signal, where switches Q2 and Q3 are connected in parallel for expediting the turn off of the clamp switch Qc.

When the PWM signal output from the control chip 21 is at low level, the main switch Qm is turned off, and at this time, the switch Q1 is turned on because the base voltage of the switch Q1 is at low level. The driving signal controls the clamp switch Qc to be turned on through the resistor R2 and the switch D1/D2, the body diode of the clamp switch Qc is turned on first, and the voltage VCC charges Cgs of the clamp switch Qc through the body diode of the clamp switch Qc, thereby turning on the clamp switch Qc.

The drive circuit of the clamping switch Qc is composed of a resistor, a diode, a PNP tube and the like, and is simple and low in cost. In addition, the clamp switch Qc uses NMOS, so that the selection is more and the cost is low.

Fig. 3 shows an embodiment of the clamp switch using a PNP transistor and PMOS transistor in series. The main switch Qm adopts NMOS, the clamping switch Qc is formed by serially connecting a switch Qc1 and a switch Qc2, a high-voltage PNP triode is adopted as Qc2, and a low-voltage PMOS is adopted as Qc 1. The switches Q4, Q5 and the resistors R4 and R5 form a totem-pole driving circuit, so that the driving capability is enhanced. The capacitor C1 and the switch D3 are used to generate the negative voltage required for the switch Qc1 to conduct. The zener diodes ZD1, ZD2 are used to clamp the voltage between GS of the switch Qc 1. The zener diode ZD3 is used to ensure the respective withstand voltages of the switch Qc1 and the switch Qc 2.

Referring to fig. 4, the control chip 31 outputs the PWM signal, when the PWM signal is at a high level, the main switch Qm is turned on, and the switch Q4 is turned on, so as to charge the capacitor C1, the base voltage of the switch Qc2 is higher than the collector voltage, the switch Qc2 is turned off, the capacitor C2 is discharged through ZD1, ZD2, ZD3, Cc, and because ZD2 exists, Vgs of the switch Qc1 is clamped at the voltage of the zener diode ZD2 and is a positive voltage, and the switch Qc1 is turned off.

When the PWM signal is low, the main switch Qm is turned off, the Q5 is turned on due to the base being low, the capacitor C1 discharges, the base voltage of the switch Qc2 is less than the collector voltage, and the switch Qc2 is turned on. Meanwhile, as the main switch Qm is turned off, the leakage inductance current charges the capacitor Cc through the body diode of the switch Qc1 and the D4, and charges the C2 through ZD1 and ZD2, and as ZD1 exists, Vgs of the switch Qc1 is clamped at the voltage of the voltage regulator tube ZD1 and is negative, so that the switch Qc1 is turned on. When the current resonance is still positive, the leakage-sense current flows through diode D4, and when the current resonance goes negative, the leakage-sense current flows through switch Qc 2.

The R4, R5 and C1 parameters are reasonably equipped to turn off the clamp switch Qc1 before the main switch Qm turns on.

Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.