阅读说明：本技术 一种编程电压监测电路 (Programming voltage monitoring circuit ) 是由 杜海军 孙轶君 于 2020-12-18 设计创作，主要内容包括：本发明涉及一种编程电压监测电路,主要是针对FPGA电路尤其是反熔丝FPGA电路,在高压编程或常压工作状态下,监测编程电源VSV的状态,实现高压时输出0,工作电压时输出1的监测结果。本发明的电路结构,可以根据设计和工艺条件,与编程电压进行匹配。能够准确识别编程电压的变化状态,在指定变化区间,转化出监测信号。可以把监测信号,转化成稳定的数字信号,提供给内部电路,配合编程过程或工作过程。(The invention relates to a programming voltage monitoring circuit, which mainly aims at an FPGA circuit, in particular to an anti-fuse FPGA circuit, and monitors the state of a programming power supply VSV under the high-voltage programming or normal-voltage working state, so that 0 is output at high voltage, and a monitoring result of 1 is output at working voltage. The circuit structure of the invention can be matched with a programming voltage according to design and process conditions. The change state of the programming voltage can be accurately identified, and a monitoring signal is converted in a specified change interval. The monitoring signal can be converted into a stable digital signal and provided for an internal circuit to cooperate with a programming process or a working process.)

1. A programming voltage acquisition circuit, comprising: the programming voltage acquisition unit, the control signal conversion unit, the programming voltage state identification unit, the digital signal conversion unit and the output drive unit are sequentially connected, the programming power supply VSV is connected with the programming voltage acquisition unit and the programming voltage state identification unit, and the internal logic working power supply VCCA is connected with the programming voltage acquisition unit, the control signal conversion unit, the programming voltage state identification unit, the digital signal conversion unit and the output drive unit.

2. The programming voltage acquisition circuit of claim 1, wherein the programming voltage acquisition unit comprises a PMOS transistor P1 and NMOS transistors N1, N2, N3;

the grid electrode of the P1 is connected with a power supply VCCA, the source electrode of the P1 is connected with a programming power supply VSV, and the drain electrode of the P1 is connected with the source electrode of the N1; the gates of N1, N2 and N3 are all connected with a programming power supply VSV, and the drain of N1 is used as the output Y1 of the programming voltage acquisition unit and is connected with the source of N2; the drain of N2 is connected to the source of N3, and the drain of N3 is grounded.

3. The programming voltage acquisition circuit as claimed in claim 1, wherein the programming voltage state identification unit comprises a PMOS transistor P2 and an NMOS transistor N4;

the grid of the P2 and the grid of the N4 are connected with the output Y1 of the programming voltage acquisition unit, the source of the P2 is connected with a power supply VCCA, the drain of the P2 is connected with the source of the N4, and the source of the N4 is used as the output Y2 of the programming voltage state identification unit and is connected with the source of the N4; the drain of N4 is grounded.

4. The programming voltage acquisition circuit as claimed in claim 1, wherein the programming voltage state identification unit comprises a PMOS transistor P3 and NMOS transistors N5, N6, N7, N8;

the grid electrode of the P3 is connected with a power supply VCCA, the source electrode of the P3 is connected with a programming power supply VSV, and the drain electrode of the P3 is connected with the grid electrode and the source electrode of the N5; the drain electrode of the N5 is connected with the gate electrode and the source electrode of the N6; the drain of N6 is connected to the gate and source of N7, the drain of N7 is connected to the source of N8 as the output Y3 of the programming voltage state identification unit, the gate of N8 is connected to the output Y2 of the programming voltage state identification unit, and the drain of N8 is grounded.

5. The programming voltage acquisition circuit of claim 1, comprising:

the programming voltage acquisition circuit is used for acquiring and distinguishing the numerical value of the programming voltage by taking the programming voltage as an input signal and generating a corresponding output voltage signal;

the control signal conversion circuit is used for receiving the voltage signal change condition of the programming voltage acquisition circuit and generating a corresponding control signal;

the programming voltage state identification circuit is used for judging and identifying the state of the programming voltage according to the control signal of the control signal conversion circuit and providing an identification signal aiming at the programming voltage;

a digital signal conversion unit for converting the identification signal into a digital signal;

and the output driving unit is used for driving the FPGA internal control circuit according to the digital signal.

6. A programming voltage acquisition method is characterized in that programming voltage is used as an input signal, the numerical value of the programming voltage is acquired and distinguished, and a corresponding output voltage signal is generated, and the method comprises the following steps:

the voltage value of the programming power supply VSV is changed between a programming high voltage and a working voltage; the internal logic working power supply is constant voltage;

when the VSV rises to high voltage, the output signal of the monitoring circuit is 0; when the VSV is reduced to the working voltage from the high voltage, the output signal of the monitoring circuit is 1.

7. The program voltage acquisition method according to claim 5,

when the programming state is started, the programming power supply VSV rises from V1. When rising to V2, the monitoring circuit recognizes the state of the VSV, and the output signal changes to a low level; when the VSV rises to a high voltage, the monitoring circuit outputs a signal stable output 0.

8. The program voltage acquisition method according to claim 6,

when the programming is finished, the programming power supply VSV drops from the high voltage. When the voltage drops to V3, the monitoring circuit identifies the state of the VSV, and the output signal changes to a high level; when VSV drops to the working voltage, the monitoring circuit output signal stabilizes output 1.

9. A programming voltage acquisition method is characterized by comprising the following steps:

the programming voltage acquisition circuit takes the programming voltage as an input signal, acquires and judges the numerical value of the programming voltage and generates a corresponding output voltage signal;

the control signal conversion circuit receives the voltage signal change condition of the programming voltage acquisition circuit and generates a corresponding control signal;

the programming voltage state identification circuit judges and identifies the state of the programming voltage according to the control signal of the control signal conversion circuit and provides an identification signal aiming at the programming voltage;

the digital signal conversion unit converts the identification signal into a digital signal;

and the output driving unit drives the FPGA internal control circuit according to the digital signal.

Technical Field

The invention relates to the field of design and application of an FPGA, in particular to an antifuse FPGA, and particularly relates to circuit programming of the antifuse FPGA.

Background

Because the FPGA circuit, especially the antifuse FPGA circuit, is in a programming state or a common working state, a programming power supply end is loaded with high voltage, and the difference is the voltage value. How the internal logic circuit identifies which state the circuit is in is an important basis for ensuring stable operation of the circuit. In the existing circuit structure, the programming voltage can not be accurately identified and monitored according to design and process conditions.

Disclosure of Invention

The invention provides a programming voltage monitoring circuit which can accurately judge the state of a circuit and ensure that the circuit is stable and reliable in programming and working states. The invention is mainly based on the change of the programming power supply, accurately judges the circuit state, converts the circuit state into a digital signal and outputs the digital signal to an internal logic circuit.

The technical scheme adopted by the invention for realizing the purpose is as follows: a programming voltage acquisition circuit comprising: the programming voltage acquisition unit, the control signal conversion unit, the programming voltage state identification unit, the digital signal conversion unit and the output drive unit are sequentially connected, the programming power supply VSV is connected with the programming voltage acquisition unit and the programming voltage state identification unit, and the internal logic working power supply VCCA is connected with the programming voltage acquisition unit, the control signal conversion unit, the programming voltage state identification unit, the digital signal conversion unit and the output drive unit.

The programming voltage acquisition unit comprises a PMOS tube P1 and NMOS tubes N1, N2 and N3;

the grid electrode of the P1 is connected with a power supply VCCA, the source electrode of the P1 is connected with a programming power supply VSV, and the drain electrode of the P1 is connected with the source electrode of the N1; the gates of N1, N2 and N3 are all connected with a programming power supply VSV, and the drain of N1 is used as the output Y1 of the programming voltage acquisition unit and is connected with the source of N2; the drain of N2 is connected to the source of N3, and the drain of N3 is grounded

The programming voltage state identification unit comprises a PMOS tube P2 and an NMOS tube N4;

the grid of the P2 and the grid of the N4 are connected with the output Y1 of the programming voltage acquisition unit, the source of the P2 is connected with a power supply VCCA, the drain of the P2 is connected with the source of the N4, and the source of the N4 is used as the output Y2 of the programming voltage state identification unit and is connected with the source of the N4; the drain of N4 is grounded.

The programming voltage state identification unit comprises a PMOS tube P3 and NMOS tubes N5, N6, N7 and N8;

the grid electrode of the P3 is connected with a power supply VCCA, the source electrode of the P3 is connected with a programming power supply VSV, and the drain electrode of the P3 is connected with the grid electrode and the source electrode of the N5; the drain electrode of the N5 is connected with the gate electrode and the source electrode of the N6; the drain of N6 is connected to the gate and source of N7, the drain of N7 is connected to the source of N8 as the output Y3 of the programming voltage state identification unit, the gate of N8 is connected to the output Y2 of the programming voltage state identification unit, and the drain of N8 is grounded.

A programming voltage acquisition circuit comprising:

the programming voltage acquisition circuit is used for acquiring and distinguishing the numerical value of the programming voltage by taking the programming voltage as an input signal and generating a corresponding output voltage signal;

the control signal conversion circuit is used for receiving the voltage signal change condition of the programming voltage acquisition circuit and generating a corresponding control signal;

the programming voltage state identification circuit is used for judging and identifying the state of the programming voltage according to the control signal of the control signal conversion circuit and providing an identification signal aiming at the programming voltage;

a digital signal conversion unit for converting the identification signal into a digital signal;

and the output driving unit is used for driving the FPGA internal control circuit according to the digital signal.

A programming voltage acquisition method, regard programming voltage as the input signal, gather and differentiate the numerical value of the programming voltage, and produce the corresponding output voltage signal, comprising:

the voltage value of the programming power supply VSV is changed between a programming high voltage and a working voltage; the internal logic working power supply is constant voltage;

when the VSV rises to high voltage, the output signal of the monitoring circuit is 0; when the VSV is reduced to the working voltage from the high voltage, the output signal of the monitoring circuit is 1.

When the programming state is started, the programming power supply VSV rises from V1. When rising to V2, the monitoring circuit recognizes the state of the VSV, and the output signal changes to a low level; when the VSV rises to a high voltage, the monitoring circuit outputs a signal stable output 0.

When the programming is finished, the programming power supply VSV drops from the high voltage. When the voltage drops to V3, the monitoring circuit identifies the state of the VSV, and the output signal changes to a high level; when VSV drops to the working voltage, the monitoring circuit output signal stabilizes output 1.

A programming voltage acquisition method comprises the following steps:

the programming voltage acquisition circuit takes the programming voltage as an input signal, acquires and judges the numerical value of the programming voltage and generates a corresponding output voltage signal;

the control signal conversion circuit receives the voltage signal change condition of the programming voltage acquisition circuit and generates a corresponding control signal;

the programming voltage state identification circuit judges and identifies the state of the programming voltage according to the control signal of the control signal conversion circuit and provides an identification signal aiming at the programming voltage;

the digital signal conversion unit converts the identification signal into a digital signal;

and the output driving unit drives the FPGA internal control circuit according to the digital signal.

The invention has the following beneficial effects and advantages:

1. the circuit structure of the invention can be matched with a programming voltage according to design and process conditions.

2. The circuit structure of the invention can accurately identify the change state of the programming voltage and convert the monitoring signal in the appointed change interval.

3. The circuit structure of the invention can convert the monitoring signal into a stable digital signal, provide the stable digital signal for an internal circuit and cooperate with a programming process or a working process.

Drawings

FIG. 1 is a block diagram of a programming voltage monitoring circuit;

FIG. 2 is a timing diagram for monitoring the program voltage ramp-up process;

FIG. 3 is a timing diagram for monitoring a program voltage drop process;

FIG. 4 is a schematic diagram of a program voltage monitor circuit state;

FIG. 5 is a detailed block diagram of a program voltage acquisition section;

FIG. 6 is a detailed block diagram of a control signal converting part;

FIG. 7 is a detailed block diagram of a program voltage state identification portion.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples.

And the programming voltage acquisition circuit is used for acquiring and distinguishing the numerical value of the programming voltage by taking the programming voltage as an input signal and generating a corresponding output voltage signal.

And the control signal conversion circuit is used for receiving the voltage signal change condition of the acquisition circuit and generating a corresponding control signal for identifying the programming voltage.

And the state identification circuit simultaneously receives the control signal and the programming voltage in the change and gives an identification signal aiming at the programming voltage in a specific voltage interval.

And the digital signal conversion and driving circuit converts the identification signal into a stable digital signal, namely 0 or 1, and then outputs the stable digital signal to an internal control circuit of the FPGA through the driving circuit.

The method comprises the following steps:

1. and after the FPGA is programmed and electrified, monitoring the voltage state of a programming power supply end.

2. And converting the monitored voltage state into a digital signal.

3. The digital signal is sent to the internal logic circuit for controlling the internal circuit to cooperate with the programming process or the working process.

As shown in fig. 1, the programming voltage monitoring circuit includes five parts, namely, programming voltage acquisition, control signal conversion, programming voltage state identification, digital signal conversion, output driving, and the like. VSV is a programming power supply, and VCCA is an internal logic working power supply.

After the circuit is powered on, the voltage value of the programming power supply VSV is changed between a programming high voltage (11.8V) and a working voltage (2.5V) according to a programming process. The internal logic working power supply is constant 2.5V. When the VSV rises to a high voltage (11.8V), the output signal of the monitoring circuit is 0; when VSV drops from 11.8V to the working voltage (2.5V), the output signal of the monitoring circuit is 1.

As shown in fig. 2, after the circuit is powered on, the programming power VSV rises from 2.5V when the programming state starts. When the voltage rises to about 8V, the monitoring circuit recognizes the VSV state and the output signal goes low. When the VSV rises to a high voltage (11.8V), the monitoring circuit output signal is stable and 0 is output.

As shown in fig. 3, when the programming is finished, the programming power source VSV drops from 11.8V. When the voltage drops to about 3.5V, the monitoring circuit recognizes the VSV state, and the output signal goes high. When the VSV drops to the operating voltage (2.5V), the monitoring circuit output signal stabilizes output 1.

As shown in FIG. 4, the monitoring circuit of the present invention can accurately monitor the VSV voltage variation process, and realize the monitoring results of outputting 0 at high voltage and outputting 1 at working voltage.

As shown in fig. 5, a specific structure diagram of the programming voltage acquisition part uses the VSV power supply itself as an input terminal, and uses the VSV as a power supply terminal, divides the voltage by the MOS transistor, acquires a changed VSV voltage value, and generates an acquisition signal Y1.

As shown in fig. 6, the specific structure of the control signal conversion section converts the collected signal Y1 into the control signal Y2 at normal pressure using the collected signal Y1 as an input terminal and the operating voltage VCCA as a power supply terminal.

As shown in fig. 7, the specific structure of the program voltage status recognition portion uses the converted control signal Y2 as an input terminal, uses VSV as a power terminal, and is controlled by a series resistor made of a series MOS transistor to generate a recognition signal Y3 within a voltage range specified by VSV.