阅读说明：本技术 阵列基板及显示装置 (Array substrate and display device ) 是由 贾纬华 张祖强 邱昌明 于 2018-08-03 设计创作，主要内容包括：本发明公开一种阵列基板(10),包括衬底(11)、设于所述衬底(11)上的薄膜晶体管(13)及第一阻光层(15),所述第一阻光层(15)位于所述薄膜晶体管(13)远离所述衬底(11)的一侧,所述薄膜晶体管(13)的氧化物有源层(133)于所述衬底(11)上的正投影位于所述第一阻光层(15)于所述衬底(11)上的正投影内。本发明还提供一种显示装置。(The invention discloses an array substrate (10), which comprises a substrate (11), a thin film transistor (13) and a first light blocking layer (15), wherein the thin film transistor (13) and the first light blocking layer (15) are arranged on the substrate (11), the first light blocking layer (15) is positioned on one side, away from the substrate (11), of the thin film transistor (13), and the orthographic projection of an oxide active layer (133) of the thin film transistor (13) on the substrate (11) is positioned in the orthographic projection of the first light blocking layer (15) on the substrate (11). The invention also provides a display device.)

The array substrate is characterized by comprising a substrate, a thin film transistor and a first light blocking layer, wherein the thin film transistor and the first light blocking layer are arranged on the substrate, the first light blocking layer is positioned on one side, away from the substrate, of the thin film transistor, and the orthographic projection of an oxide active layer of the thin film transistor on the substrate is positioned in the orthographic projection of the first light blocking layer on the substrate.

The array substrate of claim 1, further comprising a second light blocking layer disposed between the substrate and the oxide active layer.

The array substrate of claim 2, further comprising a first passivation layer disposed between the substrate and the second light blocking layer.

The array substrate of claim 3, further comprising a second passivation layer between the oxide active layer and the second light blocking layer.

The array substrate of claim 2, wherein the thin film transistor further comprises a gate electrode disposed on the substrate, and a gate insulating layer disposed between the oxide active layer and the second light blocking layer, wherein the second light blocking layer is disposed on the gate electrode and covers the gate electrode.

The array substrate of claim 5, wherein an orthographic projection of the second light-blocking layer on the substrate is within an orthographic projection of the first light-blocking layer on the substrate, and an orthographic area of the second light-blocking layer on the substrate is smaller than an orthographic area of the first light-blocking layer on the substrate.

The array substrate of claim 2, wherein the thin film transistor further comprises a gate electrode and a gate insulating layer, the gate electrode is disposed on the substrate, the gate insulating layer is disposed between the oxide active layer and the gate electrode, and the second light blocking layer is disposed on the gate insulating layer.

The array substrate of claim 7, wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer, and the gate, the first gate insulating layer, the second light blocking layer, and the second gate insulating layer are sequentially stacked on the substrate.

The array substrate of claim 2, wherein the thin film transistor further comprises a gate electrode and a gate insulating layer, the array substrate further comprises a passivation layer, the second light blocking layer, the passivation layer, the oxide active layer, the gate insulating layer and the gate electrode are sequentially stacked on the substrate, and the second light blocking layer is disposed adjacent to the substrate.

The array substrate of claim 2, wherein the second light blocking layer is made of a passivation layer material doped with a light absorbing material.

The array substrate of claim 2, wherein the second light blocking layer comprises a light blocking layer and a light absorbing layer stacked.

The array substrate of claim 1, wherein the first light blocking layer comprises a light blocking layer and a light absorbing layer stacked.

The array substrate of claim 1, further comprising a third passivation layer covering the thin film transistor, wherein the first light blocking layer is disposed on a side of the third passivation layer away from the substrate.

The array substrate of claim 13, further comprising a fourth passivation layer covering a side of the first light blocking layer away from the oxide active layer.

The array substrate of claim 1, wherein the first light blocking layer is formed by doping a light absorbing material with a passivation layer material.

A display device comprising the array substrate according to any one of claims 1 to 15.