Method and device for reducing average power consumption of SSD, computer equipment and storage medium

文档序号:828784 发布日期:2021-03-30 浏览:26次 中文

阅读说明:本技术 降低ssd平均功耗的方法、装置、计算机设备及存储介质 (Method and device for reducing average power consumption of SSD, computer equipment and storage medium ) 是由 李湘锦 张鹏 余桉 于 2020-12-24 设计创作,主要内容包括:本发明涉及降低SSD平均功耗的方法、装置、计算机设备及存储介质;其中,方法,包括:获取主机端下发的最低功耗模式命令,SSD进入低功耗中间状态;判断SSD进入低功耗中间状态是否有延时;若有延时,则判断延时是否超过预设最大值;若不超过,则SSD进入全速运行状态、降速运行状态、或再降速运行状态;若超过,则判断SSD是否需要后端备份;若需要,则固件进入上电状态,SSD退出最低功耗模式。本发明速度快,灵活性高,低功耗响应迅速,功耗降低显著,而且读写性能受影响小,降低了SSD的平均功耗。(The invention relates to a method, a device, computer equipment and a storage medium for reducing the average power consumption of an SSD; the method comprises the following steps: acquiring a lowest power consumption mode command issued by a host end, and enabling the SSD to enter a low power consumption intermediate state; judging whether the SSD enters a low-power-consumption intermediate state or not has time delay; if so, judging whether the delay exceeds a preset maximum value; if not, the SSD enters a full-speed running state, a speed reduction running state or a speed reduction running state again; if yes, judging whether the SSD needs back-end backup or not; if the firmware needs to enter a power-on state, the SSD exits the lowest power consumption mode. The invention has the advantages of high speed, high flexibility, low power consumption, quick response, obvious reduction of power consumption, small influence on the read-write performance and reduction of the average power consumption of the SSD.)

1. A method of reducing average power consumption of an SSD, comprising the steps of:

acquiring a lowest power consumption mode command issued by a host end, and enabling the SSD to enter a low power consumption intermediate state;

judging whether the SSD enters a low-power-consumption intermediate state or not has time delay;

if so, judging whether the delay exceeds a preset maximum value;

if not, the SSD enters a full-speed running state, a speed reduction running state or a speed reduction running state again;

if yes, judging whether the SSD needs back-end backup or not;

if the firmware needs to enter a power-on state, the SSD exits the lowest power consumption mode.

2. The method of claim 1, wherein the preset maximum value is 3-6 seconds.

3. The method according to claim 1, wherein after the step of determining whether the SSD enters the low power consumption intermediate state has a delay, the method further comprises: if not, the SSD enters a lowest power consumption mode; after the determining whether the SSD needs the back-end backup, the method further includes: if not, the SSD enters a lowest power consumption mode.

4. The method according to claim 1, wherein the firmware enters a power-up state, and after the step of the SSD exiting the lowest power consumption mode, the method further comprises: and awakening the SSD, acquiring a full-speed running state command, a speed reduction running state command or a speed reduction running state command issued by the host end, and executing corresponding operation by the SSD according to the command.

5. An apparatus for reducing average power consumption of an SSD, comprising: the method comprises the steps of obtaining an entry unit, a first judgment unit, a second judgment unit, a first entry unit, a third judgment unit and a power-on exit unit;

the acquisition entering unit is used for acquiring a lowest power consumption mode command issued by the host end, and the SSD enters a low power consumption intermediate state;

the first judging unit is used for judging whether the SSD enters a low-power-consumption intermediate state or not has time delay;

the second judging unit is used for judging whether the delay time exceeds a preset maximum value;

the first entering unit is used for the SSD to enter a full-speed running state, a speed reduction running state or a speed re-reduction running state;

the third judging unit is used for judging whether the SSD needs back-end backup or not;

and the power-on exit unit is used for enabling the firmware to enter a power-on state and enabling the SSD to exit the lowest power consumption mode.

6. The apparatus of claim 5, wherein the preset maximum is 3-6 seconds.

7. The apparatus of claim 5, further comprising: and the second entering unit is used for entering the SSD into the lowest power consumption mode.

8. The apparatus of claim 5, further comprising: and the wake-up acquisition execution unit is used for waking up the SSD, acquiring the full-speed running state command, the speed reduction running state command or the speed reduction running state command issued by the host side, and executing corresponding operation by the SSD according to the command.

9. A computer device comprising a memory having stored thereon a computer program and a processor that, when executing the computer program, implements the method of reducing SSD average power consumption of any of claims 1-4.

10. A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement the method of reducing SSD average power consumption of any of claims 1-4.

Technical Field

The invention relates to the technical field of SSD power consumption reduction, in particular to a method and a device for reducing the average SSD power consumption, computer equipment and a storage medium.

Background

In order to better realize Power consumption management of an existing SSD-Solid State drive SOC (system on chip) chip, a host manages a Power supply of an SSD through an NVME (nonvolatile memory host controller interface) Power State (PS for short) command, wherein the command mainly comprises a PS0/PS1/PS2/PS3/PS4 command, but the problem that the recovery from PS4 to PS0/1/2 is slow is solved, and the problem that the Power consumption is not obviously reduced from PS3 to PS0/1/2 is solved.

Disclosure of Invention

The present invention is directed to overcome the drawbacks of the prior art, and provides a method, an apparatus, a computer device, and a storage medium for reducing average power consumption of an SSD.

In order to achieve the purpose, the invention adopts the following technical scheme:

a method for reducing the average power consumption of an SSD comprises the following steps:

acquiring a lowest power consumption mode command issued by a host end, and enabling the SSD to enter a low power consumption intermediate state;

judging whether the SSD enters a low-power-consumption intermediate state or not has time delay;

if so, judging whether the delay exceeds a preset maximum value;

if not, the SSD enters a full-speed running state, a speed reduction running state or a speed reduction running state again;

if yes, judging whether the SSD needs back-end backup or not;

if the firmware needs to enter a power-on state, the SSD exits the lowest power consumption mode.

The further technical scheme is as follows: the preset maximum value is 3-6 seconds.

The further technical scheme is as follows: after the step of judging whether the SSD enters the low-power consumption intermediate state or not has a delay, the method further comprises the following steps of: if not, the SSD enters a lowest power consumption mode; after the determining whether the SSD needs the back-end backup, the method further includes: if not, the SSD enters a lowest power consumption mode.

The further technical scheme is as follows: the firmware enters a power-on state, and after the step of exiting the lowest power consumption mode by the SSD, the method further comprises the following steps of: and awakening the SSD, acquiring a full-speed running state command, a speed reduction running state command or a speed reduction running state command issued by the host end, and executing corresponding operation by the SSD according to the command.

An apparatus for reducing average power consumption of an SSD, comprising: the method comprises the steps of obtaining an entry unit, a first judgment unit, a second judgment unit, a first entry unit, a third judgment unit and a power-on exit unit;

the acquisition entering unit is used for acquiring a lowest power consumption mode command issued by the host end, and the SSD enters a low power consumption intermediate state;

the first judging unit is used for judging whether the SSD enters a low-power-consumption intermediate state or not has time delay;

the second judging unit is used for judging whether the delay time exceeds a preset maximum value;

the first entering unit is used for the SSD to enter a full-speed running state, a speed reduction running state or a speed re-reduction running state;

the third judging unit is used for judging whether the SSD needs back-end backup or not;

and the power-on exit unit is used for enabling the firmware to enter a power-on state and enabling the SSD to exit the lowest power consumption mode.

The further technical scheme is as follows: the preset maximum value is 3-6 seconds.

The further technical scheme is as follows: further comprising: and the second entering unit is used for entering the SSD into the lowest power consumption mode.

The further technical scheme is as follows: further comprising: and the wake-up acquisition execution unit is used for waking up the SSD, acquiring the full-speed running state command, the speed reduction running state command or the speed reduction running state command issued by the host side, and executing corresponding operation by the SSD according to the command.

A computer device comprising a memory having stored thereon a computer program and a processor that when executed implements a method of reducing average power consumption of an SSD as described above.

A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement a method of reducing SSD average power consumption as described above.

Compared with the prior art, the invention has the beneficial effects that: the method has the advantages of high speed, high flexibility, quick response with low power consumption, obvious power consumption reduction, small influence on the read-write performance, reduction of the average power consumption of the SSD and capability of better meeting the requirements.

The invention is further described below with reference to the accompanying drawings and specific embodiments.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a diagram illustrating a prior art power state transition application;

fig. 2 is a schematic flowchart of a method for reducing average power consumption of an SSD according to an embodiment of the present invention;

FIG. 3 is a schematic block diagram of an apparatus for reducing the average SSD power consumption according to an embodiment of the present invention;

FIG. 4 is a schematic block diagram of a computer device provided by an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

Referring to the embodiments shown in fig. 1 to 4, wherein referring to the application diagram of the conventional Power State transition shown in fig. 1, PS0/1/2/3/4 is a Power State command: wherein, PS 0: a full speed operating state; PS 1: a reduced speed running state (the speed of a CPU (central processing unit) and an NFC (nand flash controller) is reduced); PS2: a reduced speed operation state (further reducing the speed of a CPU (central processing unit) and an NFC (nand flash controller)); PS3: a second low power mode (CPU0 enters WFI (wait for interrupt) state and NFC power is turned off); PS4: the lowest power consumption mode (hardware to handle power and PMA (physical layer electrical sublayer) of PCIE (high speed serial computer expansion bus) is in power-on state, and others are powered off).

The noun explanation in fig. 1 is as follows: device IDLE: the SSD is in an idle state, and the host does not issue commands to the SSD; host Mode Set: the host switches the power state of the SSD by issuing an NVME command; CLKRREQ #0- >1 (signal from host). the host goes the clock request signal from low to high, which indicates entry into PS4 if PS3 is present; CLKRREQ #1- >0 (host-asserted signal) the host asserts the clock request signal from high to low, which indicates entry into PS3 if PS4 is present; PERST #0- >1 (host-provided signal), PCIE global reset signal, if this state is PS4, it represents to enter PS 3;

wherein, the interconversion steps in fig. 1 are as follows: 1. PS0/PS1/PS2, which are mutually switched and directly adopt a software mode to configure for switching, because the related operations are less, the host has requirements on speed switching, generally does not relate to a power-off module, and only reduces the clock; 2. PS3, after receiving the command, because the related configuration is not too much, the low power consumption operation is also carried out in a software mode, the nand flash controller and the nand particles are generally closed, other modules are not powered off, and the defect is that the power consumption is effectively reduced; 3. PS4 power consumption is minimized because there are many switches, and the disadvantage is slow start-up speed.

Referring to fig. 2, the present invention discloses a method for reducing average power consumption of an SSD, comprising the following steps:

s1, acquiring a lowest power consumption mode command issued by the host end, and making the SSD enter a low power consumption intermediate state;

in this embodiment, when the SSD receives a lowest power consumption mode command issued by the host, the SSD enters a low power consumption state, or enters a set state (at this time, the SSD does not enter the low power consumption, and only receives the command), then the SSD enters a PS3.5 (low power consumption intermediate state), at this time, only a part of modules of the SSD are powered on, the rest of the modules are powered off, and the DDR (memory) is in a self-refresh state at this time.

S2, judging whether the SSD enters a low-power consumption intermediate state or not has time delay; if not, the step S7 is entered;

s3, if there is time delay, judging whether the time delay exceeds the preset maximum value;

in this embodiment, the preset maximum value is 3 to 6 seconds, and other values may be preset according to actual needs.

And S4, if not, the SSD enters a full-speed running state, a speed reduction running state or a speed reduction running state again, the SSD receives the full-speed running state command, the speed reduction running state command or the speed reduction running state command in normal order, and executes the full-speed running state command, the speed reduction running state command or the speed reduction running state command again.

S5, if yes, judging whether the SSD needs back-end backup; if not, the process proceeds to step S7;

s6, if necessary, the firmware enters a power-on state, and the SSD exits the lowest power consumption mode; execution proceeds to step S8;

s7, the SSD enters a lowest power consumption mode;

in this embodiment, at this time, the SSD only needs to power down the DDR on the basis of the low power consumption intermediate state, and quickly enters the lowest power consumption mode (PS 4).

And S8, waking up the SSD, acquiring a full-speed running state command, a speed reduction running state command or a speed reduction running state command issued by the host end, and executing corresponding operation by the SSD according to the command.

In this embodiment, the corresponding operations are executed by the SSD entering the full-speed running state, the speed-down running state, or the speed-re-reduction running state, and executing the full-speed running state command, the speed-down running state command, or the speed-re-reduction running state command.

The embodiment of the invention increases the mode that the software enters the low power consumption on the basis of issuing the command to enter the low power consumption mode at the traditional host end, predicts whether the software enters the low power consumption mode through reading and writing the command frequently for a period of time, increases the self-defined PS3.5 intermediate state, and compared with PS4, the DDR is in the self-refreshing state, thereby solving the problem of slow recovery starting from PS4 to PS0/1/2, and also solving the problem of unobvious power consumption reduction from PS3 to PS 0/1/2.

Referring to fig. 3, the present invention also discloses a device for reducing average power consumption of an SSD, comprising: an acquiring entry unit 10, a first judging unit 20, a second judging unit 30, a first entry unit 40, a third judging unit 50, and a power-on exit unit 60;

the acquisition entering unit 10 is configured to acquire a lowest power consumption mode command issued by a host, and the SSD enters a low power consumption intermediate state;

the first judging unit 20 is configured to judge whether there is a delay when the SSD enters the low power consumption intermediate state;

the second judging unit 30 is configured to judge whether the delay time exceeds a preset maximum value;

the first entering unit 40 is configured to enter a full-speed running state, a speed-down running state, or a speed-re-speed-down running state by the SSD;

the third judging unit 50 is configured to judge whether the SSD needs a back-end backup;

the power-on exit unit 60 is used for the firmware to enter a power-on state, and the SSD exits the lowest power consumption mode.

Wherein the preset maximum value is 3-6 seconds.

Wherein, the device still includes: a second entering unit 70 for the SSD to enter the lowest power consumption mode.

Wherein, the device still includes: and a wake-up obtaining and executing unit 80, configured to wake up the SSD, obtain the full-speed running status command, the speed-down running status command, or the speed-re-speed-down running status command issued by the host, and the SSD executes a corresponding operation according to the command.

It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation process of the above-mentioned apparatus for reducing the average power consumption of the SSD and each unit may refer to the corresponding description in the foregoing method embodiment, and for convenience and brevity of description, no further description is provided herein.

The above-mentioned means for reducing the average power consumption of the SSD may be implemented in the form of a computer program which is executable on a computer device as shown in fig. 4.

Referring to fig. 4, fig. 4 is a schematic block diagram of a computer device according to an embodiment of the present application; the computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.

Referring to fig. 4, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.

The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 include program instructions that, when executed, cause the processor 502 to perform a method of reducing SSD average power consumption.

The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.

The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 may be enabled to perform a method for reducing the average power consumption of the SSD.

The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 4 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.

Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions which, when executed by a processor, implement the method of reducing average power consumption of an SSD as described above.

The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.

The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.

The technical contents of the present invention are further illustrated by the examples only for the convenience of the reader, but the embodiments of the present invention are not limited thereto, and any technical extension or re-creation based on the present invention is protected by the present invention. The protection scope of the invention is subject to the claims.

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