阅读说明：本技术 一种常闭型高电子迁移率晶体管及其制造方法 (Normally-off high electron mobility transistor and manufacturing method thereof ) 是由 刘军林 吕全江 于 2020-11-23 设计创作，主要内容包括：本发明属于半导体技术领域,特别是涉及一种常闭型AlGaN/GaN高电子迁移率晶体管及其制造方法。与现有常规平面结构AlGaN/GaN高电子迁移率晶体管相比,本发明提供的结构将源极和漏极设在器件的上下两侧,有利于解决平面结构所面临的在大栅极偏压或者高频条件下会出现电流崩塌效应,工作在高温、大功率环境时会产生“自热效应”等问题。本发明采用选区硅衬底外延生长,使硅衬底上的AlGaN/GaN外延层分隔成相互独立小图形,大大降低了硅衬底与AlGaN/GaN外延层之间的应力累积,解决了外延薄膜的开裂、弯曲等问题,同时可以提升器件的制造良率和可靠性。(The invention belongs to the technical field of semiconductors, and particularly relates to a normally-closed AlGaN/GaN high-electron-mobility transistor and a manufacturing method thereof. Compared with the conventional AlGaN/GaN high-electron-mobility transistor with the planar structure, the source electrode and the drain electrode are arranged on the upper side and the lower side of the device, so that the problems that the planar structure has a current collapse effect under the condition of large grid bias voltage or high frequency, and generates a self-heating effect when working in a high-temperature and high-power environment and the like can be solved. According to the invention, the selective silicon substrate is adopted for epitaxial growth, so that the AlGaN/GaN epitaxial layer on the silicon substrate is divided into mutually independent small patterns, the stress accumulation between the silicon substrate and the AlGaN/GaN epitaxial layer is greatly reduced, the problems of cracking, bending and the like of an epitaxial film are solved, and the manufacturing yield and reliability of the device can be improved.)

1. A normally-off high electron mobility transistor comprises a silicon substrate, an epitaxial structure, a drain electrode, a drain ohmic contact metal layer, a passivation layer, a source electrode and a gate electrode, and is characterized in that: the front surface of the silicon substrate consists of a convex surface, a concave surface and two Si (111) surfaces positioned on two sides of the concave surface, wherein the convex surface is positioned at the uppermost part of the front surface of the silicon substrate and positioned on two sides of the silicon substrate and is parallel to the back surface of the silicon substrate, the concave surface is positioned at the bottom of the silicon substrate and is parallel to the convex surface, two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface, the epitaxial structure is positioned on the Si (111) surfaces and sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the Si (111) surface, the P-type layer is close to the bottom of a grid electrode and only exists in a region below the grid electrode, the AlGaN/GaN high electron mobility transistor is turned off by exhausting two-dimensional electron gas below the grid electrode to form a normally-closed structure, the drain electrode is, and the grid electrode is arranged on the P-type layer and is positioned between the drain ohmic contact metal layer and the source electrode.

2. A normally-off hemt according to claim 1, wherein: the resistivity of the silicon substrate is less than or equal to 10 omega cm, and the convex surface of the silicon substrate is one of a Si (100) surface, a Si (110) surface, a Si (112) surface, a Si (113) surface, a Si (114) surface, a Si (115) surface, a Si (116) surface, a Si (117) surface, a Si (221) surface, a Si (331) surface, a Si (551) surface and a Si (661) surface.

3. A normally-off hemt according to claim 1, wherein: the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer and is 100-500 nm thick, and the AlGaN barrier layer is Al_xGa_1-xThe thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element.

4. The method of claim 1, comprising the steps of:

(1) providing a silicon substrate with a resistivity of 10 omega cm or less, wherein a crystal plane of the silicon substrate is one of a Si (100) plane, a Si (110) plane, a Si (112) plane, a Si (113) plane, a Si (114) plane, a Si (115) plane, a Si (116) plane, a Si (117) plane, a Si (221) plane, a Si (331) plane, a Si (551) plane and a Si (661) plane, and SiO is formed at two ends of a front surface of the silicon substrate by partially using a photolithography and etching technique₂Etching the mask;

(2) to the formation of SiO₂Selectively etching the front surface of the silicon substrate with the etching mask, and removing SiO₂Etching the mask to form a profile composed of a convex surface, a concave surface and two Si (111) surfaces on both sides of the concave surface on the front surface of the silicon substrate, wherein the convex surface is positioned on the uppermost part of the front surface of the silicon substrate and on both sides of the silicon substrate and is formed by SiO in the selective etching process₂In the area protected by the corrosion mask, the concave surface and the two Si (111) surfaces are new surfaces formed by selective corrosion, the concave surface is positioned at the bottom of the silicon substrate and is parallel to the convex surface, and two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface;

(3) growing SiO on the convex surface, the concave surface and the Si (111) surface of the front surface of the silicon substrate₂Layer, and removing SiO on the Si (111) face by photolithography etching technique₂Layer, SiO on the convex and concave surfaces₂Formation of SiO₂Growing a mask;

(4) selectively growing an epitaxial structure on a Si (111) surface of the front surface of the silicon substrate, wherein the epitaxial structure sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the Si (111) surface, and simultaneously can be on the SiO (silicon dioxide) layer of the front surface of the silicon substrate₂Forming a polycrystalline epitaxial film above the growth mask, wherein the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer with the thickness of 100-500 nm, and the AlGaN barrier layer is Al_xGa_(1-x)The thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element;

(5) etching to remove SiO on the front surface of the silicon substrate₂Growing a polycrystalline epitaxial film formed over the mask, and then removing the SiO₂Growing a mask;

(6) etching off the P-type layer of the region outside the gate electrode to be manufactured by a photoetching technology;

(7) growing a passivation layer on the convex surface, the concave surface and the surface of the epitaxial structure;

(8) etching the passivation layer at the position of the ohmic contact metal layer of the source electrode and the drain electrode to be manufactured by utilizing a photoetching technology;

(9) manufacturing a source electrode and a drain ohmic contact metal layer by utilizing a stripping technology, so that the drain ohmic contact metal layer is electrically connected between the concave surface and the AlGaN barrier layer, and the source electrode is positioned on the passivation layer and is electrically connected with the AlGaN barrier layer;

(10) etching the passivation layer above the P-type layer by using a photoetching technology, and then manufacturing a grid electrode above the P-type layer by using a stripping technology;

(11) and manufacturing a drain electrode on the back of the silicon substrate.

Technical Field

The invention belongs to the technical field of semiconductors, and particularly relates to a normally-closed AlGaN/GaN high-electron-mobility transistor and a manufacturing method thereof.

Background

Compared with the first and second generation semiconductor materials, the third generation semiconductor material GaN has the advantages of large forbidden band width, high breakdown field strength, large electron mobility, strong radiation resistance and the like, and the GaN-based high electron mobility transistor has great development potential in the high-frequency and high-power fields such as wireless communication base stations, radars, automotive electronics and the like. The AlGaN/GaN high electron mobility transistor (AlGaN/GaN HEMT) structure appears based on the phenomenon described in t.mimura et al 1975 and m.a.khan et al 1994: the AlGaN and GaN heterostructure interface region exhibits exceptionally high electron mobility. At present, the conventional silicon substrate AlGaN/GaN HEMT device is of a planar structure, and a source electrode, a drain electrode and a gate electrode of the device are all on the top surface of the device, which easily causes reliability reduction, for example, a current collapse effect occurs under a large gate bias voltage or a high-frequency condition, and a self-heating effect occurs when the device works in a high-temperature and high-power environment. Due to the huge thermal mismatch between the silicon substrate and the GaN material system, the AlGaN/GaN HEMT structure grown on the whole surface of the silicon substrate has the problems of easy cracking of a film, serious bending and the like, so the stress control and bending control are mostly carried out by adopting a complex buffer layer design in the conventional technology, the process is complex, and the problems of low yield and poor reliability are easily caused in the subsequent device manufacturing process.

Disclosure of Invention

In view of the above technical problems, the present invention provides a normally-off AlGaN/GaN high electron mobility transistor and a method for manufacturing the same.

According to the invention, the source electrode and the drain electrode are respectively positioned at the upper side and the lower side of the transistor, so that the problems faced by the AlGaN/GaN high electron mobility transistor with a planar structure are solved, the selective silicon substrate is adopted for epitaxial growth, the AlGaN/GaN epitaxial layer on the silicon substrate is divided into mutually independent small patterns, the stress accumulation between the silicon substrate and the AlGaN/GaN epitaxial layer is greatly reduced, the problems of cracking, bending and the like of an epitaxial film are solved, and meanwhile, the manufacturing yield and reliability of the device can be improved.

The purpose of the invention is realized as follows:

the utility model provides a closed AlGaN/GaN high electron mobility transistor, includes silicon substrate, epitaxial structure, drain electrode ohmic contact metal layer, passivation layer, source electrode and grid electrode which characterized in that: the front surface of the silicon substrate consists of a convex surface, a concave surface and two Si (111) surfaces positioned on two sides of the concave surface, wherein the convex surface is positioned at the uppermost part of the front surface of the silicon substrate and positioned on two sides of the silicon substrate and is parallel to the back surface of the silicon substrate, the concave surface is positioned at the bottom of the silicon substrate and is parallel to the convex surface, two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface, the epitaxial structure is positioned on the Si (111) surfaces and sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the Si (111) surface, the P-type layer is close to the bottom of a grid electrode and only exists in a region below the grid electrode, the AlGaN/GaN high electron mobility transistor is turned off by exhausting two-dimensional electron gas below the grid electrode to form a normally-closed structure, the drain electrode is, and the grid electrode is arranged on the P-type layer and is positioned between the drain ohmic contact metal layer and the source electrode.

Further, the silicon substrate resistivity is 10 Ω · cm or less, and the convex surface of the silicon substrate is one of a Si (100) surface, a Si (110) surface, a Si (112) surface, a Si (113) surface, a Si (114) surface, a Si (115) surface, a Si (116) surface, a Si (117) surface, a Si (221) surface, a Si (331) surface, a Si (551) surface, and a Si (661) surface.

Furthermore, the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer and is 100-500 nm thick, the AlGaN barrier layer is Al_xGa_(1-x)The thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element.

A method for manufacturing a normally-off AlGaN/GaN high electron mobility transistor comprises the following steps:

(1) providing a silicon substrate with a resistivity of 10 omega cm or less, wherein a crystal plane of the silicon substrate is one of a Si (100) plane, a Si (110) plane, a Si (112) plane, a Si (113) plane, a Si (114) plane, a Si (115) plane, a Si (116) plane, a Si (117) plane, a Si (221) plane, a Si (331) plane, a Si (551) plane and a Si (661) plane, and SiO is formed at two ends of a front surface of the silicon substrate by partially using a photolithography and etching technique₂Etching the mask;

(2) to the formation of SiO₂Selectively etching the front surface of the silicon substrate with the etching mask, and removing SiO₂Etching the mask to form a front surface of the silicon substrateA convex surface, a concave surface and two Si (111) surfaces positioned at two sides of the concave surface, wherein the convex surface is positioned at the uppermost part of the front surface of the silicon substrate and positioned at two sides of the silicon substrate and is formed by SiO in the selective etching process₂In the area protected by the corrosion mask, the concave surface and the two Si (111) surfaces are new surfaces formed by selective corrosion, the concave surface is positioned at the bottom of the silicon substrate and is parallel to the convex surface, and two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface;

(3) growing SiO on the convex surface, the concave surface and the Si (111) surface of the front surface of the silicon substrate₂Layer, and removing SiO on the Si (111) face by photolithography etching technique₂Layer, SiO on the convex and concave surfaces₂Formation of SiO₂Growing a mask;

(4) selectively growing an epitaxial structure on a Si (111) surface of the front surface of the silicon substrate, wherein the epitaxial structure sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the Si (111) surface, and simultaneously can be on the SiO (silicon dioxide) layer of the front surface of the silicon substrate₂Forming a polycrystalline epitaxial film above the growth mask, wherein the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer with the thickness of 100-500 nm, and the AlGaN barrier layer is Al_xGa_(1-x)The thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element;

(5) etching to remove SiO on the front surface of the silicon substrate₂Growing a polycrystalline epitaxial film formed over the mask, and then removing the SiO₂Growing a mask;

(6) etching off the P-type layer of the region outside the gate electrode to be manufactured by a photoetching technology;

(7) growing a passivation layer on the convex surface, the concave surface and the surface of the epitaxial structure;

(8) etching the passivation layer at the position of the ohmic contact metal layer of the source electrode and the drain electrode to be manufactured by utilizing a photoetching technology;

(9) manufacturing a source electrode and a drain ohmic contact metal layer by utilizing a stripping technology, so that the drain ohmic contact metal layer is electrically connected between the concave surface and the AlGaN barrier layer, and the source electrode is positioned on the passivation layer and is electrically connected with the AlGaN barrier layer;

(10) etching the passivation layer above the P-type layer by using a photoetching technology, and then manufacturing a grid electrode above the P-type layer by using a stripping technology;

(11) and manufacturing a drain electrode on the back of the silicon substrate.

Compared with the prior art, the invention has the following beneficial effects:

compared with the conventional AlGaN/GaN high-electron-mobility transistor with the planar structure, the source electrode and the drain electrode are arranged on the upper side and the lower side of the device, so that the problems that the planar structure has a current collapse effect under the condition of large grid bias voltage or high frequency, and generates a self-heating effect when working in a high-temperature and high-power environment and the like can be solved.

According to the invention, the selective silicon substrate is adopted for epitaxial growth, so that the AlGaN/GaN epitaxial layer on the silicon substrate is divided into mutually independent small patterns, the stress accumulation between the silicon substrate and the AlGaN/GaN epitaxial layer is greatly reduced, the problems of cracking, bending and the like of an epitaxial film are solved, and the manufacturing yield and reliability of the device can be improved.

Drawings

Fig. 1 is a schematic cross-sectional view of a normally-off AlGaN GaN high electron mobility transistor according to the present invention.

Fig. 2 is a schematic view of step 1 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 3 is a schematic diagram of step 2 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 4 is a schematic diagram of step 3 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 5 is a schematic diagram of step 4 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 6 is a schematic diagram of step 5 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 7 is a schematic diagram of step 6 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 8 is a schematic diagram of step 7 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 9 is a schematic view of step 8 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 10 is a schematic view of step 9 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 11 is a schematic diagram of step 10 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 12 is a schematic view of step 11 of a method for manufacturing a normally-off AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Illustration of the drawings: 100-silicon substrate, 101-convex surface of front surface of silicon substrate, 102-concave surface of front surface of silicon substrate, 103- (111) surface of front surface of silicon substrate, 104-SiO₂Etching mask, 105-SiO₂The method comprises the following steps of growing a mask, 200-an epitaxial structure, 201-a buffer layer, 202-a high-resistance layer, 203-a GaN channel layer, 204-an AlGaN barrier layer, 205-a P type layer, 206-a polycrystalline epitaxial film, 300-a passivation layer, 400-a source electrode, 500-a drain ohmic contact metal layer, 600-a gate electrode and 700-a drain electrode.

Detailed Description

The invention is further described below with reference to the figures and examples.

Example 1:

fig. 1 shows a normally-off AlGaN/GaN high electron mobility transistor according to the present invention, which includes a silicon substrate 100, an epitaxial structure 200, a drain electrode 700, a drain ohmic contact metal layer 500, a passivation layer 300, a source electrode 400, and a gate electrode 600, and is characterized in that: the front surface of the silicon substrate 100 consists of a convex surface 101, a concave surface 102 and two Si (111) surfaces 103 positioned on two sides of the concave surface 102, wherein the convex surface 101 is positioned at the uppermost part of the front surface of the silicon substrate 100 and positioned on two sides of the silicon substrate 100 and parallel to the back surface of the silicon substrate 100, the concave surface 102 is positioned at the bottom of the silicon substrate 100 and parallel to the convex surface 101, two ends of the two Si (111) surfaces 103 are respectively intersected with the convex surface 101 and the concave surface 102, the epitaxial structure 200 is positioned on the Si (111) surfaces 103 and sequentially comprises a buffer layer 201, a high resistance layer 202, a GaN channel layer 203, an AlGaN barrier layer 204 and a P-type layer 205 from the Si (111) surfaces 103, the P-type layer 205 is close to the bottom of the gate electrode 600 and only exists in the area below the gate electrode 600, the AlGaN/GaN high electron mobility transistor is turned off by exhausting two-dimensional electron gas below the gate electrode 600 to form a, the drain ohmic contact metal layer 500 is located on one side of the concave surface 102 and the epitaxial structure 200, an electrical connection is formed between the concave surface 102 and the AlGaN barrier layer 204, and the drain electrode 700 is conducted through the silicon substrate 100, the passivation layer 300 is arranged on the convex surface 101, the source electrode 400 is located on the passivation layer 300 and is electrically connected with the AlGaN barrier layer 204, and the gate electrode 600 is arranged on the P-type layer 205 and is located between the drain ohmic contact metal layer 500 and the source electrode 400.

The silicon substrate 100 has a resistivity of 10 Ω · cm or less, and the silicon substrate convex surface 101 is one of a Si (100) surface, a Si (110) surface, a Si (112) surface, a Si (113) surface, a Si (114) surface, a Si (115) surface, a Si (116) surface, a Si (117) surface, a Si (221) surface, a Si (331) surface, a Si (551) surface, and a Si (661) surface.

The high-resistance layer 202 can be one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer 202 is 1-10 mu m, the GaN channel layer 203 is an unintentionally doped GaN layer and is 100-500 nm, the AlGaN barrier layer 204 is Al_xGa_(1-x)The thickness of the N layer is 10 nm-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer 205 is P-GaN doped with Mg element or P-AlGaN doped with Mg element.

A method for manufacturing a normally-off AlGaN/GaN high electron mobility transistor comprises the following steps:

(1) as shown in FIG. 2, a silicon substrate 100 having a resistivity of 10. omega. cm or less is provided, and the crystal plane of the silicon substrate 100 is an Si (100) planeOne of Si (110), Si (112), Si (113), Si (114), Si (115), Si (116), Si (117), Si (221), Si (331), Si (551) and Si (661) is formed on both ends of the front surface of the silicon substrate 100 by a photolithography and etching technique₂Etching the mask 104;

(2) for the formation of SiO as shown in FIG. 3₂The front surface of the silicon substrate 100 of the etching mask 104 is selectively etched, and then SiO is removed₂Etching the mask 104 to form a profile composed of a convex surface 101, a concave surface 102 and two Si (111) surfaces 103 on both sides of the concave surface 102 on the front surface of the silicon substrate 100, wherein the convex surface 101 is positioned on the uppermost part of the front surface of the silicon substrate 100 and on both sides of the silicon substrate and is SiO etched in a selective etching process₂In the region protected by the etching mask 104, the concave surface 102 and the two Si (111) surfaces 103 are new surfaces formed by selective etching, the concave surface 102 is positioned at the bottom of the silicon substrate 100 and is parallel to the convex surface 101, and two ends of the two Si (111) surfaces 103 are respectively intersected with the convex surface 101 and the concave surface 102;

(3) as shown in FIG. 4, SiO is grown on the convex surface 101, the concave surface 102 and the Si (111) surface 103 of the front surface of the silicon substrate 100₂Layer and removing SiO on the Si (111) face 103 by photolithographic etching technique₂Layer, SiO remaining on convex 101 and concave 102₂Layer of SiO₂Growing a mask 105;

(4) as shown in fig. 5, an epitaxial structure 200 is selectively grown on the Si (111) plane 103 of the front surface of the silicon substrate 100, and the epitaxial structure 200 includes a buffer layer 201, a high resistance layer 202, a GaN channel layer 203, an AlGaN barrier layer 204, and a P-type layer 205 in this order from the Si (111) plane 103, and at the same time, an SiO layer is formed on the front surface of the silicon substrate 100₂Forming a polycrystalline epitaxial film 206 above the growth mask 105, wherein the high-resistance layer 202 is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer 202 is 1-10 μm, the GaN channel layer 203 is an unintentionally doped GaN layer with a thickness of 100-500 nm, and the AlGaN barrier layer 204 is Al_xGa_(1-x)The thickness of the N layer is 10 nm-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer 205 is P-GaN doped with Mg element or P-AlGaN doped with Mg element;

(5) etching to remove SiO on the front surface of the silicon substrate 100, as shown in FIG. 6₂The polycrystalline epitaxial film 206 formed over the mask 105 is grown, and then the SiO is removed₂Growing a mask 105;

(6) as shown in fig. 7, the P-type layer 205 outside the region where the gate electrode 600 is to be formed is etched away by a photolithography and etching technique;

(7) as shown in fig. 8, a passivation layer 300 is grown on the convex, concave and epitaxial structure surfaces;

(8) as shown in fig. 9, the passivation layer 300 at the position where the source electrode 400 and the drain ohmic contact metal layer 500 are to be formed is etched away by using a photolithography and etching technique;

(9) as shown in fig. 10, a source electrode 400 and a drain ohmic contact metal layer 500 are formed by a lift-off technique, such that the drain ohmic contact metal layer 500 is electrically connected between the concave surface 102 and the AlGaN barrier layer 204, and the source electrode 400 is located on the passivation layer 300 and is electrically connected with the AlGaN barrier layer 204;

(10) as shown in fig. 11, the passivation layer 300 above the P-type layer 205 is etched away by using a photolithography and etching technique, and then a gate electrode 600 is formed above the P-type layer 205 by using a lift-off technique;

(11) as shown in fig. 12, a drain electrode 700 is formed on the back surface of the silicon substrate 100.

As shown in fig. 1, the working principle of the normally-off AlGaN/GaN high electron mobility transistor of the present invention is as follows: when the gate voltage is zero or the gate voltage is lower than the threshold voltage, the two-dimensional electron gas below the gate electrode 600 is depleted, and the AlGaN/GaN high electron mobility transistor is in an off state, which shows the characteristic of a typical normally-closed AlGaN/GaN high electron mobility transistor; when the gate voltage is greater than the threshold voltage, electrons are transmitted from the source electrode 400 along the two-dimensional electron gas layer at the interface between the GaN channel layer 203 and the AlGaN barrier layer 204, and then reach the drain electrode 700 via the drain ohmic contact metal 500 and the silicon substrate 100, where the AlGaN/GaN high electron mobility transistor is in an on state.

The foregoing merely represents preferred embodiments of the invention, which are described in some detail and detail, and therefore should not be construed as limiting the scope of the invention. It should be noted that, for those skilled in the art, various changes, modifications and substitutions can be made without departing from the spirit of the present invention, and these are all within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.