阅读说明：本技术 一种常闭型硅衬底高电子迁移率晶体管及其制造方法 (Normally-off silicon substrate high electron mobility transistor and manufacturing method thereof ) 是由 刘军林 吕全江 于 2020-11-23 设计创作，主要内容包括：本发明属于半导体技术领域,特别是涉及一种常闭型硅衬底AlGaN/GaN高电子迁移率晶体管及其制造方法。晶体管包括硅衬底、外延结构、漏极电极、漏极欧姆接触金属层、钝化层、源极电极和栅极电极,其特征在于：源极电极和漏极电极分别位于器件的上下两侧,可改善平面结构AlGaN/GaN高电子迁移率晶体管面临的问题,同时有利于与硅器件的集成,采用选区硅衬底外延生长,使硅衬底上的AlGaN/GaN外延层分隔成相互独立小图形,大大降低了硅衬底与AlGaN/GaN外延层之间的应力累积,解决了外延薄膜的开裂、弯曲等问题,同时可以提升器件的制造良率和可靠性。(The invention belongs to the technical field of semiconductors, and particularly relates to a normally-closed AlGaN/GaN high-electron-mobility transistor with a silicon substrate and a manufacturing method thereof. The transistor comprises a silicon substrate, an epitaxial structure, a drain electrode, a drain ohmic contact metal layer, a passivation layer, a source electrode and a grid electrode, and is characterized in that: the source electrode and the drain electrode are respectively positioned on the upper side and the lower side of the device, the problems faced by the AlGaN/GaN high electron mobility transistor with a planar structure can be improved, integration with a silicon device is facilitated, selective silicon substrate epitaxial growth is adopted, the AlGaN/GaN epitaxial layer on the silicon substrate is divided into mutually independent small patterns, stress accumulation between the silicon substrate and the AlGaN/GaN epitaxial layer is greatly reduced, the problems of cracking, bending and the like of an epitaxial film are solved, and meanwhile, the manufacturing yield and reliability of the device can be improved.)

1. A normally-closed silicon substrate high electron mobility transistor comprises a silicon substrate, an epitaxial structure, a drain electrode, a drain ohmic contact metal layer, a passivation layer, a source electrode and a gate electrode, and is characterized in that: including silicon substrate, epitaxial structure, drain electrode ohmic contact metal layer, passivation layer, source electrode and grid electrode, its characterized in that: the front surface of the silicon substrate consists of a convex surface, a concave surface and two Si (111) surfaces positioned on two sides of the convex surface, wherein the convex surface is positioned on the uppermost part of the front surface of the silicon substrate and is parallel to the back surface of the silicon substrate, the concave surface is positioned on two sides of the bottom of the silicon substrate and is parallel to the convex surface, two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface, the epitaxial structure is positioned on the convex surface and the Si (111) surfaces and sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the silicon substrate, the P-type layer is close to the bottom of a grid electrode and only exists in a region below the grid electrode, the AlGaN/GaN high electron mobility transistor is turned off by exhausting two-dimensional electron gas below the grid electrode to form a normally closed structure, the drain electrode is arranged, and the source electrode is positioned on the AlGaN barrier layer on the convex surface, and the gate electrode is arranged on the P-type layer and positioned between the drain ohmic contact metal layer and the source electrode.

2. The normally-off silicon-substrate hemt of claim 1, wherein: the resistivity of the silicon substrate is less than or equal to 10 omega cm, and the convex surface of the silicon substrate is one of a Si (110) surface, a Si (112) surface, a Si (113) surface, a Si (114) surface, a Si (115) surface, a Si (116) surface, a Si (117) surface, a Si (221) surface, a Si (331) surface, a Si (551) surface and a Si (661) surface.

3. The normally-off silicon-substrate hemt of claim 1, wherein: the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer and is 100-500 nm thick, and the AlGaN barrier layer is Al_xGa_1-xThe thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element.

4. The method of claim 1, comprising the steps of:

(1) providing a silicon substrate with a resistivity of 10 omega cm or less, wherein the crystal plane of the silicon substrate is one of a Si (110) plane, a Si (112) plane, a Si (113) plane, a Si (114) plane, a Si (115) plane, a Si (116) plane, a Si (117) plane, a Si (221) plane, a Si (331) plane, a Si (551) plane and a Si (661) plane, and the front surface of the silicon substrate is partially formed with SiO by a photolithography and etching technique₂Etching the mask;

(2) to the formation of SiO₂Selectively etching the front surface of the silicon substrate with the etching mask, and removing SiO₂Etching the mask to form a profile composed of a convex surface, a concave surface and two Si (111) surfaces on both sides of the convex surface on the uppermost part of the front surface of the silicon substrate, wherein the convex surface is formed by SiO in the selective etching process₂In the area protected by the corrosion mask, the concave surface and the two Si (111) surfaces are new surfaces formed by selective corrosion, the concave surface is positioned at the bottom of the silicon substrate and is parallel to the convex surface, and two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface;

(3) growing SiO on the convex surface, the concave surface and the Si (111) surface of the front surface of the silicon substrate₂And removing SiO on the convex surface and the Si (111) surface by photoetching technology₂Retention of SiO on the concave surface₂Formation of SiO₂Growing a mask;

(4) selectively growing an epitaxial structure on the convex surface and the Si (111) surface of the front surface of the silicon substrate, wherein the epitaxial structure sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the silicon substrate, and simultaneously can be on the SiO layer of the front surface of the silicon substrate₂Forming a polycrystalline epitaxial film above the growth mask, wherein the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer with the thickness of 100-500 nm, and the AlGaN barrier layer is Al_xGa_1-xThe thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element;

(5) etching to remove SiO on the front surface of the silicon substrate₂Growing a polycrystalline epitaxial film formed over the mask, and then removing the SiO₂Growing a mask;

(6) etching off the P-type layer of the region outside the gate electrode to be manufactured by a photoetching technology;

(7) growing a passivation layer on the concave surface and the epitaxial structure;

(8) etching the passivation layer at the position of the ohmic contact metal layer of the source electrode and the drain electrode to be manufactured by utilizing a photoetching technology;

(9) manufacturing a source electrode and a drain ohmic contact metal layer by utilizing a stripping technology, so that the drain ohmic contact metal layer is electrically connected between the concave surface and the AlGaN barrier layer, and the source electrode is positioned on the AlGaN barrier layer on the convex surface;

(10) etching the passivation layer above the P-type layer by using a photoetching technology, and then manufacturing a grid electrode by using a stripping technology;

(11) and manufacturing a drain electrode on the back of the silicon substrate.

Technical Field

The invention belongs to the technical field of semiconductors, and particularly relates to a normally-closed AlGaN/GaN high-electron-mobility transistor with a silicon substrate and a manufacturing method thereof.

Background

Compared with the first and second generation semiconductor materials, the third generation semiconductor material GaN has the advantages of large forbidden band width, high breakdown field strength, large electron mobility, strong radiation resistance and the like, and the GaN-based high electron mobility transistor has great development potential in the high-frequency and high-power fields such as wireless communication base stations, radars, automotive electronics and the like. The AlGaN/GaN high electron mobility transistor (AlGaN/GaN HEMT) structure appears based on the phenomenon described in t.mimura et al 1975 and m.a.khan et al 1994: the AlGaN and GaN heterostructure interface region exhibits exceptionally high electron mobility. At present, the conventional silicon substrate AlGaN/GaN HEMT device is of a planar structure, and a source electrode, a drain electrode and a gate electrode of the device are all on the top surface of the device, which easily causes reliability reduction, for example, a current collapse effect occurs under a large gate bias voltage or a high-frequency condition, and a self-heating effect occurs when the device works in a high-temperature and high-power environment. Due to the huge thermal mismatch between the silicon substrate and the GaN material system, the AlGaN/GaN HEMT structure grown on the whole surface of the silicon substrate has the problems of easy cracking of a film, serious bending and the like, so the stress control and bending control are mostly carried out by adopting a complex buffer layer design in the conventional technology, the process is complex, and the problems of low yield and poor reliability are easily caused in the subsequent device manufacturing process.

Disclosure of Invention

In view of the above technical problems, the present invention provides a normally-off AlGaN/GaN high electron mobility transistor with a silicon substrate and a method for manufacturing the same.

According to the invention, the source electrode and the drain electrode are respectively positioned at the upper side and the lower side of the transistor, so that the problems faced by the AlGaN/GaN high-electron-mobility transistor with a planar structure silicon substrate are solved, the integration with a silicon device is facilitated, the selective silicon substrate epitaxial growth is adopted, the AlGaN/GaN epitaxial layer on the silicon substrate is divided into mutually independent small patterns, the stress accumulation between the silicon substrate and the AlGaN/GaN epitaxial layer is greatly reduced, the problems of cracking, bending and the like of an epitaxial film are solved, and the manufacturing yield and the reliability of the device can be improved.

The purpose of the invention is realized as follows:

the utility model provides a closed type silicon substrate AlGaN/GaN high electron mobility transistor, includes silicon substrate, epitaxial structure, drain electrode ohmic contact metal layer, passivation layer, source electrode and grid electrode, its characterized in that: the front surface of the silicon substrate consists of a convex surface, a concave surface and two Si (111) surfaces positioned on two sides of the convex surface, wherein the convex surface is positioned on the uppermost part of the front surface of the silicon substrate and is parallel to the back surface of the silicon substrate, the concave surface is positioned on two sides of the bottom of the silicon substrate and is parallel to the convex surface, two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface, the epitaxial structure is positioned on the convex surface and the Si (111) surfaces and sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the silicon substrate, the P-type layer is close to the bottom of a grid electrode and only exists in a region below the grid electrode, the AlGaN/GaN high electron mobility transistor is turned off by exhausting two-dimensional electron gas below the grid electrode to form a normally closed structure, the drain electrode is arranged, and the source electrode is positioned on the AlGaN barrier layer on the convex surface, and the gate electrode is arranged on the P-type layer and positioned between the drain ohmic contact metal layer and the source electrode.

The silicon substrate has a resistivity of 10 Ω · cm or less, and the silicon substrate has a convex surface which is one of a Si (110) surface, a Si (112) surface, a Si (113) surface, a Si (114) surface, a Si (115) surface, a Si (116) surface, a Si (117) surface, a Si (221) surface, a Si (331) surface, a Si (551) surface, and a Si (661) surface.

Furthermore, the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer and is 100-500 nm thick, the AlGaN barrier layer is Al_xGa_1-xThe thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element.

A manufacturing method of a normally-off type silicon substrate AlGaN/GaN high electron mobility transistor comprises the following steps:

(1) providing a silicon substrate with a resistivity of 10 omega cm or less, wherein the crystal plane of the silicon substrate is one of a Si (110) plane, a Si (112) plane, a Si (113) plane, a Si (114) plane, a Si (115) plane, a Si (116) plane, a Si (117) plane, a Si (221) plane, a Si (331) plane, a Si (551) plane and a Si (661) plane, and the front surface of the silicon substrate is partially formed with SiO by a photolithography and etching technique₂Etching the mask;

(2) to the formation of SiO₂Selectively etching the front surface of the silicon substrate with the etching mask, and removing SiO₂Etching the mask to form a front surface of the silicon substrate with a convex surface, a concave surface and a convex surfaceThe profile of two lateral Si (111) surfaces, wherein the convex surface is located at the uppermost part of the front surface of the silicon substrate and is formed by SiO in the selective etching process₂In the area protected by the corrosion mask, the concave surface and the two Si (111) surfaces are new surfaces formed by selective corrosion, the concave surface is positioned at the bottom of the silicon substrate and is parallel to the convex surface, and two ends of the two Si (111) surfaces are respectively intersected with the convex surface and the concave surface;

(3) growing SiO on the convex surface, the concave surface and the Si (111) surface of the front surface of the silicon substrate₂And removing SiO on the convex surface and the Si (111) surface by photoetching technology₂Retention of SiO on the concave surface₂Formation of SiO₂Growing a mask;

(4) selectively growing an epitaxial structure on the convex surface and the Si (111) surface of the front surface of the silicon substrate, wherein the epitaxial structure sequentially comprises a buffer layer, a high-resistance layer, a GaN channel layer, an AlGaN barrier layer and a P-type layer from the silicon substrate, and simultaneously can be on the SiO layer of the front surface of the silicon substrate₂Forming a polycrystalline epitaxial film above the growth mask, wherein the high-resistance layer is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer is 1-10 mu m, the GaN channel layer is an unintentionally doped GaN layer with the thickness of 100-500 nm, and the AlGaN barrier layer is Al_xGa_1-xThe thickness of the N layer is 10-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer is P-GaN doped with Mg element or P-AlGaN doped with Mg element;

(5) etching to remove SiO on the front surface of the silicon substrate₂Growing a polycrystalline epitaxial film formed over the mask, and then removing the SiO₂Growing a mask;

(6) etching off the P-type layer of the region outside the gate electrode to be manufactured by a photoetching technology;

(7) growing a passivation layer on the concave surface and the epitaxial structure;

(8) etching the passivation layer at the position of the ohmic contact metal layer of the source electrode and the drain electrode to be manufactured by utilizing a photoetching technology;

(9) manufacturing a source electrode and a drain ohmic contact metal layer by utilizing a stripping technology, so that the drain ohmic contact metal layer is electrically connected between the concave surface and the AlGaN barrier layer, and the source electrode is positioned on the AlGaN barrier layer on the convex surface;

(10) etching the passivation layer above the P-type layer by using a photoetching technology, and then manufacturing a grid electrode by using a stripping technology;

(11) and manufacturing a drain electrode on the back of the silicon substrate.

Compared with the prior art, the invention has the following beneficial effects:

compared with the conventional AlGaN/GaN high electron mobility transistor with the silicon substrate planar structure, the structure provided by the invention has the advantages that the source electrode and the drain electrode are arranged at the upper side and the lower side of the device, so that the problems that the planar structure can generate a current collapse effect under the condition of large grid bias voltage or high frequency, can generate a self-heating effect when working in a high-temperature and high-power environment and the like can be solved.

According to the invention, the selective silicon substrate is adopted for epitaxial growth, so that the AlGaN/GaN epitaxial layer on the silicon substrate is divided into mutually independent small patterns, the stress accumulation between the silicon substrate and the AlGaN/GaN epitaxial layer is greatly reduced, the problems of cracking, bending and the like of an epitaxial film are solved, and the manufacturing yield and reliability of the device can be improved.

Drawings

FIG. 1 is a schematic cross-sectional view of a normally-off AlGaN GaN HEMT of the present invention.

Fig. 2 is a schematic view of step 1 of a method for manufacturing a normally-off silicon substrate AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 3 is a schematic diagram of step 2 of a method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 4 is a schematic diagram of step 3 of a method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 5 is a schematic diagram of step 4 of a method for manufacturing a normally-off silicon substrate AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 6 is a schematic diagram of step 5 of a method for manufacturing a normally-off silicon substrate AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Fig. 7 is a schematic diagram of step 6 of a method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 8 is a schematic diagram of step 7 of a method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 9 is a schematic view of step 8 of a method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 10 is a schematic diagram of step 9 of the method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 11 is a schematic view of step 10 of a method for manufacturing an AlGaN GaN high electron mobility transistor with a normally-off silicon substrate according to embodiment 1 of the present invention.

Fig. 12 is a schematic view of step 11 of a method for manufacturing a normally-off silicon-substrate AlGaN GaN high electron mobility transistor according to embodiment 1 of the present invention.

Illustration of the drawings: 100-silicon substrate, 101-convex surface of front surface of silicon substrate, 102-concave surface of front surface of silicon substrate, 103- (111) surface of front surface of silicon substrate, 104-SiO₂Etching mask, 105-SiO₂The method comprises the following steps of growing a mask, 200-an epitaxial structure, 201-a buffer layer, 202-a high-resistance layer, 203-a GaN channel layer, 204-an AlGaN barrier layer, 205-a P type layer, 206-a polycrystalline epitaxial film, 300-a passivation layer, 400-a source electrode, 500-a drain ohmic contact metal layer, 600-a gate electrode and 700-a drain electrode.

Detailed Description

The invention is further described below with reference to the figures and examples.

Example 1:

fig. 1 shows a normally-off AlGaN/GaN high electron mobility transistor with a silicon substrate according to the present invention, which includes a silicon substrate 100, an epitaxial structure 200, a drain electrode 700, a drain ohmic contact metal layer 500, a passivation layer 300, a source electrode 400, and a gate electrode 600, and is characterized in that: the front surface of the silicon substrate 100 consists of a convex surface 101, a concave surface 102 and two Si (111) surfaces 103 positioned on two sides of the convex surface 101, wherein the convex surface 101 is positioned at the uppermost part of the front surface of the silicon substrate 100 and is parallel to the back surface of the silicon substrate 100, the concave surface 102 is positioned at the bottom of the silicon substrate 100 and is parallel to the convex surface 101, two ends of the two Si (111) surfaces are respectively intersected with the convex surface 101 and the concave surface 102 by 103, the epitaxial structure 200 is positioned on the convex surface 101 and the Si (111) surfaces 103 and sequentially comprises a buffer layer 201, a high resistance layer 202, a GaN channel layer 203, an AlGaN barrier layer 204 and a P-type layer 205 from the silicon substrate 100, the P-type layer 205 is close to the bottom of a gate electrode 600 and only exists in the area below the gate electrode 600, the AlGaN/GaN high electron mobility transistor is turned off by exhausting two-dimensional electron gas below the gate electrode 600 to form a normally-closed, the drain ohmic contact metal layer 500 is electrically connected between the concave surface 102 and the AlGaN barrier layer 204 and is conducted with the drain electrode 700 through the silicon substrate 100, the source electrode 400 is located on the AlGaN barrier layer 204 on the convex surface 101, and the gate electrode 600 is located on the P-type layer 205 and between the drain ohmic contact metal layer 500 and the source electrode 400.

The silicon substrate 100 has a resistivity of 10 Ω · cm or less, and the silicon substrate convex surface 101 is one of a Si (110) surface, a Si (112) surface, a Si (113) surface, a Si (114) surface, a Si (115) surface, a Si (116) surface, a Si (117) surface, a Si (221) surface, a Si (331) surface, a Si (551) surface, and a Si (661) surface.

The high-resistance layer 202 is one or a combination of GaN doped with C elements, GaN doped with Fe elements, AlGaN doped with C elements or AlGaN doped with Fe elements, the thickness of the high-resistance layer 202 is 1-10 mu m, the GaN channel layer 203 is an unintentionally doped GaN layer with the thickness of 100-500 nm, the AlGaN barrier layer 204 is Al_xGa_1-xThe thickness of the N layer is 10 nm-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer 205 is P-GaN doped with Mg element or P-AlGaN doped with Mg element.

A manufacturing method of a normally-off type silicon substrate AlGaN/GaN high electron mobility transistor comprises the following steps:

(1) as shown in FIG. 2, a silicon substrate 100 having a resistivity of 10. omega. cm or less is provided, and the crystal plane of the silicon substrate 100 is a Si (110) plane, a Si (112) plane, a Si (113) plane, a Si (114) plane, a Si (115) plane, a Si (116) plane, a Si (117) plane, a Si (221) plane, a Si (331) plane, a Si (551) plane, a Si (115) plane, a Si (116) plane, a Si (117) plane, a Si (221) plane, a Si (331)661) One of the surfaces, forming SiO locally on the front surface of the silicon substrate 100 by using the photolithography and etching technique₂Etching the mask 104;

(2) for the formation of SiO as shown in FIG. 3₂The front surface of the silicon substrate 100 of the etching mask 104 is selectively etched, and then SiO is removed₂Etching the mask 104 to form a profile composed of a convex surface 101, a concave surface 102 and two Si (111) surfaces 103 on both sides of the convex surface 101 on the front surface of the silicon substrate 100, wherein the convex surface 101 is positioned on the uppermost portion of the front surface of the silicon substrate 100 and is SiO etched in a selective etching process₂In the region protected by the etching mask 104, the concave surface 102 and the two Si (111) surfaces 103 are new surfaces formed by selective etching, the concave surface 102 is positioned at the bottom of the silicon substrate 100 and is parallel to the convex surface 101, and two ends of the two Si (111) surfaces 103 are respectively intersected with the convex surface 101 and the concave surface 102;

(3) as shown in FIG. 4, SiO is grown on the convex surface 101, the concave surface 102 and the Si (111) surface 103 of the front surface of the silicon substrate 100₂And removing SiO on the convex surface 101 and the Si (111) surface 103 by photolithography etching technique₂SiO on the concave surface 102 is remained₂Formation of SiO₂Growing a mask 105;

(4) as shown in fig. 5, an epitaxial structure 200 is selectively grown on the convex surface 101 and the Si (111) surface 103 of the front surface of the silicon substrate 100, and the epitaxial structure 200 includes, in order from the silicon substrate 100, a buffer layer 201, a high resistance layer 202, a GaN channel layer 203, an AlGaN barrier layer 204, and a P-type layer 205, and at the same time, is formed on the SiO layer of the front surface of the silicon substrate 100₂Forming a polycrystalline epitaxial film 206 on the growth mask 105, wherein the high-resistance layer 202 can be one or a combination of GaN doped with C element, GaN doped with Fe element, AlGaN doped with C element or AlGaN doped with Fe element, the thickness of the high-resistance layer 202 is 1-10 μm, the GaN channel layer 203 is an unintentionally doped GaN layer with a thickness of 100-500 nm, and the AlGaN barrier layer 204 is Al_xGa_1-xThe thickness of the N layer is 10 nm-30 nm, wherein x is more than or equal to 0.1 and less than or equal to 0.5, and the P-type layer 205 is P-GaN doped with Mg element or P-AlGaN doped with Mg element;

(5) etching to remove SiO on the front surface of the silicon substrate 100, as shown in FIG. 6₂The polycrystalline epitaxial film 206 formed over the mask 105 is grown and then removedSiO₂Growing a mask 105;

(6) as shown in fig. 7, the P-type layer 205 outside the region where the gate electrode 600 is to be formed is etched away by a photolithography and etching technique;

(7) as shown in fig. 8, a passivation layer 300 is grown;

(8) as shown in fig. 9, the passivation layer 300 at the position where the source electrode 400 and the drain ohmic contact metal layer 500 are to be formed is etched away by using a photolithography and etching technique;

(9) as shown in fig. 10, a source electrode 400 and a drain ohmic contact metal layer 500 are formed by a lift-off technique, such that the drain ohmic contact metal layer 500 is electrically connected between the concave surface 102 and the AlGaN barrier layer 204, and the source electrode 400 is located on the AlGaN barrier layer 204 on the convex surface 101;

(10) as shown in fig. 11, the passivation layer 300 above the P-type layer 205 is etched away by using a photolithography and etching technique, and then a gate electrode 600 is formed above the P-type layer 205 by using a lift-off technique;

(11) as shown in fig. 12, a drain electrode 700 is formed on the back surface of the silicon substrate 100.