Clock source conversion distribution method and system

文档序号：923337 发布日期：2021-03-02 浏览：25次中文

阅读说明：本技术 一种时钟源转换分配方法及系统 (Clock source conversion distribution method and system ) 是由陈功于 2021-01-27 设计创作，主要内容包括：本发明涉及集成电路芯片技术领域,具体涉及一种时钟源转换分配方法及系统。本发明由于分别在时钟产生设备侧以及授时设备侧部署了异步时钟源转换模型,且不同的异步时钟源转换模型是基于历史时钟延时信息集、历史时钟补偿信息集以及预设模型训练指标训练得到的,因而能够通过两个不同的异步时钟源转换模型将不同授时设备的时钟延时和时钟补偿考虑在内,不仅可以确保授时设备对待转换时钟信号的准确的时钟状态识别,还能够确保针对时钟状态识别所确定的待转换时钟信号的时钟源分配结果,可以依据时钟源分配结果为不同的授时设备进行时钟源的转换和分配,提高时钟源转换和分配的准确性和可靠性,确保包不同的授时设备的时钟信号的全局同步性。(The invention relates to the technical field of integrated circuit chips, in particular to a clock source conversion and distribution method and a clock source conversion and distribution system. As the asynchronous clock source conversion models are respectively arranged at the clock generation equipment side and the time service equipment side, and different asynchronous clock source conversion models are obtained by training based on historical clock delay information sets, historical clock compensation information sets and preset model training indexes, therefore, the clock delay and the clock compensation of different time service devices can be taken into account through two different asynchronous clock source conversion models, not only can the accurate clock state identification of the clock signal to be converted by the time service devices be ensured, but also the clock source distribution result of the clock signal to be converted determined aiming at the clock state identification can be ensured, the clock source conversion and distribution can be carried out on different time service equipment according to the clock source distribution result, the accuracy and the reliability of the clock source conversion and distribution are improved, and the global synchronism of the clock signals of the different time service equipment is ensured.)

1. A clock source conversion distribution method is applied to a clock generation device which is communicated with a time service device, and the method comprises the following steps:

acquiring a historical clock delay information set and a historical clock compensation information set;

training a preset clock delay detection model by adopting the historical clock delay information set to obtain a trained clock delay detection model; performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock deviation information set;

training a preset asynchronous clock source conversion model aiming at the clock generation equipment by adopting the historical clock deviation information set to obtain the trained asynchronous clock source conversion model aiming at the clock generation equipment;

training a preset asynchronous clock source conversion model aiming at the time service equipment based on a preset model training index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain a trained asynchronous clock source conversion model aiming at the time service equipment;

the method comprises the steps of issuing a trained asynchronous clock source conversion model aiming at time service equipment to the time service equipment, carrying out clock state recognition on a clock signal to be converted through the time service equipment and the trained asynchronous clock source conversion model aiming at the time service equipment to obtain a clock state recognition result, and determining a clock source distribution result of the clock signal to be converted based on the clock state recognition result.

2. The method according to claim 1, wherein training a preset asynchronous clock source conversion model for the time service device based on a preset model training index and the trained asynchronous clock source conversion model for the clock generation device to obtain the trained asynchronous clock source conversion model for the time service device comprises:

training a preset asynchronous clock source conversion model aiming at the time service equipment based on the current model compatibility index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain a trained asynchronous clock source conversion model aiming at the time service equipment;

the method includes the following steps that a preset asynchronous clock source conversion model aiming at time service equipment is trained based on a current model compatibility index and the trained asynchronous clock source conversion model aiming at the clock generation equipment, and the trained asynchronous clock source conversion model aiming at the time service equipment is obtained, and the method includes the following steps:

and after the mth training, when the compatibility of the current model compatibility index is within the set compatibility range, determining the asynchronous clock source conversion model for the time service equipment obtained after the mth training as the asynchronous clock source conversion model for the time service equipment after the mth training.

3. The method according to claim 1, wherein training a preset asynchronous clock source conversion model for a clock generation device by using the historical clock bias information set to obtain the trained asynchronous clock source conversion model for the clock generation device comprises:

performing iterative training on a preset asynchronous clock source conversion model aiming at the clock generation equipment by adopting the historical clock deviation information set, and determining the asynchronous clock source conversion model aiming at the clock generation equipment after the nth training as the trained asynchronous clock source conversion model aiming at the clock generation equipment under the condition that a clock state identification evaluation coefficient obtained by performing clock state identification on the test clock information set by adopting the asynchronous clock source conversion model aiming at the clock generation equipment after the nth training is larger than a set evaluation coefficient; wherein n is a positive integer.

4. The method according to claim 1, wherein performing clock state recognition on the clock signal to be converted through the time service device and the trained asynchronous clock source conversion model for the time service device to obtain a clock state recognition result, and determining a clock source distribution result of the clock signal to be converted based on the clock state recognition result, comprises:

enabling the time service equipment to extract a clock signal to be decoded corresponding to the target time period of the clock signal to be converted based on the trained asynchronous clock source conversion model aiming at the time service equipment; wherein the target period is a period in which the clock signal to be converted is not marked by a clock generation device;

acquiring the clock signal to be decoded uploaded by the time service equipment;

searching a target clock source distribution result matched with the clock signal to be decoded in a pre-stored signal set, and determining the target clock source distribution result as a clock source distribution result of the clock signal to be converted.

5. The method of claim 4, wherein searching a pre-stored signal set for a target clock source distribution result matching the clock signal to be decoded comprises:

performing signal decoding on the clock signal to be decoded to obtain a plurality of signal segments; acquiring segment time sequence description information of a plurality of signal segments and n compensation time delay signal segment sets corresponding to n continuous clock state identification periods of the plurality of signal segments before a current clock state identification period, wherein the compensation time delay signal segment set of each clock state identification period comprises compensation time delay signal segments of the signal segments under a plurality of clock asynchronous state categories;

respectively acquiring a signal quality coefficient error set corresponding to each compensation time delay signal segment set in n compensation time delay signal segment sets of each signal segment; wherein each set of signal quality coefficient errors comprises signal quality coefficient errors of the signal segment in a plurality of clock asynchronous state classes, each signal quality coefficient error representing a comparison result between a real-time signal quality coefficient and a delayed signal quality coefficient in one clock asynchronous state class;

acquiring a signal quality coefficient error of each signal segment in a current clock state identification period according to segment timing description information of each signal segment and n signal quality coefficient error sets corresponding to the n compensation time delay signal segment sets by using a trained signal quality coefficient correction model; the signal quality coefficient correction model is obtained by training a plurality of model training samples, and each model training sample comprises fragment time sequence description information of a signal fragment and a signal quality coefficient error set of n +1 continuous clock state identification periods; the signal quality coefficient error represents a comparison result between a real-time signal quality coefficient and a delayed signal quality coefficient of a signal segment;

respectively correcting the real-time signal quality coefficients of the signal segments through the signal quality coefficient errors of the signal segments in the current clock state identification period; determining a target signal segment from the plurality of signal segments according to the real-time signal quality coefficient corrected by each signal segment, and performing signal correction on the clock signal to be decoded according to the target signal segment to obtain a signal to be matched for performing clock source matching;

searching a pre-stored clock signal with the minimum similarity to the signal to be matched in a pre-stored signal set, and determining that a global clock source distribution result of the pre-stored clock signal is a target clock source distribution result matched with the clock signal to be decoded;

the signal quality coefficient correction model is obtained by training through the following training process: obtaining a set number of model training samples from a model training sample library; training the signal quality coefficient correction model for multiple times according to set training parameters through the obtained model training sample, wherein each training process comprises the following steps:

according to the fragment time sequence description information and the signal quality coefficient error sets of the first n clock state identification periods in the n +1 continuous clock state identification periods, acquiring the signal quality coefficient error of the signal fragment of each model training sample in the (n + 1) th clock state identification period through the signal quality coefficient correction model;

acquiring a model evaluation index of the signal quality coefficient correction model according to a signal quality coefficient error of a signal segment of the model training sample in the (n + 1) th clock state identification period and a signal quality coefficient error set of the model training sample in the (n + 1) th clock state identification period;

determining whether to continue training the signal quality coefficient correction model according to the model evaluation index; if the signal quality coefficient correction model is determined to be trained continuously, adjusting model parameters of the signal quality coefficient correction model, and continuing the next training process through the adjusted signal quality coefficient correction model;

wherein, the signal quality coefficient correction model includes a signal timeliness processing layer and a signal quality processing layer, and then for each signal segment, the signal quality coefficient error is obtained by using the signal quality coefficient correction model, which includes:

according to the n signal quality coefficient error sets, acquiring a signal timeliness index of a signal segment through the signal timeliness processing layer;

acquiring a signal quality index of a signal segment through the signal quality processing layer according to the segment time sequence description information;

and obtaining a signal quality coefficient error in the current clock state identification period according to the signal timeliness index and the signal quality index based on the model transmission information of the signal timeliness processing layer and the signal quality processing layer.

6. The method of claim 1, wherein performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock bias information set comprises:

acquiring pulse trigger time sequence distribution information and each pulse trigger signal of the historical clock compensation information aiming at each historical clock compensation information in the historical clock compensation information set;

under the condition that the historical clock compensation information contains an active clock delay identification based on the pulse trigger time sequence distribution information, determining the signal matching degree between each pulse trigger signal corresponding to the passive clock delay identification of the historical clock compensation information and each pulse trigger signal corresponding to the active clock delay identification of the historical clock compensation information according to the pulse trigger signal corresponding to the active clock delay identification of the historical clock compensation information and the signal clock state identification weight of the pulse trigger signal, and configuring the pulse trigger signal corresponding to the passive clock delay identification of the historical clock compensation information and associated with the pulse trigger signal corresponding to the active clock delay identification; under the condition that the current passive clock delay identification of the historical clock compensation information correspondingly comprises a plurality of pulse trigger signals, determining the signal matching degree between the pulse trigger signals corresponding to the current passive clock delay identification of the historical clock compensation information according to the pulse trigger signals corresponding to the active clock delay identification of the historical clock compensation information and the signal clock state identification weight thereof, and performing signal weighting on the pulse trigger signals corresponding to the current passive clock delay identification according to the signal matching degree between the pulse trigger signals; setting a signal configuration label for a pulse trigger weighted signal obtained by weighting the signal according to a pulse trigger signal corresponding to an active clock delay identifier of the historical clock compensation information and a signal clock state identification weight thereof, and configuring the pulse trigger weighted signal to the active clock delay identifier according to the signal configuration label;

determining historical clock deviation information based on a target pulse trigger signal in an active clock delay identification corresponding to the historical clock compensation information, and integrating the determined historical clock deviation information to obtain a historical clock deviation information set; wherein the historical clock deviation information is historical path clock information;

wherein, the determining the signal matching degree between each pulse trigger signal corresponding to the passive clock delay identifier of the historical clock compensation information and each pulse trigger signal corresponding to the active clock delay identifier of the historical clock compensation information according to the pulse trigger signal corresponding to the active clock delay identifier of the historical clock compensation information and the signal clock state identification weight thereof, and configuring the pulse trigger signal corresponding to the passive clock delay identifier of the historical clock compensation information and associated with the pulse trigger signal corresponding to the active clock delay identifier comprises:

calculating real-time matching parameters between each pulse trigger signal corresponding to the passive clock delay identification of the historical clock compensation information and the signal description information of each pulse trigger signal corresponding to the active clock delay identification of the historical clock compensation information;

respectively judging whether each real-time matching parameter reaches a first set matching parameter threshold value, and configuring a pulse trigger signal corresponding to a passive clock delay identifier of which the real-time matching parameter reaches the first set matching parameter threshold value to the active clock delay identifier; wherein, the signal description information of the pulse trigger signal is: counting the statistical results of the pulse trigger signals and the signal configuration labels according to the pulse trigger signals corresponding to the active clock delay identification of the historical clock compensation information and the signal clock state identification weights of the pulse trigger signals;

determining a signal matching degree between pulse trigger signals corresponding to a current passive clock delay identifier of the historical clock compensation information according to the pulse trigger signals corresponding to the active clock delay identifier of the historical clock compensation information and the signal clock state identification weight thereof, and performing signal weighting on the pulse trigger signals corresponding to the current passive clock delay identifier according to the signal matching degree between the pulse trigger signals comprises:

calculating real-time matching parameters among signal description information of each pulse trigger signal corresponding to the current passive clock delay identification of the historical clock compensation information; and for a pulse trigger signal corresponding to the current passive clock delay identifier of the historical clock compensation information, performing signal weighting on the pulse trigger signal and all pulse trigger signals of which the real-time matching parameters between the pulse trigger signal and the signal description information reach a second set matching parameter threshold value to obtain a group of pulse trigger weighted signals.

7. A clock source conversion distribution system is characterized by comprising a clock generating device and a time service device which are communicated with each other;

the clock generation apparatus is configured to:

acquiring a historical clock delay information set and a historical clock compensation information set;

8. The system according to claim 7, wherein the clock generation device trains a preset asynchronous clock source conversion model for the clock generation device by using the historical clock deviation information set to obtain the trained asynchronous clock source conversion model for the clock generation device, including:

9. The system according to claim 7, wherein the clock generating device trains a preset asynchronous clock source conversion model for the time service device based on a preset model training index and the trained asynchronous clock source conversion model for the clock generating device to obtain the trained asynchronous clock source conversion model for the time service device, including:

10. The system of claim 7, wherein performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock bias information set comprises:

Technical Field

The invention relates to the technical field of integrated circuit chips, in particular to a clock source conversion and distribution method and a clock source conversion and distribution system.

Background

With the development of science and technology, interaction between various electronic devices is more and more frequent, and different reference clocks of different electronic devices (for example, some signal generators or signal instruments) may cause clock source confusion under some cooperative operations, so that clock sources of different electronic devices need to be uniformly converted and distributed.

However, in the related clock source conversion and distribution technology, the clock generating device directly performs conversion and distribution of the clock source for the time service device, so that the clock delay and the clock compensation of the time service device are difficult to be taken into consideration, and thus, the conversion and distribution of the clock source have large deviation.

Disclosure of Invention

In view of this, embodiments of the present invention provide a method and a system for clock source conversion and distribution, which can deploy a machine learning model on a side of a time service device, so as to take clock delay and clock compensation of the time service device into consideration in combination with the machine learning model, and improve accuracy and reliability of clock source conversion and distribution.

The embodiment of the invention provides a clock source conversion and distribution method, which is applied to clock generation equipment communicated with time service equipment, and comprises the following steps:

acquiring a historical clock delay information set and a historical clock compensation information set;

In an alternative embodiment, training a preset asynchronous clock source conversion model for a clock generation device by using the historical clock bias information set to obtain a trained asynchronous clock source conversion model for the clock generation device includes:

In an alternative embodiment, training a preset asynchronous clock source conversion model for a time service device based on a preset model training index and the trained asynchronous clock source conversion model for a clock generation device to obtain the trained asynchronous clock source conversion model for the time service device includes:

In an alternative embodiment, performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock bias information set includes:

In an alternative embodiment, performing clock state recognition on a to-be-converted clock signal through the time service device and the trained asynchronous clock source conversion model for the time service device to obtain a clock state recognition result, and determining a clock source distribution result of the to-be-converted clock signal based on the clock state recognition result includes:

acquiring the clock signal to be decoded uploaded by the time service equipment;

In an alternative embodiment, searching a pre-stored signal set for a target clock source allocation result matching the clock signal to be decoded includes:

according to the n signal quality coefficient error sets, acquiring a signal timeliness index of a signal segment through the signal timeliness processing layer;

acquiring a signal quality index of a signal segment through the signal quality processing layer according to the segment time sequence description information;

The embodiment of the invention also provides a clock source conversion and distribution device, which is applied to clock generation equipment communicated with the time service equipment, and the device comprises:

the information acquisition module is used for acquiring a historical clock delay information set and a historical clock compensation information set;

the information processing module is used for training a preset clock delay detection model by adopting the historical clock delay information set to obtain a trained clock delay detection model; performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock deviation information set;

the global training module is used for training a preset asynchronous clock source conversion model aiming at the clock generation equipment by adopting the historical clock deviation information set to obtain the trained asynchronous clock source conversion model aiming at the clock generation equipment;

the local training module is used for training a preset asynchronous clock source conversion model aiming at the time service equipment based on a preset model training index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain a trained asynchronous clock source conversion model aiming at the time service equipment;

the state identification module is used for issuing a trained asynchronous clock source conversion model aiming at the time service equipment to the time service equipment, carrying out clock state identification on a clock signal to be converted through the time service equipment and the trained asynchronous clock source conversion model aiming at the time service equipment to obtain a clock state identification result, and determining a clock source distribution result of the clock signal to be converted based on the clock state identification result.

The embodiment of the invention also provides a clock source conversion and distribution system, which comprises a clock generation device and a time service device which are communicated with each other;

the clock generation apparatus is configured to:

acquiring a historical clock delay information set and a historical clock compensation information set;

In an alternative embodiment, the training, by the clock generation device, of the preset asynchronous clock source conversion model for the clock generation device by using the historical clock deviation information set to obtain a trained asynchronous clock source conversion model for the clock generation device includes:

In an alternative embodiment, the training, by the clock generation device, a preset asynchronous clock source conversion model for the time service device based on a preset model training index and the trained asynchronous clock source conversion model for the clock generation device to obtain the trained asynchronous clock source conversion model for the time service device includes:

The embodiment of the invention also provides clock generation equipment, which comprises a processor, a communication bus and a memory; the processor and the memory communicate through the communication bus, and the processor reads the computer program from the memory and runs the computer program to realize the method.

Embodiments of the present invention also provide a readable storage medium, on which a computer program is stored, which when executed performs the above method.

The clock source conversion distribution method and the clock source conversion distribution system provided by the embodiment of the invention have the following technical effects: firstly, training a preset clock delay detection model by using a historical clock delay information set to obtain a trained clock delay detection model and carrying out clock delay detection on a historical clock compensation information set to obtain a historical clock deviation information set, secondly, training a preset asynchronous clock source conversion model aiming at clock generation equipment by using the historical clock deviation information set to obtain a trained asynchronous clock source conversion model aiming at the clock generation equipment, and training the preset asynchronous clock source conversion model aiming at time service equipment on the basis of a preset model training index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain a trained asynchronous clock source conversion model aiming at the time service equipment, so that the trained asynchronous clock source conversion model aiming at the time service equipment can be issued to the time service equipment, and the clock signals to be converted are carried out on the time service equipment through the time service equipment and the trained asynchronous clock source conversion model aiming at the time service equipment And identifying the clock state to obtain a clock state identification result, and determining a clock source distribution result of the clock signal to be converted based on the clock state identification result.

Due to the design, as the asynchronous clock source conversion models are respectively arranged at the clock generation equipment side and the time service equipment side, and different asynchronous clock source conversion models are obtained by training based on historical clock delay information sets, historical clock compensation information sets and preset model training indexes, therefore, the clock delay and the clock compensation of different time service devices can be taken into account through two different asynchronous clock source conversion models, not only can the accurate clock state identification of the clock signal to be converted by the time service devices be ensured, but also the clock source distribution result of the clock signal to be converted determined aiming at the clock state identification can be ensured, therefore, the conversion and distribution of the clock source can be carried out on different time service equipment according to the clock source distribution result, the accuracy and the reliability of the conversion and the distribution of the clock source are improved, and the global synchronism of the clock signals of different time service equipment is ensured.

In the description that follows, additional features will be set forth, in part, in the description. These features will be in part apparent to those skilled in the art upon examination of the following and the accompanying drawings, or may be learned by production or use. The features of the present application may be realized and attained by practice or use of various aspects of the methodologies, instrumentalities and combinations particularly pointed out in the detailed examples that follow.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.

Fig. 1 is a block diagram of a clock generating apparatus according to an embodiment of the present invention.

Fig. 2 is a flowchart of a clock source conversion and allocation method according to an embodiment of the present invention.

Fig. 3 is a block diagram of a clock source conversion and distribution apparatus according to an embodiment of the present invention.

Fig. 4 is an architecture diagram of a clock source conversion distribution system according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

The above prior art solutions have shortcomings which are the results of practical and careful study of the inventor, and therefore, the discovery process of the above problems and the solutions proposed by the following embodiments of the present invention to the above problems should be the contribution of the inventor to the present invention in the course of the present invention.

Based on the above research, the embodiment of the present invention provides a clock source conversion and distribution method and system.

Fig. 1 shows a block schematic diagram of a clock generation apparatus 10 according to an embodiment of the present invention. The clock generation device 10 in the embodiment of the present invention may be a clock generation device having data storage, transmission, and processing functions, as shown in fig. 1, the clock generation device 10 includes: memory 11, processor 12, communication bus 13 and clock source conversion distribution device 20.

The memory 11, processor 12 and communication bus 13 are electrically connected, directly or indirectly, to enable the transfer or interaction of data. For example, the components may be electrically connected to each other via one or more communication buses or signal lines. The memory 11 stores therein a clock source conversion and distribution device 20, the clock source conversion and distribution device 20 includes at least one software functional module which can be stored in the memory 11 in the form of software or firmware (firmware), and the processor 12 executes various functional applications and data processing by running software programs and modules stored in the memory 11, such as the clock source conversion and distribution device 20 in the embodiment of the present invention, so as to implement the clock source conversion and distribution method in the embodiment of the present invention.

The memory 11 may be, but is not limited to, a Random Access Memory (RAM), a Read Only Memory (ROM), a programmable read-only memory (PROM), an erasable read-only memory (EPROM), an electrically erasable read-only memory (EEPROM), and the like. The memory 11 is used for storing a program, and the processor 12 executes the program after receiving an execution instruction.

The processor 12 may be an integrated circuit chip having data processing capabilities. The processor 12 may be a general-purpose processor including a Central Processing Unit (CPU), a network processor (nP), and the like. The various methods, steps and logic blocks disclosed in embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The communication bus 13 is used for communication connection between the network generated clock generating apparatus 10 and other communication terminal apparatuses, and realizes transmission and reception operations of network signals and data. The network signal may include a wireless signal or a wired signal.

It will be appreciated that the configuration shown in fig. 1 is merely illustrative and that clock generation apparatus 10 may include more or fewer components than shown in fig. 1 or may have a different configuration than shown in fig. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.

The embodiment of the invention also provides a readable storage medium for a computer, wherein the readable storage medium stores a computer program, and the computer program realizes the method when running.

Fig. 2 is a flowchart illustrating a clock source conversion allocation method according to an embodiment of the present invention. The method steps defined by the flow related to the method are applied to the clock generation device 10 and can be implemented by the processor 12, and the method comprises the following segments described in steps S21-S25.

In step S21, a historical clock delay information set and a historical clock compensation information set are obtained. In the embodiment of the application, the historical clock delay information set and the historical clock compensation information set are used for calculating the correlation model.

Step S22, training a preset clock delay detection model by using the historical clock delay information set to obtain a trained clock delay detection model; and performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock deviation information set.

In this embodiment, the preset clock delay detection model may be a neural network model, and the training method thereof is not described herein. In order to identify the clock status as accurately as possible to obtain the historical clock bias information, the clock delay detection performed on the historical clock compensation information set by the trained clock delay detection model described in step S22 to obtain the historical clock bias information set can be obtained through the following steps S221 to S223.

Step S221, for each historical clock compensation information in the historical clock compensation information set, obtaining pulse trigger timing distribution information of the historical clock compensation information and each pulse trigger signal.

In this embodiment, the pulse trigger timing distribution information may be used to describe the relative timing between different pulse triggers in the historical clock compensation information, and the pulse trigger signal may be used to characterize the signal strength, signal frequency, and the like of the pulse trigger, which is not limited herein.

Step S222, under the condition that the historical clock compensation information contains the active clock delay identification based on the pulse trigger time sequence distribution information, determining the signal matching degree between each pulse trigger signal corresponding to the passive clock delay identification of the historical clock compensation information and each pulse trigger signal corresponding to the active clock delay identification of the historical clock compensation information according to the pulse trigger signal corresponding to the active clock delay identification of the historical clock compensation information and the signal clock state identification weight thereof, and configuring the pulse trigger signal corresponding to the passive clock delay identification of the historical clock compensation information and associated with the pulse trigger signal corresponding to the active clock delay identification; under the condition that the current passive clock delay identification of the historical clock compensation information correspondingly comprises a plurality of pulse trigger signals, determining the signal matching degree between the pulse trigger signals corresponding to the current passive clock delay identification of the historical clock compensation information according to the pulse trigger signals corresponding to the active clock delay identification of the historical clock compensation information and the signal clock state identification weight thereof, and performing signal weighting on the pulse trigger signals corresponding to the current passive clock delay identification according to the signal matching degree between the pulse trigger signals; and setting a signal configuration label for the pulse trigger weighted signal obtained by weighting the signal according to the pulse trigger signal corresponding to the active clock delay identifier of the historical clock compensation information and the signal clock state identification weight thereof, and configuring the pulse trigger weighted signal to the active clock delay identifier according to the signal configuration label.

In this embodiment, the active clock delay identifier and the passive clock delay identifier are different types of identifiers, the signal clock state identification weight is used to represent the signal clock state identification degree of the pulse trigger signal, and the higher the signal clock state identification weight is, the higher the signal clock state identification degree of the pulse trigger signal is. The signal configuration tag is configured to characterize a time interval adjustment priority of the pulse trigger weighting signal, and configuring the pulse trigger weighting signal to the active clock delay identifier according to the signal configuration tag may be: and configuring the time interval adjustment priority corresponding to the signal configuration label to the active clock delay identifier according to the partial pulse trigger weighting signals corresponding to the descending order.

In some possible embodiments, the determining, according to the pulse trigger signal corresponding to the active clock delay identifier of the historical clock compensation information and the signal clock state identification weight thereof, the signal matching degree between each pulse trigger signal corresponding to the passive clock delay identifier of the historical clock compensation information and each pulse trigger signal corresponding to the active clock delay identifier of the historical clock compensation information, and configuring the pulse trigger signal corresponding to the passive clock delay identifier of the historical clock compensation information and associated with the pulse trigger signal corresponding to the active clock delay identifier may be implemented by: calculating real-time matching parameters between each pulse trigger signal corresponding to the passive clock delay identification of the historical clock compensation information and the signal description information of each pulse trigger signal corresponding to the active clock delay identification of the historical clock compensation information; respectively judging whether each real-time matching parameter reaches a first set matching parameter threshold value, and configuring a pulse trigger signal corresponding to a passive clock delay identifier of which the real-time matching parameter reaches the first set matching parameter threshold value to the active clock delay identifier; wherein, the signal description information of the pulse trigger signal is: and counting the statistical results of the pulse trigger signals and the signal configuration labels according to the pulse trigger signals corresponding to the active clock delay identification of the historical clock compensation information and the signal clock state identification weight of the pulse trigger signals.

Step S223, determining historical clock deviation information based on the target pulse trigger signal in the active clock delay identification corresponding to the historical clock compensation information, and integrating the determined historical clock deviation information to obtain a historical clock deviation information set; wherein the historical clock deviation information is historical path clock information.

By such design, based on the segments described in the above steps S221 to S223, the pulse trigger signals in the active clock delay identifier and the passive clock delay identifier can be reconfigured, so that the clock state can be recognized as accurately as possible to obtain the historical clock deviation information.

And step S23, training a preset asynchronous clock source conversion model aiming at the clock generation equipment by using the historical clock deviation information set to obtain the trained asynchronous clock source conversion model aiming at the clock generation equipment.

In this embodiment, the asynchronous clock source conversion model for the clock generation device may be understood as a network with a large parameter quantity, that is, a global network, and further, the historical clock bias information set is used to train a preset asynchronous clock source conversion model for the clock generation device to obtain a trained asynchronous clock source conversion model for the clock generation device, which includes: performing iterative training on a preset asynchronous clock source conversion model aiming at the clock generation equipment by adopting the historical clock deviation information set, and determining the asynchronous clock source conversion model aiming at the clock generation equipment after the nth training as the trained asynchronous clock source conversion model aiming at the clock generation equipment under the condition that a clock state identification evaluation coefficient obtained by performing clock state identification on the test clock information set by adopting the asynchronous clock source conversion model aiming at the clock generation equipment after the nth training is larger than a set evaluation coefficient; wherein n is a positive integer. In this embodiment, the set evaluation coefficient may be 90% to 99%, and further, the set evaluation coefficient may be selected to be 95%.

And step S24, training a preset asynchronous clock source conversion model aiming at the time service equipment based on a preset model training index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain the trained asynchronous clock source conversion model aiming at the time service equipment.

In this embodiment, the asynchronous clock source conversion model for the time service device may be understood as a network with a smaller parameter amount, that is, a local network, and further, a preset asynchronous clock source conversion model for the time service device is trained based on a preset model training index and the trained asynchronous clock source conversion model for the clock generation device, so as to obtain the trained asynchronous clock source conversion model for the time service device, which may be implemented in the following manner: and training a preset asynchronous clock source conversion model aiming at the time service equipment based on the current model compatibility index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain the trained asynchronous clock source conversion model aiming at the time service equipment.

Further, training a preset asynchronous clock source conversion model for the time service device based on the current model compatibility index and the trained asynchronous clock source conversion model for the clock generation device to obtain the trained asynchronous clock source conversion model for the time service device, including: and after the mth training, when the compatibility of the current model compatibility index is within the set compatibility range, determining the asynchronous clock source conversion model for the time service equipment obtained after the mth training as the asynchronous clock source conversion model for the time service equipment after the mth training.

Step S25, issuing the trained asynchronous clock source conversion model for the time service equipment to the time service equipment, performing clock state recognition on the clock signal to be converted through the time service equipment and the trained asynchronous clock source conversion model for the time service equipment to obtain a clock state recognition result, and determining the clock source distribution result of the clock signal to be converted based on the clock state recognition result.

In an actual implementation process, the clock state recognition of the to-be-converted clock signal through the time service device and the trained asynchronous clock source conversion model for the time service device described in step S25 is performed to obtain a clock state recognition result, and a clock source distribution result of the to-be-converted clock signal is determined based on the clock state recognition result, which may include the following segments: enabling the time service equipment to extract a clock signal to be decoded corresponding to the target time period of the clock signal to be converted based on the trained asynchronous clock source conversion model aiming at the time service equipment; wherein the target period is a period in which the clock signal to be converted is not marked by a clock generation device; acquiring the clock signal to be decoded uploaded by the time service equipment; searching a target clock source distribution result matched with the clock signal to be decoded in a pre-stored signal set, and determining the target clock source distribution result as a clock source distribution result of the clock signal to be converted.

In some examples, the inventor finds that, in order to ensure the accuracy of clock state identification, the finding of the target clock source distribution result matching the clock signal to be decoded in the pre-stored signal set in the above may include the following steps S251 to S255.

Step S251, performing signal decoding on the clock signal to be decoded to obtain a plurality of signal segments; the method comprises the steps of obtaining segment time sequence description information of a plurality of signal segments and n compensation time delay signal segment sets corresponding to n continuous clock state identification periods of the plurality of signal segments before a current clock state identification period, wherein the compensation time delay signal segment set of each clock state identification period comprises compensation time delay signal segments of the signal segments under a plurality of clock asynchronous state categories.

Step 252, respectively obtaining a signal quality coefficient error set corresponding to each compensation delay signal segment set in the n compensation delay signal segment sets of each signal segment; wherein each set of signal quality coefficient errors comprises signal quality coefficient errors of the signal segment in a plurality of clock asynchronous state classes, each signal quality coefficient error representing a comparison result between a real-time signal quality coefficient and a delayed signal quality coefficient in one clock asynchronous state class.

Step S253, using the trained signal quality coefficient correction model, according to the segment timing description information of each signal segment and n signal quality coefficient error sets corresponding to the n compensation time delay signal segment sets, obtaining the signal quality coefficient error of each signal segment in the current clock state identification period; the signal quality coefficient correction model is obtained by training a plurality of model training samples, and each model training sample comprises fragment time sequence description information of a signal fragment and a signal quality coefficient error set of n +1 continuous clock state identification periods; the signal quality coefficient error represents a comparison between a real-time signal quality coefficient and a delayed signal quality coefficient of the signal segment.

In this embodiment, the signal quality coefficient correction model is obtained by training through the following training process: obtaining a set number of model training samples from a model training sample library; training the signal quality coefficient correction model for multiple times according to set training parameters through the obtained model training sample, wherein each training process comprises the following steps: according to the fragment time sequence description information and the signal quality coefficient error sets of the first n clock state identification periods in the n +1 continuous clock state identification periods, acquiring the signal quality coefficient error of the signal fragment of each model training sample in the (n + 1) th clock state identification period through the signal quality coefficient correction model; acquiring a model evaluation index of the signal quality coefficient correction model according to a signal quality coefficient error of a signal segment of the model training sample in the (n + 1) th clock state identification period and a signal quality coefficient error set of the model training sample in the (n + 1) th clock state identification period; determining whether to continue training the signal quality coefficient correction model according to the model evaluation index; and if the signal quality coefficient correction model is determined to be trained continuously, adjusting the model parameters of the signal quality coefficient correction model, and continuing the next training process through the adjusted signal quality coefficient correction model.

In this embodiment, the signal quality coefficient correction model includes a signal timeliness processing layer and a signal quality processing layer, and for each signal segment, obtaining a signal quality coefficient error by using the signal quality coefficient correction model includes: according to the n signal quality coefficient error sets, acquiring a signal timeliness index of a signal segment through the signal timeliness processing layer; acquiring a signal quality index of a signal segment through the signal quality processing layer according to the segment time sequence description information; and obtaining a signal quality coefficient error in the current clock state identification period according to the signal timeliness index and the signal quality index based on the model transmission information of the signal timeliness processing layer and the signal quality processing layer.

Step S254, correcting the real-time signal quality coefficient of each signal segment through the signal quality coefficient error of each signal segment in the current clock state identification period; and determining a target signal segment from the plurality of signal segments according to the real-time signal quality coefficient corrected by each signal segment, and performing signal correction on the clock signal to be decoded according to the target signal segment to obtain a signal to be matched for performing clock source matching.

Step S255, searching a pre-stored clock signal with the minimum similarity to the to-be-matched signal in a pre-stored signal set, and determining that a global clock source distribution result of the pre-stored clock signal is a target clock source distribution result matched with the to-be-decoded clock signal.

Therefore, by implementing the steps S251 to S255, the clock signal to be decoded can be further analyzed, so that the clock signal to be decoded is subjected to signal correction, a signal to be matched for performing clock source matching is obtained, and a target clock source distribution result for performing clock signal matching on the clock signal to be decoded is determined based on the signal to be matched, so that the accuracy of clock state identification can be ensured as much as possible.

In summary, by implementing the above steps S21-S25, since asynchronous clock source conversion models are respectively deployed on the clock generation device side and the time service device side, and different asynchronous clock source conversion models are obtained by training based on the historical clock delay information set, the historical clock compensation information set, and the preset model training index, the clock delay and the clock compensation of different time service devices can be taken into account by two different asynchronous clock source conversion models, so that not only can the time service device be ensured to identify the accurate clock state of the clock signal to be converted, but also the clock source distribution result of the clock signal to be converted determined by the clock state identification can be ensured, so that the conversion and distribution of the clock source can be performed for different time service devices according to the clock source distribution result, and the accuracy and reliability of the clock source conversion and distribution can be improved, the global synchronism of clock signals of different time service devices is ensured.

Based on the same inventive concept, there is also provided a clock source conversion distribution device 20 as shown in fig. 3, which at least comprises the following functional modules.

And an information obtaining module 21, configured to obtain a historical clock delay information set and a historical clock compensation information set.

The information processing module 22 is configured to train a preset clock delay detection model by using the historical clock delay information set to obtain a trained clock delay detection model; and performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock deviation information set.

Wherein the information processing module 22 is further configured to: acquiring pulse trigger time sequence distribution information and each pulse trigger signal of the historical clock compensation information aiming at each historical clock compensation information in the historical clock compensation information set;

And the global training module 23 is configured to train a preset asynchronous clock source conversion model for the clock generation device by using the historical clock deviation information set, so as to obtain a trained asynchronous clock source conversion model for the clock generation device.

Wherein the global training module 23 is further configured to: performing iterative training on a preset asynchronous clock source conversion model aiming at the clock generation equipment by adopting the historical clock deviation information set, and determining the asynchronous clock source conversion model aiming at the clock generation equipment after the nth training as the trained asynchronous clock source conversion model aiming at the clock generation equipment under the condition that a clock state identification evaluation coefficient obtained by performing clock state identification on the test clock information set by adopting the asynchronous clock source conversion model aiming at the clock generation equipment after the nth training is larger than a set evaluation coefficient; wherein n is a positive integer.

And the local training module 24 is configured to train a preset asynchronous clock source conversion model for the time service device based on a preset model training index and the trained asynchronous clock source conversion model for the clock generation device, so as to obtain the trained asynchronous clock source conversion model for the time service device.

Wherein the local training module 24 is further configured to:

The state identification module 25 is configured to issue a trained asynchronous clock source conversion model for a time service device to the time service device, perform clock state identification on a clock signal to be converted through the time service device and the trained asynchronous clock source conversion model for the time service device to obtain a clock state identification result, and determine a clock source distribution result of the clock signal to be converted based on the clock state identification result.

Wherein, the state identification module 25 is further configured to:

acquiring the clock signal to be decoded uploaded by the time service equipment;

Wherein, the state identification module 25 is further configured to:

according to the n signal quality coefficient error sets, acquiring a signal timeliness index of a signal segment through the signal timeliness processing layer;

acquiring a signal quality index of a signal segment through the signal quality processing layer according to the segment time sequence description information;

Based on the same inventive concept as above, please refer to fig. 4 in combination, a clock source conversion distribution system 40 is provided, which includes a clock generating device 10 and a time service device 30 communicating with each other;

the clock generation apparatus 10 is configured to: acquiring a historical clock delay information set and a historical clock compensation information set; training a preset clock delay detection model by adopting the historical clock delay information set to obtain a trained clock delay detection model; performing clock delay detection on the historical clock compensation information set through the trained clock delay detection model to obtain a historical clock deviation information set; training a preset asynchronous clock source conversion model aiming at the clock generation equipment by adopting the historical clock deviation information set to obtain the trained asynchronous clock source conversion model aiming at the clock generation equipment; training a preset asynchronous clock source conversion model aiming at the time service equipment based on a preset model training index and the trained asynchronous clock source conversion model aiming at the clock generation equipment to obtain a trained asynchronous clock source conversion model aiming at the time service equipment; the method comprises the steps of issuing a trained asynchronous clock source conversion model aiming at time service equipment to the time service equipment, carrying out clock state recognition on a clock signal to be converted through the time service equipment and the trained asynchronous clock source conversion model aiming at the time service equipment to obtain a clock state recognition result, and determining a clock source distribution result of the clock signal to be converted based on the clock state recognition result.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus and method embodiments described above are illustrative only, as the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, the functional modules in the embodiments of the present invention may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention or a part thereof, which essentially contributes to the prior art, can be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a clock generation device 10, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk. It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

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Clock source conversion distribution method and system

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