阅读说明：本技术 一种基于金属氧化物tft的运算放大器、芯片及方法 (Operational amplifier, chip and method based on metal oxide TFT ) 是由 陈荣盛 文明珠 徐煜明 李辉 于 2020-10-13 设计创作，主要内容包括：本发明公开了一种基于金属氧化物TFT的运算放大器、芯片及方法,其中运算放大器包括辅助放大器和自举增益提高放大器,辅助放大器采用两级正反馈结构,包括第五晶体管、第七晶体管、第十一晶体管、第一放大单元和第二放大单元,所述第五晶体管的栅极作为运算放大器的输入端,自举增益提高放大器包括两个相互对称的第二电路,所述第二电路包括第一晶体管、第二晶体管和自举结构的电流源单元。本发明利用自举增益提高技术,实现了高增益与稳定相位裕度的薄膜晶体管运算放大器电路；另外,辅助放大器采用两种正反馈结构,进一步提高了电压增益,可广泛应用于集成电路设计技术领域。(The invention discloses an operational amplifier, a chip and a method based on a metal oxide Thin Film Transistor (TFT), wherein the operational amplifier comprises an auxiliary amplifier and a bootstrap gain improving amplifier, the auxiliary amplifier adopts a two-stage positive feedback structure and comprises a fifth transistor, a seventh transistor, an eleventh transistor, a first amplifying unit and a second amplifying unit, the grid electrode of the fifth transistor is used as the input end of the operational amplifier, the bootstrap gain improving amplifier comprises two second circuits which are mutually symmetrical, and the second circuits comprise a first transistor, a second transistor and a current source unit of the bootstrap structure. The invention utilizes the bootstrap gain improvement technology to realize the thin film transistor operational amplifier circuit with high gain and stable phase margin; in addition, the auxiliary amplifier adopts two positive feedback structures, further improves the voltage gain, and can be widely applied to the technical field of integrated circuit design.)

1. A metal oxide TFT based operational amplifier, comprising:

the auxiliary amplifier comprises two first circuits which are symmetrical to each other, wherein each first circuit adopts a two-stage positive feedback structure and comprises a fifth transistor, a seventh transistor, an eleventh transistor, a first amplification unit and a second amplification unit, the grid electrode of the fifth transistor is used as the input end of an operational amplifier, the drain electrode of the fifth transistor is respectively connected with the source electrode of the seventh transistor, the drain electrode of the eleventh transistor, the input end of the first amplification unit and the input end of the second amplification unit, the output end of the first amplification unit is connected with the grid electrode of the seventh transistor, and the output end of the second amplification unit is connected with the grid electrode of the eleventh transistor;

the bootstrap gain improvement amplifier comprises two mutually symmetrical second circuits, wherein each second circuit comprises a first transistor, a second transistor and a current source unit of a bootstrap structure, the grid electrode of the second transistor is connected with the drain electrode of the fifth transistor, the drain electrode of the second transistor is connected with the current source unit, the source electrode of the second transistor is respectively connected with the drain electrode of the first transistor and the grid electrode of the fifth transistor, the source electrode of the first transistor is grounded, and the drain electrode of the second transistor is used as the output end of the operational amplifier.

2. The operational amplifier of claim 1, wherein the current source unit comprises a third transistor, a fourth transistor and a capacitor;

the grid electrode and the drain electrode of the fourth transistor are connected to a power supply, the source electrode of the fourth transistor is connected with the grid electrode of the third transistor, the drain electrode of the third transistor is connected to the power supply, the source electrode of the third transistor is connected with the drain electrode of the second transistor, and the capacitor is connected between the grid electrode and the source electrode of the third transistor in parallel.

3. The metal oxide TFT-based operational amplifier of claim 1, wherein the first circuit further comprises a tenth transistor, a twelfth transistor, and a thirteenth transistor;

a gate of the tenth transistor is connected to a drain of the fifth transistor, a drain of the tenth transistor is connected to a gate of the eleventh transistor and a gate of the twelfth transistor, respectively, a drain of the twelfth transistor is connected to a source of the thirteenth transistor, a gate and a drain of the thirteenth transistor are all connected to a power supply, the tenth transistor, the twelfth transistor and the thirteenth transistor constitute a first amplifying unit, a drain of the twelfth transistor serves as an output end of the first amplifying unit, and the tenth transistor constitutes a second amplifying unit.

4. The metal oxide TFT-based operational amplifier of claim 1, wherein the auxiliary amplifier further comprises a ninth transistor and a fourteenth transistor, both of which act as current sources;

the drain electrode of the ninth transistor is connected with the source electrode of the fifth transistor, the grid electrode of the ninth transistor is connected to the first bias voltage, and the source electrode of the ninth transistor is grounded;

the drain of the fourteenth transistor is respectively connected with the source of the eleventh transistor and the source of the twelfth transistor, the gate of the fourteenth transistor is connected to the second bias voltage, and the source of the fourteenth transistor is grounded.

5. The metal oxide TFT-based operational amplifier of claim 4, wherein the gate of the first transistor is connected to a first bias voltage.

6. A chip comprising a metal oxide TFT based operational amplifier according to any one of claims 1 to 5.

7. A design method applied to the metal oxide TFT-based operational amplifier as claimed in any one of claims 1 to 5, comprising the steps of:

acquiring process parameters of the transistors, and calculating the width-to-length ratios of all the transistors according to the process parameters;

all the transistors work in a saturation region by adjusting the voltage value of the bias voltage;

and simulating the operational amplifier, and optimally adjusting the width-to-length ratio parameter of the transistor according to the simulation result.

Technical Field

The invention relates to the technical field of integrated circuit design, in particular to an operational amplifier, a chip and a method based on a metal oxide Thin Film Transistor (TFT).

Background

Metal-oxide thin film transistors (Metal-oxide TFTs) are considered a promising technology for integrated circuits due to their high mobility, good stability and simple fabrication processes. In recent years, metal oxide thin film transistors have been widely used in Integrated Circuits (ICs) such as display drivers, inverters, or RFID/NFC tags. In addition, they also have applications in bioelectrical signal monitoring systems. Among them, the operational amplifier is the most important module for amplifying signals in an analog circuit.

However, since only N-type metal oxide thin film transistors can be integrated, the conventional CMOS circuit structure cannot be used, and the design of the operational amplifier presents a great challenge. First, the transconductance of metal oxide thin film transistors is not high enough because the mobility of metal oxide is much lower than that of crystalline silicon. Secondly, in the design of the operational amplifier, it is difficult to obtain high output impedance due to the lack of P-type TFTs. In order to solve the problem of low gain of the metal oxide thin film transistor, technologies such as positive feedback and pseudo CMOS have been developed to improve the gain of the operational amplifier, but the problem of low gain of the operational amplifier has not been solved well.

Disclosure of Invention

In order to solve at least one of the technical problems in the prior art to a certain extent, the present invention aims to provide an operational amplifier, a chip and a method based on a metal oxide TFT, wherein the operational amplifier utilizes a bootstrap gain improvement technique, and an auxiliary amplifier adopts a two-stage positive feedback structure, so as to solve the problem that the gain and phase margin of the existing thin film transistor operational amplifier are generally not high.

The technical scheme adopted by the invention is as follows:

a metal oxide TFT based operational amplifier comprising:

the auxiliary amplifier comprises two first circuits which are symmetrical to each other, wherein each first circuit adopts a two-stage positive feedback structure and comprises a fifth transistor, a seventh transistor, an eleventh transistor, a first amplification unit and a second amplification unit, the grid electrode of the fifth transistor is used as the input end of an operational amplifier, the drain electrode of the fifth transistor is respectively connected with the source electrode of the seventh transistor, the drain electrode of the eleventh transistor, the input end of the first amplification unit and the input end of the second amplification unit, the output end of the first amplification unit is connected with the grid electrode of the seventh transistor, and the output end of the second amplification unit is connected with the grid electrode of the eleventh transistor;

the bootstrap gain improvement amplifier comprises two mutually symmetrical second circuits, wherein each second circuit comprises a first transistor, a second transistor and a current source unit of a bootstrap structure, the grid electrode of the second transistor is connected with the drain electrode of the fifth transistor, the drain electrode of the second transistor is connected with the current source unit, the source electrode of the second transistor is respectively connected with the drain electrode of the first transistor and the grid electrode of the fifth transistor, the source electrode of the first transistor is grounded, and the drain electrode of the second transistor is used as the output end of the operational amplifier.

Further, the current source unit includes a third transistor, a fourth transistor, and a capacitor;

the grid electrode and the drain electrode of the fourth transistor are connected to a power supply, the source electrode of the fourth transistor is connected with the grid electrode of the third transistor, the drain electrode of the third transistor is connected to the power supply, the source electrode of the third transistor is connected with the drain electrode of the second transistor, and the capacitor is connected between the grid electrode and the source electrode of the third transistor in parallel.

Further, the first circuit further includes a tenth transistor, a twelfth transistor, and a thirteenth transistor;

a gate of the tenth transistor is connected to a drain of the fifth transistor, a drain of the tenth transistor is connected to a gate of the eleventh transistor and a gate of the twelfth transistor, respectively, a drain of the twelfth transistor is connected to a source of the thirteenth transistor, a gate and a drain of the thirteenth transistor are all connected to a power supply, the tenth transistor, the twelfth transistor and the thirteenth transistor constitute a first amplifying unit, a drain of the twelfth transistor serves as an output end of the first amplifying unit, and the tenth transistor constitutes a second amplifying unit.

Further, the auxiliary amplifier further comprises a ninth transistor and a fourteenth transistor, and the ninth transistor and the fourteenth transistor are both used as current sources;

the drain electrode of the ninth transistor is connected with the source electrode of the fifth transistor, the grid electrode of the ninth transistor is connected to the first bias voltage, and the source electrode of the ninth transistor is grounded;

the drain of the fourteenth transistor is respectively connected with the source of the eleventh transistor and the source of the twelfth transistor, the gate of the fourteenth transistor is connected to the second bias voltage, and the source of the fourteenth transistor is grounded.

Further, the gate of the first transistor is connected to a first bias voltage.

The other technical scheme adopted by the invention is as follows:

a chip comprising a metal oxide TFT based operational amplifier as described above.

The other technical scheme adopted by the invention is as follows:

a design method applied to the metal oxide TFT-based operational amplifier as described above, comprising the steps of:

acquiring process parameters of the transistors, and calculating the width-to-length ratios of all the transistors according to the process parameters;

all the transistors work in a saturation region by adjusting the voltage value of the bias voltage;

and simulating the operational amplifier, and optimally adjusting the width-to-length ratio parameter of the transistor according to the simulation result.

The invention has the beneficial effects that: the invention utilizes the bootstrap gain improvement technology to realize the thin film transistor operational amplifier circuit with high gain and stable phase margin; in addition, the auxiliary amplifier adopts two positive feedback structures, and the voltage gain is further improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description is made on the drawings of the embodiments of the present invention or the related technical solutions in the prior art, and it should be understood that the drawings in the following description are only for convenience and clarity of describing some embodiments in the technical solutions of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a circuit diagram of a metal oxide TFT based operational amplifier in an embodiment of the present invention;

FIG. 2 is a circuit diagram of an auxiliary amplifier in an embodiment of the invention;

FIG. 3 is a small signal equivalent circuit of an operational amplifier according to an embodiment of the present invention;

FIG. 4 is a small signal equivalent circuit of an auxiliary amplifier in an embodiment of the present invention;

FIG. 5 is a frequency response diagram of an operational amplifier in an embodiment of the invention.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. The step numbers in the following embodiments are provided only for convenience of illustration, the order between the steps is not limited at all, and the execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.

In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.

In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.

In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.

As shown in fig. 1 to 3, the present embodiment provides a metal oxide TFT-based operational amplifier including:

referring to fig. 2, the auxiliary amplifier includes two symmetrical first circuits with two-stage positive feedback structure, including a fifth transistor M₅The seventh transistor M₇Eleventh transistor M_11bA first and a second amplifying unit, a fifth transistor M₅As an input terminal of the operational amplifier, a fifth transistor M₅Respectively with the seventh transistor M₇Source electrode of (1), eleventh transistor M_11bIs connected with the input terminal of the first amplifying unit and the input terminal of the second amplifying unit, the output terminal of the first amplifying unit is connected with the seventh transistor M₇Is connected with the gate of the first amplifying unit, the output end of the second amplifying unit is connected with the eleventh transistor M_11bThe gate of (1) is connected;

referring to fig. 3, the bootstrap gain-enhanced amplifier includes two second circuits symmetrical to each other, the second circuits including a first transistor M_1bA second transistor M_2bAnd a current source unit of a bootstrap structure, a second transistor M_2bGate of and the fifth transistor M₅Is connected to the drain of the second transistor M_2bIs connected to the current source unit, a second transistor M_2bRespectively with the first transistor M_1bAnd a drain electrode ofFifth transistor M₅Is connected to the gate of the first transistor M_1bIs grounded, the second transistor M_2bAs the output terminal of the operational amplifier.

Referring to fig. 1, further as a preferred embodiment, the current source unit includes a third transistor M_3bA fourth transistor M_4bAnd a capacitor C₂；

Fourth transistor M_4bBoth the gate and the drain of which are connected to a power supply, a fourth transistor M_4bAnd the third transistor M_3bIs connected to the gate of the third transistor M_3bIs connected to a power supply, a third transistor M_3bSource of and second transistor M_2bIs connected to the drain of the capacitor C₂Connected in parallel to the third transistor M_3bBetween the gate and the source.

Wherein, the capacitor C₂As a bootstrap capacitor, a third transistor M_3bThe bootstrap capacitor effectively increases the output potential by providing the gate-source voltage, thereby increasing the output voltage swing.

Referring to fig. 1, further as a preferred embodiment, the first circuit further includes a tenth transistor M_10bThe twelfth transistor M_11aAnd a thirteenth transistor M₁₃；

The tenth transistor M_10bGate of and the fifth transistor M₅Is connected to the drain of the tenth transistor M_10bRespectively with the eleventh transistor M_11bGate of (d) and a twelfth transistor M_11aIs connected to the gate of the twelfth transistor M_11aAnd the thirteenth transistor M₁₃Is connected to the source of the thirteenth transistor M₁₃Both the gate and the drain of the transistor M are connected to a power supply, and a tenth transistor M_10bThe twelfth transistor M_11aAnd a thirteenth transistor M₁₃Constituting a first amplifying unit, and a twelfth transistor M_11aAs an output terminal of the first amplifying unit, a tenth transistor M_10bConstituting a second amplifying unit.

Referring to fig. 1, further as a preferred embodiment, the auxiliary amplifier further includes a ninth transistor M₉And a fourteenth transistor M₁₄The ninth transistor M₉And a fourteenth transistor M₁₄All as current sources;

ninth transistor M₉And the drain of the fifth transistor M₅Is connected to the source of the ninth transistor M₉Is connected to a first bias voltage V_b1The ninth transistor M₉The source of (2) is grounded;

fourteenth transistor M₁₄Respectively with the eleventh transistor M_11bSource and twelfth transistor M_11aIs connected to the source of the fourteenth transistor M₁₄Is connected to a second bias voltage V_b2The fourteenth transistor M₁₄Is grounded.

Referring to fig. 1, further as a preferred embodiment, a first transistor M_1bIs connected to a first bias voltage.

The operation principle of the operational amplifier will be described in detail with reference to fig. 1 and 3 to 4.

The operational amplifier as shown in fig. 1, the circuit can be divided into two stages, the first stage is an auxiliary amplifier, and the second stage is a bootstrap gain boosting amplifier. Auxiliary amplifier consisting of M₅-M₁₃And (4) forming. Bootstrap gain boosting amplifier composed of M_1a-M_4a、M_1b-M_4bAnd (4) forming.

By adjusting the bias voltage V_b1(i.e., first bias voltage), V_b2(i.e., the second bias voltage) all TFTs (i.e., transistors) of the op-amp operate in the saturation region. As shown in fig. 3, the operational amplifier small-signal equivalent circuit selects a single-ended input single-ended output model for simplicity of calculation. According to kvl, current i_xComprises the following steps:

current i_x1Is (wherein gM)₂Is M₂Transconductance, -a is the gain of the auxiliary amplifier):

i_x1＝-g_m2(A+1)V_in (3-2)

output voltage V_outComprises the following steps:

V_out＝(i_x-i_x1)r_o2+V_in (3-3)

so that the gain A of the operational amplifier_VComprises the following steps:

from the equation (3-4), the gain of the auxiliary amplifier can be increased to obtain a high gain of the operational amplifier. In order to improve the voltage gain of the auxiliary amplifier, a two-stage positive feedback structure is adopted. The first stage is composed of M_10a、M_11a、M₁₂And M₁₃And (4) forming. The second stage is composed of M_10b、M_11bAnd (4) forming. Unlike the conventional configuration that only uses the first stage of positive feedback, the auxiliary amplifier herein adds M to enhance the positive feedback_10b、M_11bTwo pull-down devices. Thus, when the input signal increases, M_10b、M_11bWill increase M₅、M₆Thereby increasing the gain of the auxiliary amplifier.

Referring to fig. 4, the equivalent output impedance of the auxiliary amplifier is:

the gain is:by directly referring to the gain formula, adding negative resistance, the gain increases, i.e. M_10b、M_11bIncrease M₅、M₆The discharge current of (1).

The simulation results of the operational amplifier are as follows:

the present embodiment uses a metal oxide thin film transistor, and uses a 13V power supply voltage. And (4) adopting an Hspice tool to simulate a specific process, adjusting parameters according to the structure and optimizing indexes.

Wherein M is_1a-M_2bThe dimensions of (A) are as follows:

M₅and M₆The dimensions of (A) are as follows:

M₇and M₈The dimensions of (A) are as follows:

M₉the dimensions of (A) are as follows:

M₁₀-M₁₁the size of the positive feedback structure is (the sizes of the devices with the two-stage positive feedback structure are consistent):

M₁₂-M₁₃has a size of (wherein IM)₁₂＝IM_10a)：

M₁₄Has a size of (wherein IM)₇＝IM₅+IM_10a)：

And repeatedly adjusting the size optimization index according to the formula. The resulting amplifier dimensions are shown in table 1.

TABLE 1

Fig. 5 is a frequency response diagram of an operational amplifier. The gain is 45.6dB and the-3 dB bandwidth is 5.08 kHz. The unity gain bandwidth is 375kHz and the phase margin is 67.

Table 2 summarizes the performance of the operational amplifiers and compares them with other TFT operational amplifiers. The circuit bandwidth of this embodiment is not large enough compared to the previous operational amplifiers. However, it can provide higher voltage gain, stable phase margin and lower power consumption. Wherein, the circuits [1] to [5] in Table 2 are conventional operational amplifiers.

TABLE 2

In summary, the operational amplifier of the present embodiment has the following beneficial effects:

(1) and a thin film transistor operational amplifier circuit with high gain and stable phase margin is realized by using a bootstrap gain improvement technology.

(2) And the auxiliary amplifier adopts two positive feedback structures, so that the voltage gain is improved.

The embodiment also provides a design method, which comprises the following steps:

s1, acquiring process parameters of the transistors, and calculating the width-to-length ratios of all the transistors according to the process parameters;

s2, adjusting the voltage value of the bias voltage to make all the transistors work in the saturation region;

and S3, simulating the operational amplifier, and optimally adjusting the width-to-length ratio parameter of the transistor according to the simulation result.

The method of the present embodiment has a one-to-one correspondence relationship with the operational amplifiers, and thus has the corresponding advantages of the operational amplifier embodiments.

In alternative embodiments, the functions/acts noted in the block diagrams may occur out of the order noted in the operational illustrations. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Furthermore, the embodiments presented and described in the flow charts of the present invention are provided by way of example in order to provide a more thorough understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is changed and in which sub-operations described as part of larger operations are performed independently.

Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the described functions and/or features may be integrated in a single physical device and/or software module, or one or more functions and/or features may be implemented in a separate physical device or software module. It will also be appreciated that a detailed discussion of the actual implementation of each module is not necessary for an understanding of the present invention. Rather, the actual implementation of the various functional modules in the apparatus disclosed herein will be understood within the ordinary skill of an engineer, given the nature, function, and internal relationship of the modules. Accordingly, those skilled in the art can, using ordinary skill, practice the invention as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are merely illustrative of and not intended to limit the scope of the invention, which is defined by the appended claims and their full scope of equivalents.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.

More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.

It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.

In the foregoing description of the specification, reference to the description of "one embodiment/example," "another embodiment/example," or "certain embodiments/examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.