阅读说明：本技术 一种表征FinFET的自加热效应的结构及应用其的方法 (Structure for representing self-heating effect of FinFET and method for applying structure ) 是由 李勇 于 2021-06-28 设计创作，主要内容包括：本发明涉及一种表征FinFET的自加热效应的结构,涉及半导体集成电路结构,包括多条鳍,多条鳍同方向排列；两条加热多晶硅和一条检测多晶硅,两条加热多晶硅和一条检测多晶硅同方向排列,两条加热多晶硅与多条鳍交叉,一条检测多晶硅与多条鳍中的其中一条鳍交叉,并一条检测多晶硅位于两条加热多晶硅之间,因检测多晶硅仅与一条鳍交叉而形成1-Fin晶体管,因此FinFET的自加热效应不会受其它鳍的影响,而能更加准确的表征FinFET的自加热效应,且不易受FinFET制造工艺的影响,尤其是边缘区域的鳍的影响。(The invention relates to a structure for representing the self-heating effect of a FinFET (FinFET), which relates to a semiconductor integrated circuit structure and comprises a plurality of fins, wherein the fins are arranged in the same direction; the self-heating effect of the FinFET can be more accurately represented without being influenced by other fins, and the FinFET is not easily influenced by the FinFET manufacturing process, especially the fins in the edge area.)

1. A structure to characterize a self-heating effect of a FinFET, comprising:

a plurality of fins arranged in the same direction;

the two pieces of heating polycrystalline silicon and the one piece of detection polycrystalline silicon are arranged in the same direction, the two pieces of heating polycrystalline silicon are crossed with the multiple fins, the one piece of detection polycrystalline silicon is crossed with one fin of the multiple fins, and the one piece of detection polycrystalline silicon is located between the two pieces of heating polycrystalline silicon.

2. The structure for characterizing self-heating effects of a FinFET of claim 1, wherein a plurality of fins are arranged in parallel.

3. The structure for characterizing self-heating effects of a FinFET as recited in claim 1, wherein two pieces of heated polysilicon are arranged parallel to one piece of sense polysilicon.

4. The structure for characterizing self-heating effects of a FinFET in claim 1, further comprising a metal 0 layer, wherein the plurality of fins are connected together by the metal 0 layer.

5. The structure for characterizing self-heating effects of a FinFET in claim 1, further comprising a first zero-level via for connecting two strips of heated polysilicon together and out.

6. The structure for characterizing self-heating effects of a FinFET in claim 1, further comprising a second zero-level via for extracting the sense polysilicon.

7. The structure for characterizing self-heating effects of a FinFET in claim 1, further comprising a plurality of dummy poly-silicon arranged parallel to the heating poly-silicon and the sensing poly-silicon, crossing the plurality of fins, to form a dummy poly-silicon gate at the crossing region with the fins.

8. A method of characterizing self-heating effects of finfets using the structure of claim 1 for characterizing self-heating effects of finfets, comprising:

s1, opening a heating grid formed in the crossing region of the heating polysilicon and the fin, conducting a channel in the crossing region of the fin and the heating polysilicon to generate heat, and transmitting the heat to the detection polysilicon through the fin;

and S2, starting a detection gate formed in the region where the polysilicon and the fin are to be detected, obtaining the subthreshold swing of the fin crossed with the polysilicon at intervals, obtaining a curve of the subthreshold swing changing along with time, and calculating a temperature value corresponding to the subthreshold swing according to an expression of the subthreshold swing, so that a curve of the lattice temperature of the fin crossed with the polysilicon being detected along with time can be obtained, and the self-heating effect of the FinFET can be represented.

9. The method of claim 8, wherein the obtaining the sub-threshold swing of the fin crossing the detection polysilicon is performed for a fixed period of time.

Technical Field

The present invention relates to semiconductor integrated circuit fabrication techniques, and more particularly, to a structure for characterizing the self-heating effect of a FinFET.

Background

In recent 30 years, semiconductor devices have been scaled down in accordance with moore's law, and the feature size of semiconductor integrated circuits has been reduced and the degree of integration has been increased. As technology nodes enter the deep sub-micron regime, e.g., within 100nm, even within 45nm, conventional Field Effect Transistors (FETs), i.e., planar FETs, begin to suffer from various fundamental physical laws, hindering their scaling prospects. Numerous new structures of FETs have been developed to meet the needs of the art, wherein finfets are a new structure device with equal scaling potential.

Finfets, fin field effect transistors, are a type of multi-gate semiconductor device. Due to the unique characteristics of the structure, the FinFET is a device with development prospect in the field of deep submicron integrated circuits. In the formation of a FinFET device, at least one fin structure is first formed on a semiconductor substrate, then oxide is filled into the trenches and then ground and polished until the silicon is exposed, then a recess etch of the oxide layer is performed to form isolation structures between the "fins", and finally a gate structure is formed over the fin structure and the oxide.

However, the Self-Heating Effect (SHE) of the FinFET of the device is serious due to poor thermal conductivity of the oxide in the Shallow Trench Isolation (STI) structure of the FinFET of the structure. Accurate characterization of the self-heating effect of a FinFET device is important to achieving device performance.

Referring to fig. 1, a schematic diagram of a prior art structure for characterizing a self-heating effect of a FinFET is shown, in which a voltage is applied to the SMU force pin of the sensing gate 101 to obtain a current passing through the sensing gate 101, and a sheet resistance Rs of the sensing gate 101 is obtained through the voltage and the current, and since the resistance value is temperature dependent, the self-heating effect of the FinFET can be indirectly characterized through the sheet resistance Rs of the sensing gate 101, which cannot be accurately characterized.

Another way is to characterize the self-heating effect of the FinFET by monitoring the sub-threshold Swing (SS), which is a function of the fin body temperature, i.e., it is directly related to the fin body temperature, so the self-heating effect of the FinFET can be directly characterized by the sub-threshold Swing. Referring to fig. 2, which is a schematic structural diagram for characterizing the self-heating effect of a FinFET in the prior art, the polysilicon 201 and the polysilicon 202 are detected to intersect with the plurality of fins 203, and the polysilicon 202 is detected on both sides of the polysilicon 201 in the length direction, as can be seen from fig. 2, the polysilicon 201 is detected to intersect with the plurality of fins 203, the sub-threshold swings between the fins are different, and the self-heating effect of the FinFET is determined by the worst sub-threshold swing, so the self-heating effect of the FinFET cannot be accurately characterized. And since the polysilicon 201 is detected to intersect with the plurality of fins 203, the self-heating effect of the FinFET is susceptible to the FinFET manufacturing process.

Disclosure of Invention

The invention provides a structure for characterizing self-heating effect of FinFET, comprising: a plurality of fins arranged in the same direction; the two pieces of heating polycrystalline silicon and the one piece of detection polycrystalline silicon are arranged in the same direction, the two pieces of heating polycrystalline silicon are crossed with the multiple fins, the one piece of detection polycrystalline silicon is crossed with one fin of the multiple fins, and the one piece of detection polycrystalline silicon is located between the two pieces of heating polycrystalline silicon.

Further, the plurality of fins are arranged in parallel.

Further, two pieces of the heating polysilicon are arranged in parallel with one piece of the sensing polysilicon.

Furthermore, the fin structure further comprises a metal 0 layer, and the plurality of fins are connected together through the metal 0 layer.

Furthermore, the device also comprises a first zero-layer through hole which is used for connecting the two pieces of heating polysilicon together and leading out.

Furthermore, the device also comprises a second zero-layer through hole for leading out the detection polysilicon.

Furthermore, the device also comprises a plurality of dummy polysilicon, wherein the dummy polysilicon is arranged in parallel with the heating polysilicon and the detection polysilicon and is intersected with the fins, and a dummy polysilicon gate is formed in the intersection region of the dummy polysilicon gate and the fins.

The application also provides a method for characterizing the self-heating effect of the FinFET by using the structure for characterizing the self-heating effect of the FinFET, which comprises the following steps: s1, opening a heating grid formed in the crossing region of the heating polysilicon and the fin, conducting a channel in the crossing region of the fin and the heating polysilicon to generate heat, and transmitting the heat to the detection polysilicon through the fin; and S2, starting a detection gate formed in the region where the polysilicon and the fin are to be detected, obtaining the subthreshold swing of the fin crossed with the polysilicon at intervals, obtaining a curve of the subthreshold swing changing along with time, and calculating a temperature value corresponding to the subthreshold swing according to an expression of the subthreshold swing, so that a curve of the lattice temperature of the fin crossed with the polysilicon being detected along with time can be obtained, and the self-heating effect of the FinFET can be represented.

Furthermore, the sub-threshold swing of the fin crossed with the detection polysilicon is obtained at intervals, and the sub-threshold swing of the fin crossed with the detection polysilicon is obtained at intervals of fixed time.

Drawings

Fig. 1 is a schematic diagram of a prior art structure that characterizes the self-heating effect of a FinFET.

Fig. 2 is a schematic diagram of a prior art structure that characterizes the self-heating effect of a FinFET.

Fig. 3 is a structural diagram illustrating a self-heating effect of a FinFET in accordance with an embodiment of the present invention.

Detailed Description

The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.

It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity, and the same reference numerals denote the same elements throughout. It will be understood that when an element or layer is referred to as being "on" …, "adjacent to …," "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …," "directly adjacent to …," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatial relationship terms such as "under …", "under …", "below", "under …", "above …", "above", and the like, may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below …" and "below …" can encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

The present application provides a structure that characterizes the self-heating effect of a FinFET. Referring to fig. 3, a schematic structural diagram for characterizing the self-heating effect of a FinFET in accordance with an embodiment of the present invention includes:

a plurality of fins 21, the plurality of fins 21 being arranged in the same direction;

two pieces of heating polysilicon 23 and one piece of sensing polysilicon 24, the two pieces of heating polysilicon 23 and the one piece of sensing polysilicon 24 are arranged in the same direction, the two pieces of heating polysilicon 23 intersect with the plurality of fins 21, the one piece of sensing polysilicon 24 intersects with one of the plurality of fins 21, and the one piece of sensing polysilicon 24 is located between the two pieces of heating polysilicon 23.

Since the sensing polysilicon 24 crosses only one Fin 21 to form the 1-Fin transistor as shown in fig. 3 at 30, the self-heating effect of the FinFET is not affected by other fins, and can be more accurately characterized and is less susceptible to the FinFET manufacturing process, especially the edge region fins.

In one embodiment, the plurality of fins 21 are arranged in parallel; and two pieces of the heating polysilicon 23 are arranged in parallel with one piece of the sensing polysilicon 24.

In an embodiment, the structure characterizing the self-heating effect of the FinFET further comprises: a metal 0 layer, the metal 0 layer including M0D25, the plurality of fins 21 connected together with M0D 25.

In an embodiment, the structure characterizing the self-heating effect of the FinFET further comprises: the first zero-layer through hole M0PO26 and the second zero-layer through hole M0PO27, the first zero-layer through hole M0PO26 is used for connecting the two pieces of heating polysilicon 23 together and leading out, and the second zero-layer through hole M0PO27 is used for leading out the detection polysilicon 24.

In one embodiment, the structure for characterizing the self-heating effect of the FinFET further comprises a plurality of dummy polysilicon 28, the plurality of dummy polysilicon 28 being arranged parallel to the heating polysilicon 23 and the sensing polysilicon 24, crossing the plurality of fins 21, and forming a dummy polysilicon gate at the crossing region with the fins 21.

In an embodiment, there is also provided a method for characterizing a self-heating effect of a FinFET using the above structure for characterizing a self-heating effect of a FinFET, including:

s1, turning on a heating gate formed in the crossing region of the heating polysilicon 23 and the fin 21, conducting the channel in the crossing region of the fin 21 and the heating polysilicon 23 to generate heat, and transferring the heat to the detection polysilicon 24 through the fin 21;

and S2, starting a detection gate (turn on) formed in the crossing region of the detection polysilicon 24 and the fin 21, obtaining the subthreshold swing of the fin crossed with the detection polysilicon 24 at intervals to obtain a curve of the subthreshold swing changing along with time, and calculating a temperature value corresponding to the subthreshold swing according to an expression of the subthreshold swing, so that a curve of the lattice temperature of the fin crossed with the detection polysilicon 24 changing along with time can be obtained to represent the self-heating effect of the FinFET.

The process of obtaining the self-heating effect of the FinFET is not influenced by other fins, the self-heating effect of the FinFET can be more accurately represented, and the self-heating effect of the FinFET is not easily influenced by the FinFET manufacturing process, particularly the fins in the edge area.

In an embodiment of the present invention, the obtaining of the sub-threshold swing of the fin crossing the detection polysilicon 24 is performed at intervals, and the obtaining of the sub-threshold swing of the fin crossing the detection polysilicon 24 is performed at intervals of a fixed duration. Such as no interval of 10 s. Of course, the time interval is not fixed.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.