阅读说明：本技术 一种减小石英wafer腐蚀散差的滴定方法 (Titration method for reducing quartz wafer corrosion dispersion ) 是由 万杨 吴丰顺 栾兴贺 张小伟 杨飞 黄大勇 于 2021-06-21 设计创作，主要内容包括：一种减小石英wafer腐蚀散差的滴定方法,包括：双面镀膜、涂胶、双面曝光、显影、金属蚀刻、外形腐蚀、去胶、去金属、凹槽镀膜、涂胶、凹槽曝光、凹槽显影、凹槽蚀刻、凹槽去胶、第一次凹槽腐蚀、使用频率监测仪器将第一次凹槽腐蚀得到的mesa晶片进行全部测量,并将测试结果记录到计算机中,并计算出每片晶片的二次腐蚀时间,然后使用滴管依据加腐时间的先后顺序将腐蚀液滴入mesa晶片,最终腐蚀时间到达后将晶圆放入纯水中清洗烘干。本发明解决了现有石英晶圆腐蚀散差大的问题,尤其是在高频mesa晶片腐蚀生产上,同时也提高了产品量产合格率。(A titration method for reducing quartz wafer corrosion spread, comprising: the method comprises the following steps of double-sided coating, coating glue, double-sided exposure, development, metal etching, appearance corrosion, glue removal, metal removal, groove coating, coating glue, groove exposure, groove development, groove etching, groove glue removal, first groove corrosion, and measurement of a mesa wafer obtained by the first groove corrosion by using a frequency monitoring instrument, recording a test result into a computer, calculating the secondary corrosion time of each wafer, dripping a corrosion liquid into the mesa wafer by using a dropper according to the sequence of corrosion adding time, and finally, putting the wafer into pure water for cleaning and drying after the corrosion time is up. The invention solves the problem of large corrosion dispersion of the existing quartz wafer, and particularly improves the yield of mass production of products in high-frequency mesa chip corrosion production.)

1. A titration method for reducing quartz wafer corrosion spread, comprising the steps of:

1) double-sided film coating: plating metal Cr and Au on two surfaces of the cleaned quartz wafer;

2) gluing: coating photoresist on both sides of the metal surface of the quartz wafer;

3) double-sided exposure: exposing the quartz wafer coated with the photoresist by using an exposure machine, wherein the photoresist is changed in property by the reaction of light and the photoresist;

4) and (3) developing: removing the reacted photoresist by using a developing solution;

5) metal etching: removing metal Au and Cr by using metal etching liquid;

6) and (3) corrosion of the appearance: corroding the exposed crystal by using BOE corrosive liquid to finally form a hollowed chip;

7) removing the photoresist: removing all the photoresist on the surface by using a stripping solution;

8) removing metals: removing all metals by using a metal etching solution;

9) coating a film on the groove: plating metal Cr and Au on two sides of the chip after corrosion;

10) gluing: coating photoresist on the two sides of the corroded chip metal surface;

11) groove exposure: exposing the chip coated with the photoresist by using an exposure machine, wherein the pattern is a rectangular groove distributed on the chip;

12) groove development: removing the reacted photoresist by using a developing solution;

13) groove etching: removing metal Au and Cr in the groove by using metal etching liquid;

14) removing the photoresist in the groove: removing all the photoresist on the chip surface by using a stripping solution;

15) first groove etching: etching the crystal in the groove by using BOE etching solution, using a frequency monitoring instrument in the etching process, and taking out the crystal after etching to a specified etching frequency to obtain a quartz wafer with a mesa chip;

16) using a frequency monitoring instrument to carry out all measurements on the mesa wafer obtained in the step 15), recording the test result into a computer, and calculating the secondary corrosion time of each wafer;

17) and (3) second-time groove corrosion: and dripping the etching solution into the mesa chip by using a dropper according to the sequence of the etching time, and finally, putting the wafer into pure water for cleaning and drying after the etching time is up.

2. The titration method for reducing quartz wafer corrosion spread according to claim 1, wherein: the temperature of the BOE corrosive liquid in the step 6) and the step 15) is 60 +/-1 ℃, and the corrosion speed is 0.9-1.2 mu m/min.

3. The titration method for reducing quartz wafer corrosion spread according to claim 1, wherein: the etching solution used in the step 17) is NH4HF2 solution with the temperature of 20 +/-1 ℃, and the etching speed is 0.1-0.15 mu m/min.

4. The titration method for reducing quartz wafer corrosion spread according to claim 1, wherein: the size of the quartz wafer in the step 1) is 1-4 inches.

Technical Field

The invention relates to the technical field of wafer processing, in particular to a titration method for reducing quartz wafer corrosion dispersion.

Background

With the development of information technology, the electronic device quartz crystal device for frequency generation and frequency control in the communication field develops towards small size, high frequency and high stability. The quartz wafer is developed towards miniaturization, high frequency and the like, the original cutting, grinding and polishing process cannot meet the requirements of miniaturization and high frequency of the quartz wafer, and particularly, in the production of ultrahigh frequency quartz wafers, the photoetching MEMS micro-nano processing technology must be used for producing the quartz wafer with an MESA structure.

The invention patent application with the publication number of CN 108231999A and the publication date of 2018, 6 and 29 discloses a processing method of a quartz resonator wafer, which comprises the following steps: i, plating a metal film: plating chrome on the wafer plate by using a film plating machine, plating gold, and finally depositing the chrome on the surface of the wafer plate in a film form, wherein the vacuum degree of the film plating machine is 0.35-0.45 Pa, the sputtering power of gold is 0.65kW, and the sputtering power of chromium is 0.4 kW; II, spraying and gluing III, soft baking IV, aligning and exposing a mask; v, baking after exposure; VI, developing; VII, hardening and baking; VIII, removing the metal film; corrosion of BOE; x, removing the photoresist; XI, repeating the steps II-VIII; XII, splitting; XIII, etching and cleaning; the wafer is placed in an etching machine, etched by an etching solution, and then rinsed and dried.

In the prior art, when chip etching operation is carried out, a whole wafer is directly put into etching solution BOE for etching, the frequency dispersion of the whole wafer is large after etching, and low frequency or high frequency is directly pricked off and removed after testing to ensure the frequency dispersion, but the chip slicing rate on the whole wafer can be reduced by the method.

Disclosure of Invention

The invention aims to solve the problem of large corrosion dispersion difference of the existing quartz wafer, and particularly provides a process method for reducing the corrosion frequency dispersion difference of the quartz wafer based on a photoetching process in a titration mode in the corrosion production of a high-frequency mesa wafer, so that the yield of mass production of products is improved.

In order to achieve the above purpose, the technical solution of the invention is as follows: a titration method for reducing quartz wafer corrosion spread, comprising the steps of:

1) double-sided film coating: plating metal Cr and Au on two surfaces of the cleaned quartz wafer;

2) gluing: coating photoresist on both sides of the metal surface of the quartz wafer;

3) double-sided exposure: exposing the quartz wafer coated with the photoresist by using an exposure machine, wherein the photoresist is changed in property by the reaction of light and the photoresist;

4) and (3) developing: removing the reacted photoresist by using a developing solution;

5) metal etching: removing metal Au and Cr by using metal etching liquid;

6) and (3) corrosion of the appearance: corroding the exposed crystal by using BOE corrosive liquid to finally form a hollowed chip;

7) removing the photoresist: removing all the photoresist on the surface by using a stripping solution;

8) removing metals: removing all metals by using a metal etching solution;

9) coating a film on the groove: plating metal Cr and Au on two sides of the chip after corrosion;

10) gluing: coating photoresist on the two sides of the corroded chip metal surface;

11) groove exposure: exposing the chip coated with the photoresist by using an exposure machine, wherein the pattern is a rectangular groove distributed on the chip;

12) groove development: removing the reacted photoresist by using a developing solution;

13) groove etching: removing metal Au and Cr in the groove by using metal etching liquid;

14) removing the photoresist in the groove: removing all the photoresist on the chip surface by using a stripping solution;

15) first groove etching: etching the crystal in the groove by using BOE etching solution, using a frequency monitoring instrument in the etching process, and taking out the crystal after etching to a specified etching frequency to obtain a quartz wafer with a mesa chip;

16) using a frequency monitoring instrument to carry out all measurements on the mesa wafer obtained in the step 15), recording the test result into a computer, and calculating the secondary corrosion time of each wafer;

17) and (3) second-time groove corrosion: and dripping the etching solution into the mesa chip by using a dropper according to the sequence of the etching time, and finally, putting the wafer into pure water for cleaning and drying after the etching time is up.

The temperature of the BOE corrosive liquid in the step 6) and the step 15) is 60 +/-1 ℃, and the corrosion speed is 0.9-1.2 mu m/min.

The etching solution used in the step 17) is NH4HF2 solution with the temperature of 20 +/-1 ℃, and the etching speed is 0.1-0.15 mu m/min.

The size of the quartz wafer in the step 1) is 1-4 inches.

Compared with the prior art, the invention has the following advantages:

1. the invention uses a titration mode to carry out secondary corrosion on the groove, and formulates the titration sequence of the secondary corrosion according to the difference of the frequency of the wafer after the primary corrosion, the method can reduce the corrosion dispersion of the whole wafer of the mesa wafer, finally controls the dispersion within a qualified range, and can be used for the mass production of the ultrahigh frequency wafer.

2. The invention has low cost and simple operation, is suitable for mass production, and can effectively improve the consistency of product frequency and the mass production yield.

Drawings

FIG. 1 is a schematic diagram of a process for processing a quartz wafer of mesa chips.

FIG. 2 is a diagram of an etched-out quartz wafer.

FIG. 3 is a graph of a primary recess etch of a quartz wafer.

FIG. 4 is a graph of a frequency test of a mesa wafer.

FIG. 5 is a table of quartz wafer recess etch process conditions.

Fig. 6 is a schematic diagram of a mesa wafer titration.

In the figure: 201 mesa chip, 301 corrosion liquid, 302 real-time detection corrosion white chip, 303 groove wafer to be corroded, 401 lower electrode, 402 upper electrode, 403 mesa chip, 601 groove wafer to be corroded, 602 corrosion liquid dropper.

Detailed Description

The present invention will be described in further detail with reference to the following description and embodiments in conjunction with the accompanying drawings.

A titration method for reducing quartz wafer corrosion spread, the whole process schematic diagram is shown in figure 1, and the titration method comprises the following steps:

1) double-sided film coating: plating metal Cr and Au on two surfaces of the cleaned quartz wafer (the size is kept between 1 and 4 inches);

2) gluing: coating photoresist on both sides of the metal surface of the quartz wafer;

3) double-sided exposure: exposing the quartz wafer coated with the photoresist by using an exposure machine, wherein the photoresist is changed in property by the reaction of light and the photoresist;

4) and (3) developing: removing the reacted photoresist by using a developing solution;

5) metal etching: removing metal Au and Cr by using metal etching liquid;

6) and (3) corrosion of the appearance: etching the exposed crystal by BOE etching solution with the temperature of 60 ℃ at the etching speed of 1.0 mu m/min to finally form a hollowed chip;

7) removing the photoresist: removing all the photoresist on the surface by using a stripping solution;

8) removing metals: removing all metals by using a metal etching solution;

9) coating a film on the groove: plating metal Cr and Au on two sides of the chip after corrosion;

10) gluing: coating photoresist on the two sides of the corroded chip metal surface;

11) groove exposure: exposing the chip coated with the photoresist by using an exposure machine, wherein the pattern is a rectangular groove distributed on the chip;

12) groove development: removing the reacted photoresist by using a developing solution;

13) groove etching: removing metal Au and Cr in the groove by using metal etching liquid;

14) removing the photoresist in the groove: removing all the photoresist on the chip surface by using a stripping solution;

15) first groove etching: referring to fig. 3, the crystal in the groove is etched away by BOE etching solution with the temperature of 60 ℃ at the etching speed of 1.0 μm/min, a frequency monitoring instrument is used in the etching process, and the quartz wafer with the mesa chip is obtained after the crystal is etched to the specified etching frequency;

16) using a frequency monitoring instrument to carry out all measurements on the mesa wafer obtained in the step 15), wherein the test engineering refers to fig. 4, the test result is recorded in a computer, and the secondary corrosion time of each wafer is calculated;

17) and (3) second-time groove corrosion: dripping NH4HF2 solution with corrosion speed of 0.1 μm/min and temperature of 20 deg.C into the mesa chip by using a dropper according to the sequence of corrosion time, wherein the titration process is shown in FIG. 6, and the wafer is washed and dried in pure water after the final corrosion time is reached, and the product is shown in FIG. 2.