阅读说明：本技术 一种soc原型验证方法、系统、设备及介质 (SOC prototype verification method, system, equipment and medium ) 是由 陈贝 童元满 于 2020-06-19 设计创作，主要内容包括：本申请公开了一种SOC原型验证方法、系统、设备以及介质,该方法包括：通过本地uart接口接收交互仿真平台发送的操作命令；通过所述本地ARM核心上运行的命令解析器对所述操作命令进行解析,并转换成外设驱动操作命令；通过本地待测外设总线将所述外设驱动操作命令发送到对应的待测外设；通过所述uart接口将验证结果反馈给所述交互仿真平台,其中,所述验证结果为所述待测外设执行所述外设驱动操作命令后得到的结果。这样可以将uart接口和命令解析器应用于不同的SOC原型系统,提高了SOC原型验证系统的通用性,减少了整个SOC原型验证的工作量,且提高了验证的工作效率。(The application discloses a method, a system, equipment and a medium for verifying an SOC prototype, wherein the method comprises the following steps: receiving an operation command sent by an interactive simulation platform through a local uart interface; analyzing the operation command through a command analyzer running on the local ARM core, and converting the operation command into a peripheral driving operation command; sending the peripheral driving operation command to the corresponding peripheral to be tested through a local peripheral bus to be tested; and feeding back a verification result to the interactive simulation platform through the uart interface, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command. Therefore, the uart interface and the command parser can be applied to different SOC prototype systems, the universality of the SOC prototype verification system is improved, the workload of the whole SOC prototype verification is reduced, and the verification work efficiency is improved.)

1. A SOC prototype verification method is applied to a SOC prototype system to be tested, and comprises the following steps:

receiving an operation command sent by an interactive simulation platform through a local uart interface;

analyzing the operation command through a command analyzer running on a local ARM core, and converting the operation command into a peripheral driving operation command;

sending the peripheral driving operation command to the corresponding peripheral to be tested through a local peripheral bus to be tested;

and feeding back a verification result to the interactive simulation platform through the uart interface, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

2. The SOC prototype verification method according to claim 1, wherein before receiving the operation command sent by the interactive simulation platform through the local uart interface, the method further comprises:

receiving an information query instruction of the peripheral to be tested sent by the interactive simulation platform;

scanning the peripheral to be tested mounted on the local peripheral to be tested bus according to the peripheral information query instruction to obtain peripheral information to be tested;

and feeding back the information of the peripheral equipment to be tested to the interactive simulation platform.

3. The SOC prototype verification method according to claim 1, wherein before receiving the operation command sent by the interactive simulation platform through the local uart interface, the method further comprises:

running a local pre-stored u-boot code through the local ARM core so that the local ARM core enters a command parser interface;

and sending simulation preparation completion information to the interactive simulation platform through the local uart interface so that the interactive simulation platform sends the operation command to the local after receiving the simulation preparation completion information.

4. An SOC prototype verification method is applied to an interactive simulation platform and comprises the following steps:

sending an operation command to the SOC prototype system to be tested through a locally preset u-boot simulation interaction module;

receiving a verification result returned after the SOC prototype system to be tested executes the operation command through the u-boot simulation interaction module;

and comparing the verification result with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral to be tested corresponding to the verification result is normal or not, wherein the expected result is an operation result corresponding to the operation command in a local expected result library.

5. The SOC prototype verification method according to claim 4, wherein before sending the operation command to the SOC prototype system to be tested through the locally preset u-boot simulation interaction module, the method further comprises:

sending a peripheral information query instruction to be tested to the SOC prototype system to be tested;

and receiving the information of the to-be-tested peripheral returned by the SOC prototype system according to the query instruction of the to-be-tested peripheral so as to determine the operation command from the local interaction command set according to the information of the to-be-tested peripheral.

6. The SOC prototype verification method according to claim 4, wherein before sending the operation command to the SOC prototype system to be tested through the locally preset u-boot simulation interaction module, the method further comprises:

and receiving simulation preparation completion information sent by the SOC prototype system to be tested through the u-boot simulation interaction module so as to send the operation command to the SOC prototype system to be tested according to the simulation preparation completion information.

7. The SOC prototype verification method according to claim 4, wherein after comparing the verification result with an expected result through a locally preset simulation control module, further comprising:

if the verification result is inconsistent with the expected result, inquiring the running state of an ARM core in the SOC prototype system to be tested;

and if the ARM core is in an abnormal state, stopping the simulation interaction.

8. A system for testing a prototype of an SOC, comprising:

the uart interface is used for receiving an operation command sent by the interactive simulation platform;

the command parser runs on the ARM core and is used for parsing the operating command and converting the operating command into a peripheral driving operating command;

the peripheral bus to be tested is used for sending the peripheral driving operation command to the corresponding peripheral to be tested;

and the uart interface is used for feeding back a verification result to the interactive simulation platform, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

9. An electronic device, comprising:

a memory and a processor;

wherein the memory is used for storing a computer program;

the processor is configured to execute the computer program to implement the SOC prototype verification method according to any one of claims 1 to 7.

10. A computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the SOC prototype verification method according to any of claims 1 to 7.

Technical Field

The present application relates to the field of SOC technologies, and in particular, to a method, a system, a device, and a medium for verifying an SOC prototype.

Background

In the development process of SOC (System on Chip) Chip design, a prototype simulation method is usually used to verify the function and performance of a digital circuit design. In the existing original simulation of the SOC chip, a large amount of codes are generally required to be added in the SOC prototype design to construct a communication interface for simulation so as to connect an SOC prototype design circuit with a driving module and a monitoring module of a simulation platform and realize simulation interaction and control. Correspondingly, a set of self-defined communication and control mechanism needs to be designed for the communication interface to transmit system excitation and assist in controlling the simulation flow. The set of self-defined mechanism is additionally verified before simulation, and the self-defined mechanism cannot be continuously used after the design of the SOC chip needing verification is completed, so that the workload is greatly increased, and the universality and the working efficiency are reduced.

Disclosure of Invention

In view of this, an object of the present application is to provide a method, an apparatus, a device, and a medium for verifying an SOC prototype, which can improve the universality of an SOC prototype verification system, reduce the workload of the entire SOC prototype verification, and improve the work efficiency of the verification. The specific scheme is as follows:

in a first aspect, the present application discloses a method for verifying an SOC prototype, which is applied to an SOC prototype system to be tested, and includes:

receiving an operation command sent by an interactive simulation platform through a local uart interface;

analyzing the operation command through a command analyzer running on the local ARM core, and converting the operation command into a peripheral driving operation command;

sending the peripheral driving operation command to the corresponding peripheral to be tested through a local peripheral bus to be tested;

and feeding back a verification result to the interactive simulation platform through the uart interface, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

Optionally, before receiving, through the local uart interface, the operation command sent by the interactive simulation platform, the method further includes:

receiving an information query instruction of the peripheral to be tested sent by the interactive simulation platform;

scanning the peripheral to be tested mounted on the local peripheral to be tested bus according to the peripheral information query instruction to obtain peripheral information to be tested;

and feeding back the information of the peripheral equipment to be tested to the interactive simulation platform.

Optionally, before receiving, through the local uart interface, the operation command sent by the interactive simulation platform, the method further includes:

running a local pre-stored u-boot code through the local ARM core so that the local ARM core enters a command parser interface;

and sending simulation preparation completion information to the interactive simulation platform through the uart, so that the interactive simulation platform sends the operation command to the local after receiving the simulation preparation completion information.

In a second aspect, the present application discloses an SOC prototype verification method applied to an interactive simulation platform, including:

sending an operation command to the SOC prototype system to be tested through a locally preset u-boot simulation interaction module;

receiving a verification result returned after the SOC prototype system to be tested executes the operation command through the u-boot simulation interaction module;

and comparing the verification result with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral to be tested corresponding to the verification result is normal or not, wherein the expected result is an operation result corresponding to the operation command in a local expected result library.

Optionally, before the sending the operation command to the SOC prototype system to be tested through the locally preset u-boot simulation interaction module, the method further includes:

sending a peripheral information query instruction to be tested to the SOC prototype system to be tested;

and receiving the information of the to-be-tested peripheral returned by the SOC prototype system according to the query instruction of the to-be-tested peripheral so as to determine the operation command from the local interaction command set according to the information of the to-be-tested peripheral.

Optionally, before the sending the operation command to the SOC prototype system to be tested through the locally preset u-boot simulation interaction module, the method further includes:

and receiving simulation preparation completion information sent by the SOC prototype system to be tested through the u-boot simulation interaction module so as to send the operation command to the SOC prototype system to be tested according to the simulation preparation completion information.

Optionally, before the sending the operation command to the SOC prototype system to be tested through the locally preset u-boot simulation interaction module, the method further includes:

and receiving simulation preparation completion information sent by the SOC prototype system to be tested through the u-boot simulation interaction module so as to send the operation command to the SOC prototype system to be tested according to the simulation preparation completion information.

In a third aspect, the present application discloses a SOC prototype system to be tested, including:

the uart interface is used for receiving an operation command sent by the interactive simulation platform;

the command parser runs on the ARM core and is used for parsing the operating command and converting the operating command into a peripheral driving operating command;

the peripheral bus to be tested is used for sending the peripheral driving operation command to the corresponding peripheral to be tested;

and the uart interface is used for feeding back a verification result to the interactive simulation platform, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

In a fourth aspect, the present application discloses an electronic device, comprising:

a memory and a processor;

wherein the memory is used for storing a computer program;

the processor is configured to execute the computer program to implement the SOC prototype verification method disclosed above.

In a fifth aspect, the present application discloses a computer readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the SOC prototype verification method disclosed above.

It can be seen that this application receives the operating command that interactive simulation platform sent through local uart interface earlier, then the rethread the command resolver who runs on the local ARM core is right operating command analyzes to convert peripheral hardware drive operating command into, will through the peripheral hardware bus that awaits measuring afterwards peripheral hardware drive operating command sends corresponding peripheral hardware that awaits measuring, and passes through the uart interface feeds back the verification result to interactive simulation platform, wherein, the verification result is the peripheral hardware that awaits measuring carries out the result that obtains behind the peripheral hardware drive operating command. Therefore, by presetting the uart interface and the command parser on the SOC prototype system to be verified, the operating command sent by the interactive simulation platform can be received through the uart interface, and the received operating command is parsed through the command parser, so that the simulation interaction between the SOC prototype system to be tested and the interactive simulation platform is realized, and the prototype verification of the SOC prototype system to be tested can be completed.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1 is a flowchart of a method for verifying a prototype SOC disclosed herein;

FIG. 2 is a schematic diagram of a system for verifying a prototype SOC according to the present disclosure;

FIG. 3 is a flowchart of a specific SOC prototype verification method disclosed herein;

FIG. 4 is a flowchart of a method for verifying a prototype SOC disclosed herein;

FIG. 5 is a flowchart of a specific SOC prototype verification method disclosed herein;

FIG. 6 is a schematic structural diagram of a test SOC prototype system according to the present disclosure;

FIG. 7 is a schematic structural diagram of an interactive simulation platform disclosed in the present application;

fig. 8 is a schematic structural diagram of an electronic device disclosed in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

At present, in the original simulation of an SOC chip, a large amount of codes are generally required to be added in the SOC prototype design to construct a communication interface for simulation, so as to connect an SOC prototype design circuit and a driving module and a monitoring module of a simulation platform, and realize simulation interaction and control. Correspondingly, a set of self-defined communication and control mechanism needs to be designed for the communication interface to transmit system excitation and assist in controlling the simulation flow. The set of self-defined mechanism is additionally verified before simulation, and the self-defined mechanism cannot be continuously used after the design of the SOC chip needing verification is completed, so that the workload is greatly increased, and the universality and the working efficiency are reduced. In view of this, the present application provides an SOC prototype verification method, which can improve the universality of an SOC prototype verification system, reduce the workload of the entire SOC prototype verification, and improve the working efficiency of the verification.

Referring to fig. 1, an embodiment of the present application discloses an SOC prototype verification method applied to an SOC prototype system to be tested, including:

step S11: and receiving an operation command sent by the interactive simulation platform through a local uart interface.

In a specific implementation process, an operation command sent by a corresponding interactive simulation platform needs to be received through a local uart (universal asynchronous receiver transmitter), where the operation command is an operation command sent by a uart protocol. After receiving the operation command through the local uart interface, the local uart interface is further required to analyze the operation command according to a uart protocol, so as to obtain an analyzed operation command. Among them, prototype verification generally refers to verifying the functionality and performance of Application Specific Integrated Circuits (ASICs) and systems on a chip (SOCs) by migrating the digital design of the chip to a Field Programmable Gate Array (FPGA).

Step S12: and analyzing the operation command through a command analyzer running on a local ARM core, and converting the operation command into a peripheral driving operation command.

After the operation command is received through the local uart interface, the operation command can be sent to a command parser running on an ARM core (ARM core) through the local uart interface, and the operation command is parsed and converted into a peripheral driving operation command through the command parser, so that the peripheral driving operation command is used for performing simulation verification on a local peripheral to be tested.

Step S13: and sending the peripheral driving operation command to the corresponding peripheral to be tested through a local peripheral bus to be tested.

It can be understood that after the peripheral driving operation command is obtained, the peripheral driving operation command may be sent to the corresponding peripheral to be tested through the local peripheral bus to be tested, so that the peripheral to be tested executes the peripheral driving operation command, the peripheral to be tested performs corresponding processing when executing the peripheral driving operation command, and a processing form is determined by characteristics of the peripheral to be tested, for example, updating a state register of the peripheral to be tested, generating an interrupt, printing a display-back character string, and the like.

Step S14: and feeding back a verification result to the interactive simulation platform through the uart interface, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

After the peripheral to be tested executes the peripheral driving operation command, the peripheral to be tested returns a verification result to the local ARM core, the local ARM core feeds back the verification result to the uart interface, and the verification result is fed back to the interactive simulation platform through the uart interface, wherein the verification result includes but is not limited to the echoing character string and the like.

It can be seen that this application receives the operating command that interactive simulation platform sent through local uart interface earlier, then the rethread the command resolver who runs on the local ARM core is right operating command analyzes to convert peripheral hardware drive operating command into, will through the peripheral hardware bus that awaits measuring afterwards peripheral hardware drive operating command sends corresponding peripheral hardware that awaits measuring, and passes through the uart interface feeds back the verification result to interactive simulation platform, wherein, the verification result is the peripheral hardware that awaits measuring carries out the result that obtains behind the peripheral hardware drive operating command. Therefore, by presetting the uart interface and the command parser on the SOC prototype system to be verified, the operating command sent by the interactive simulation platform can be received through the uart interface, and the received operating command is parsed through the command parser, so that the simulation interaction between the SOC prototype system to be tested and the interactive simulation platform is realized, and the prototype verification of the SOC prototype system to be tested can be completed.

Referring to fig. 2, an embodiment of the present application discloses a specific SOC prototype verification system, including: the SOC prototype system to be tested comprises a DDR (Double Data Rate), a QSPI flash, an ARM core (ARM core), a uart interface, a peripheral bus to be tested, a query interface and a plurality of peripherals to be tested, the peripherals to be tested are mounted to the ARM core through the peripheral bus to be tested, access control of the ARM core is received, the ARM core uses the DDR as a running memory and uses the QSPI flash as a u-boot starting medium, and the ARMcore reads a compiled u-boot program from the QSPI flash during starting to run and start. The ARM core uses a uart interface as a u-boot interaction interface to receive command excitation and send command running result information, and a query interface is reserved in a peripheral access bus of the SoC prototype system to be tested for a simulation control module to directly query the state of the peripheral to be tested so as to assist in judging the working result of the peripheral to be tested.

The interactive simulation platform comprises a u-boot simulation interactive module, a simulation control module, an interactive command set and an expected result library. The u-boot simulation interaction module is responsible for interacting with a uart interface of the SOC prototype system to be tested, and the simulation control module is responsible for simulating a process and checking a simulation result. The set of interaction commands and the library of expected results are used by the simulation control module. The interactive command set comprises control commands of the u-boot codes to various peripherals to be tested, and the control commands are generated through script statistics before simulation. The expected result library comprises corresponding state indication information of the peripheral to be tested after receiving the driving instruction, and the state indication information is generally expressed as an expected value of a peripheral register.

Referring to fig. 3, the embodiment of the present application discloses a specific SOC prototype verification method applied to an SOC prototype system to be tested, where the method includes:

step S21: and receiving an information query instruction of the peripheral equipment to be tested, which is sent by the interactive simulation platform.

In a specific application process, a peripheral information query instruction to be tested sent by the interactive simulation platform needs to be received first, and specifically, the peripheral information query instruction to be tested sent by a simulation control module in the interactive simulation platform is received through a local query interface.

Step S22: and scanning the peripheral to be tested mounted on the local peripheral to be tested bus according to the peripheral information query instruction to obtain the peripheral information to be tested.

After receiving the peripheral information query instruction to be tested, the peripheral to be tested mounted on the local peripheral bus to be tested needs to be scanned to obtain the peripheral information to be tested. The information of the peripheral to be tested comprises the number and the type of the peripheral to be tested.

Step S23: and feeding back the information of the peripheral equipment to be tested to the interactive simulation platform.

After the information of the peripheral equipment to be tested is obtained, the information of the peripheral equipment to be tested can be fed back to the interactive platform, so that the interactive simulation platform can determine the operation command to be sent according to the information of the peripheral equipment to be tested. Specifically, the information of the peripheral to be tested is fed back to the simulation control module in the interactive simulation platform through the local query interface.

Step S24: and running a local pre-stored u-boot code through a local ARM core so that the local ARM core enters a command parser interface.

After the emulation is started, a local pre-saved u-boot code needs to be run through a local ARM core, so that the local ARM core enters a command parser interface. Specifically, the local ARM core reads a u-boot code from the QSPI flash to run and correctly enter a command resolver interface. And after the u-boot enters the command parser interface, receiving an operation command through a uart interface, and performing command line interaction with the simulation platform.

Step S25: and sending simulation preparation completion information to the interactive simulation platform through the local uart interface so that the interactive simulation platform sends the operation command to the local after receiving the simulation preparation completion information.

After entering a command parser interface, calling the local uart interface to send simulation preparation completion information to the interactive simulation platform, so that the interactive simulation platform sends the operation command to the local after receiving the simulation preparation completion information.

Step S26: and receiving an operation command sent by the interactive simulation platform through a local uart interface.

Step S27: and analyzing the operation command through a command analyzer running on the local ARM core, and converting the operation command into a peripheral driving operation command.

Step S28: and sending the peripheral driving operation command to the corresponding peripheral to be tested through a local peripheral bus to be tested.

Step S29: and feeding back a verification result to the interactive simulation platform through the uart interface, wherein the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

The specific implementation of steps S26 to S29 may refer to the corresponding content disclosed in the foregoing embodiments, and will not be described herein again.

Referring to fig. 4, an embodiment of the present application discloses an SOC prototype verification method applied to an interactive simulation platform, where the method includes:

step S31: and sending an operation command to the SOC prototype system to be tested through a locally preset u-boot simulation interaction module.

In a specific implementation process, firstly, an operation command needs to be sent to the SOC prototype system to be tested through a locally preset u-boot simulation interaction module. Specifically, an operation command is sent to a uart interface in the SOC prototype system to be tested through a locally preset u-boot simulation interaction module, so that after the uart interface receives the operation command, the operation command is correspondingly processed to drive the peripheral to be tested to perform simulation operation.

Step S32: and receiving a verification result returned after the SOC prototype system to be tested executes the operation command through the u-boot simulation interaction module.

After the operation command is sent to the SOC prototype to be tested, a verification result returned after the operation command is executed by the SOC prototype system to be tested is received through the u-boot simulation interaction module. Specifically, the u-boot simulation interaction module receives a verification result sent by a uart interface in the SOC prototype system to be tested, wherein the verification result is obtained after the operating command is executed by the corresponding peripheral to be tested in the SOC prototype system to be tested. After receiving the verification result, since the verification result is sent according to the uart protocol, the received verification result needs to be analyzed first, and the analyzed verification result is transmitted to the local simulation control module.

Step S33: and comparing the verification result with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral to be tested corresponding to the verification result is normal or not, wherein the expected result is an operation result corresponding to the operation command in a local expected result library.

After the verification result is received, the verification result is compared with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral to be tested corresponding to the verification result is normal, wherein the expected result is an operation result corresponding to the operation command in a local expected result library. The verification result includes, but is not limited to, a echoed string.

In addition, the simulation control module can also monitor a register of the peripheral to be tested through a query interface in the SOC prototype system to be tested. Therefore, the simulation control module can compare the received redisplay character string and the register information of the peripheral to be tested with the expected result to judge whether the redisplay character string accords with the expected result or whether the register state of the peripheral to be tested accords with the expected result, and further judge whether the behavior of the peripheral to be tested is correct.

And if the behavior of the peripheral to be tested accords with the expected result in the interactive simulation process, continuing to execute subsequent simulation operation until the simulation verification sequence is completely finished, and stopping the interactive simulation. If the behavior of the peripheral to be tested is abnormal, recording the behavior, then inquiring whether the ARM core still works normally, and/or judging whether the interactive simulation platform can continue to operate, and if so, continuing to verify other peripheral to be tested. If the interactive simulation platform cannot continue to operate due to the abnormal behavior of a certain peripheral to be tested, the simulation is stopped, and the completed simulation result and the abnormal error are recorded for subsequent debugging.

It can be seen that, in the present application, an operation command may be sent to the SOC prototype system to be tested through a locally preset u-boot simulation interaction module, then a verification result returned after the SOC prototype system to be tested executes the operation command is received through the u-boot simulation interaction module, and then the verification result is compared with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral device to be tested corresponding to the verification result is normal, where the expected result is an operation result corresponding to the operation command in a local expected result library. Therefore, the simulation process of the SOC prototype system to be tested can be controlled through the locally preset u-boot simulation interaction module and the simulation control module, the method is also suitable for different SOC prototype systems to be tested, the universality of the SOC prototype verification system is improved, the workload of the whole SOC prototype verification is reduced, and the verification work efficiency is improved.

Referring to fig. 5, an embodiment of the present application discloses a specific SOC prototype verification method applied to an interactive simulation platform, where the method includes:

step S41: and sending a peripheral equipment information query instruction to be tested to the SOC prototype system to be tested.

In practical application, when simulation is started, a peripheral information query instruction to be tested needs to be sent to the SOC prototype system to be tested, and specifically, the peripheral information query instruction to be tested is sent to a query interface of the SOC prototype system to be tested through a local simulation control module so as to obtain relevant information of a peripheral to be tested.

Step S42: and receiving the information of the to-be-tested peripheral returned by the SOC prototype system according to the query instruction of the to-be-tested peripheral so as to determine the operation command from the local interaction command set according to the information of the to-be-tested peripheral.

After the query instruction of the peripheral to be tested is sent to the query interface, the simulation control module can receive the peripheral information to be tested returned by the SOC prototype system to be tested according to the query instruction of the peripheral to be tested, so that the operation command can be determined from the local interaction command set according to the peripheral information to be tested. Specifically, after receiving the information of the peripheral to be tested, the simulation control module extracts an operation command set and a corresponding expected result set of the corresponding peripheral from a local interaction command set and an expected result library according to the information of the peripheral to be tested, so as to form a simulation verification command sequence and a corresponding result sequence of a tree structure. And sending the operation command to a local u-boot simulation interaction module. And when the operation command to be sent to the u-boot simulation interaction module is determined, searching the operation command set of the simulation verification command sequence by using a depth-first search mode, ensuring that the operation command of each peripheral is traversed, and improving the simulation coverage rate of the peripheral to be tested.

Step S43: and receiving simulation preparation completion information sent by the SOC prototype system to be tested through the u-boot simulation interaction module so as to send the operation command to the SOC prototype system to be tested according to the simulation preparation completion information.

After the simulation preparation of the SOC prototype system to be tested is completed, simulation preparation completion information is sent to the local through a uart interface, and correspondingly, the simulation preparation completion information sent by the SOC prototype system to be tested can be received through the u-boot simulation interaction module, so that the operation command can be sent to the SOC prototype system to be tested according to the simulation preparation completion information.

Step S44: and sending an operation command to the SOC prototype system to be tested through the u-boot simulation interaction module.

After receiving the simulation preparation completion information, the u-boot simulation interaction module can send an operation command to the SOC prototype system to be tested so as to perform simulation verification on the peripheral equipment to be tested in the SOC prototype system to be tested.

Step S45: and receiving a verification result returned after the SOC prototype system to be tested executes the operation command through the u-boot simulation interaction module.

Step S46: and comparing the verification result with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral to be tested corresponding to the verification result is normal or not, wherein the expected result is an operation result corresponding to the operation command in a local expected result library.

The specific implementation of steps S45 to S46 may refer to the corresponding content disclosed in the foregoing embodiments, and will not be described herein again.

Referring to fig. 6, an embodiment of the present application discloses a SOC prototype system to be tested, including:

the uart interface 11 is used for receiving an operation command sent by the interactive simulation platform;

the command parser 12 runs on the ARM core and is used for parsing the operation command and converting the operation command into a peripheral driving operation command;

the peripheral bus to be tested 13 is used for sending the peripheral driving operation command to the corresponding peripheral to be tested;

the uart interface 11 is configured to feed back a verification result to the interactive simulation platform, where the verification result is a result obtained after the peripheral to be tested executes the peripheral driving operation command.

It can be seen that this application receives the operating command that interactive simulation platform sent through local uart interface earlier, then the rethread the command resolver who runs on the local ARM core is right operating command analyzes to convert peripheral hardware drive operating command into, will through the peripheral hardware bus that awaits measuring afterwards peripheral hardware drive operating command sends corresponding peripheral hardware that awaits measuring, and passes through the uart interface feeds back the verification result to interactive simulation platform, wherein, the verification result is the peripheral hardware that awaits measuring carries out the result that obtains behind the peripheral hardware drive operating command. Therefore, by presetting the uart interface and the command parser on the SOC prototype system to be verified, the operating command sent by the interactive simulation platform can be received through the uart interface, and the received operating command is parsed through the command parser, so that the simulation interaction between the SOC prototype system to be tested and the interactive simulation platform is realized, and the prototype verification of the SOC prototype system to be tested can be completed.

Referring to fig. 7, an embodiment of the present application discloses an interactive simulation platform, including:

the u-boot simulation interaction module 21 is used for sending an operation command to the SOC prototype system to be tested;

the u-boot simulation interaction module 21 is configured to receive a verification result returned after the SOC prototype system to be tested executes the operation command;

and the simulation control module 22 is configured to compare the verification result with an expected result to determine whether the behavior of the peripheral to be tested corresponding to the verification result is normal, where the expected result is an operation result corresponding to the operation command in the local expected result library.

It can be seen that, in the present application, an operation command may be sent to the SOC prototype system to be tested through a locally preset u-boot simulation interaction module, then a verification result returned after the SOC prototype system to be tested executes the operation command is received through the u-boot simulation interaction module, and then the verification result is compared with an expected result through a locally preset simulation control module to determine whether the behavior of the peripheral device to be tested corresponding to the verification result is normal, where the expected result is an operation result corresponding to the operation command in a local expected result library. Therefore, the simulation process of the SOC prototype system to be tested can be controlled through the locally preset u-boot simulation interaction module and the simulation control module, the method is also suitable for different SOC prototype systems to be tested, the universality of the SOC prototype verification system is improved, the workload of the whole SOC prototype verification is reduced, and the verification work efficiency is improved.

Further, referring to fig. 8, a schematic structural diagram of an electronic device 30 provided in the embodiment of the present application is shown, where the electronic device 30 may implement the SOC prototype verification method disclosed in the foregoing embodiment.

In general, the electronic device 30 in the present embodiment includes: a processor 31 and a memory 32.

The processor 31 may include one or more processing cores, such as a four-core processor, an eight-core processor, and so on. The processor 31 may be implemented by at least one hardware of a DSP (digital signal processing), an FPGA (field-programmable gate array), and a PLA (programmable logic array). The processor 31 may also include a main processor and a coprocessor, where the main processor is a processor for processing data in an awake state, and is also called a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor 31 may be integrated with a GPU (graphics processing unit) which is responsible for rendering and drawing images to be displayed on the display screen. In some embodiments, the processor 31 may include an AI (artificial intelligence) processor for processing computing operations related to machine learning.

Memory 32 may include one or more computer-readable storage media, which may be non-transitory. Memory 32 may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory 32 is at least used for storing the following computer program 321, wherein after being loaded and executed by the processor 31, the steps of the SOC prototype verification method disclosed in any of the foregoing embodiments can be implemented. In addition, the resources stored in the memory 32 may also include an operating system 322, data 323, and the like, and the storage manner may be a transient storage or a permanent storage. The operating system 222 may be Windows, Unix, Linux, or the like. The data 323 may include a variety of data.

In some embodiments, the electronic device 30 may further include a display 33, an input/output interface 34, a communication interface 35, a sensor 36, a power source 37, and a communication bus 38.

Those skilled in the art will appreciate that the configuration shown in FIG. 8 is not limiting of electronic device 30 and may include more or fewer components than those shown.

Further, an embodiment of the present application also discloses a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the SOC prototype verification method disclosed in any of the foregoing embodiments.

For the specific process of the SOC prototype verification method, reference may be made to the corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.

The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

Finally, it is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of other elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The SOC prototype verification method, system, device, and medium provided by the present application are introduced in detail, and specific examples are applied in the present application to explain the principles and embodiments of the present application, and the descriptions of the above embodiments are only used to help understand the method and core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.