阅读说明：本技术 一种碳化硅器件的门极驱动电路及驱动方法 (Gate drive circuit and drive method of silicon carbide device ) 是由 张勇 刘平 于 2020-06-24 设计创作，主要内容包括：本发明公开了一种碳化硅器件的门极驱动电路及驱动方法,能够抑制导通过程中电流过冲,有效的提高电路系统的可靠性,减小了碳化硅器件的导通损耗。门极驱动电路包括：驱动模块、分压模块、积分模块及差分模块；驱动模块根据脉冲宽度调制信号生成原始驱动信号；分压模块对原始驱动信号进行分压处理,得到第一电压信号和第二电压信号,将第一电压信号发送至积分模块,将第二电压信号发送至差分模块；积分模块对第一电压信号进行预置时间的延迟处理；差分模块对延迟处理后的第一电压信号和第二电压信号进行差分运算,得到输出信号,使得在预置时间之前,输出信号为第二电压信号,在预置时间之后,输出信号的电压值小于第二电压信号的电压值。(The invention discloses a gate drive circuit and a gate drive method of a silicon carbide device, which can inhibit current overshoot in a conduction process, effectively improve the reliability of a circuit system and reduce the conduction loss of the silicon carbide device. The gate drive circuit includes: the device comprises a driving module, a voltage division module, an integration module and a difference module; the driving module generates an original driving signal according to the pulse width modulation signal; the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, and the second voltage signal is sent to the difference module; the integration module carries out delay processing of preset time on the first voltage signal; and the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, so that the output signal is the second voltage signal before the preset time, and the voltage value of the output signal is smaller than that of the second voltage signal after the preset time.)

1. A gate drive circuit for a silicon carbide device, comprising:

the device comprises a driving module, a voltage division module, an integration module and a difference module;

the driving module is connected with the voltage dividing module;

the voltage division module is connected with the integration module and the difference module;

the differential module is connected with the integration module, the voltage division module and the grid electrode of the silicon carbide device;

the driving module generates an original driving signal according to a pulse width modulation signal, and sends the original driving signal to the voltage division module, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;

the voltage division module divides the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, the second voltage signal is sent to the difference module, and the second voltage signal is the same as the original driving signal;

the integration module carries out delay processing on the first voltage signal for preset time, wherein the preset time is in a drain current rising stage of the silicon carbide device;

and the difference module performs difference operation on the first voltage signal and the second voltage signal after delay processing to obtain an output signal, so that the output signal is the second voltage signal before preset time, and the voltage value of the output signal is smaller than that of the second voltage signal after the preset time.

2. The gate drive circuit of claim 1, wherein the voltage divider module comprises:

the first voltage division unit and the second voltage division unit;

the first end of the second voltage division unit is connected with the driving module and the differential module;

the first end of the first voltage division unit is connected with the second end of the second voltage division unit and the integration module, and the second end of the first voltage division unit is grounded.

3. The gate drive circuit of claim 2, wherein the integration module comprises:

an integral resistance unit and an integral capacitance unit;

the first end of the integral resistance unit is connected with the first end of the first voltage division unit and the second end of the second voltage division unit;

the second end of the integrating resistor unit is connected with the first end of the integrating capacitor unit and the differential module, and the second end of the integrating capacitor unit is grounded.

4. The gate drive circuit of claim 3, wherein the differential module comprises:

the circuit comprises a first resistance unit, a second resistance unit, a third resistance unit, a fourth resistance unit and a subtracter;

the first end of the first resistance unit is connected with the second end of the integrating resistance unit and the first end of the integrating capacitor unit, and the second end of the first resistance unit is connected with the first end of the second resistance unit and the positive input end of the subtracter;

the second end of the second resistance unit is connected with the output end of the subtracter;

the first end of the third resistance unit is connected with the first end of the second voltage division unit, and the second end of the third resistance unit is connected with the first end of the fourth resistance unit and the negative input end of the subtracter;

the second end of the fourth resistance unit is grounded.

5. The gate drive circuit of claim 2,

the first voltage division unit and the second voltage division unit are respectively a first voltage division resistor and a second voltage division resistor;

the resistance value of the first voltage-dividing resistor is R1, the resistance value of the second voltage-dividing resistor is R2, the voltage value of the first voltage signal is U1, the voltage value of the second voltage signal is U2, and the resistance relationships between the first voltage-dividing resistor and the second voltage-dividing resistor are as follows:

U1/U2＝R1/(R1+R2)。

6. the gate drive circuit of claim 3,

the integral resistance unit is an integral resistor, and the integral capacitor unit is an integral capacitor;

the resistance value of the integration resistor is R3, the capacitance value of the integration capacitor is C, and the value of the preset time is T;

the relationship between the resistance value of the integration resistor and the capacitance value of the integration capacitor is as follows:

T＝R3*C。

7. the gate drive circuit of claim 4,

the resistance value of the first resistance unit is R4, the resistance value of the second resistance unit is R5, the resistance value of the third resistance unit is R6, and the resistance value of the fourth resistance unit is R7;

the resistance value relations of the first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit are as follows:

R5/R4＝R7/R6＝1。

8. the gate drive circuit of claim 1, further comprising:

the driving circuit comprises a positive driving single-phase conduction diode, a negative driving single-phase conduction diode, a positive driving resistor and a negative driving resistor;

the positive electrode of the positive driving single-phase conduction diode is connected with the driving module, and the negative electrode of the positive driving single-phase conduction diode is connected with the first end of the second voltage division unit;

the first end of the positive driving resistor is connected with the output end of the subtracter, and the second end of the positive driving resistor is connected with the grid electrode of the silicon carbide device;

the first end of the negative driving resistor is connected with the grid electrode of the silicon carbide device, the second end of the negative driving resistor is connected with the positive electrode of the negative driving single-phase conducting diode, and the negative electrode of the negative driving single-phase conducting diode is connected with the driving module.

9. A method for driving a silicon carbide device, applied to a gate driving circuit of the silicon carbide device according to any one of claims 1 to 8, the method comprising:

the driving module receives a pulse width modulation signal and generates an original driving signal, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;

the voltage division module divides the original driving signal to obtain a first voltage signal and a second voltage signal, wherein the second voltage signal is the same as the original driving signal;

the integration module carries out delay processing on the first voltage signal for preset time, and the preset time is in a drain current rising stage of the silicon carbide device;

before the preset time, the output signal of the difference module is a second voltage signal;

after the preset time, the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, wherein the voltage value of the output signal is smaller than that of the second voltage signal.

Technical Field

The invention relates to the field of circuits, in particular to a gate drive circuit and a gate drive method of a silicon carbide device.

Background

The traditional silicon (Si) material power device has narrow forbidden band width and low blocking voltage, is difficult to meet the requirements of a new generation of power system in the aspects of energy consumption, working temperature and switching frequency, and becomes a bottleneck of the development of power electronic technology. Silicon carbide (SiC) is a new semiconductor material with a wide bandgap and a high breakdown voltage, and has a bandgap width about 3 times that of Si material and a breakdown voltage more than 10 times that of Si material. Compared with the traditional Si-based power device, the SiC MOSFET has the advantages of higher blocking voltage, lower on-state resistance, good heat conduction characteristic, high-speed switching-on and switching-off capability and the like, and has huge advantages which cannot be compared with the traditional power device in the application fields of electric automobile driving, aerospace, new energy industry and the like.

Although the SiC MOSFET has many advantages in application, because the SiC MOSFET has a very high switching speed, the SiC MOSFET is very sensitive to package, wiring, stray parasitic inductance of lines, and a node capacitance of a device itself of a driving circuit, and mainly reflects that in application of high voltage, high power, and high switching speed, the SiC MOSFET is easy to generate a very high voltage change rate (dv/dt) and a very high current change rate (di/dt) when being turned on and off, which causes problems of current overshoot, voltage overshoot, and long-term switching oscillation, and can significantly increase device loss, seriously affect performances of a system, such as efficiency, electromagnetic compatibility, and the like, and reduce system reliability.

In order to protect the SiC device, measures are usually taken to suppress overcurrent and overvoltage, although the conventional method for changing the driving resistance can delay the rising and falling time of current, the switching delay and the miller platform time are increased, so that the SiCMOSFET generates larger switching loss, and the efficiency of the converter is influenced; although the existing method for adding the buffer circuit can effectively reduce the turn-off overvoltage of the SiC MOSFET, the turn-on overcurrent cannot be reduced, and the buffer circuit needs a high-voltage device, so that the loss of the circuit cannot be reduced, and larger additional loss can be brought; although the existing closed-loop active driving circuit can accurately control the waveform of the switching process, suppress voltage and current spikes and reduce switching loss, the realization is complex, high-speed and high-bandwidth operational amplifier, a D/A conversion chip, an FPGA and other devices are needed, the realization cost is high, and the control delay is long; the existing multi-drive resistance control method switches resistance to control the switching speed in a delay stage, a current rising stage and a Miller platform stage, each parallel branch comprises a bidirectional switch, and because the switching process of a SiCMOS field effect transistor is short, a faster drive circuit needs to be added to the bidirectional switch, a CPLD/FPGA is generally adopted to realize multi-drive resistance control, and the cost and complexity of the system are increased.

Therefore, the existing technologies cannot simultaneously solve the problems of current overshoot, system reliability and conduction loss.

Disclosure of Invention

The invention aims to provide a gate drive circuit and a gate drive method of a silicon carbide device, which can inhibit current overshoot in the conduction process, effectively improve the reliability of a circuit system and reduce the conduction loss of the silicon carbide device.

In a first aspect, the present invention provides a gate drive circuit for a silicon carbide device, comprising:

the device comprises a driving module, a voltage division module, an integration module and a difference module;

the driving module is connected with the voltage dividing module;

the voltage division module is connected with the integration module and the difference module;

the differential module is connected with the integration module, the voltage division module and the grid electrode of the silicon carbide device;

the driving module generates an original driving signal according to the pulse width modulation signal, and sends the original driving signal to the voltage division module, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;

the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, the second voltage signal is sent to the difference module, and the second voltage signal is the same as the original driving signal;

the integration module carries out delay processing of preset time on the first voltage signal, and the preset time is in a drain current rising stage of the silicon carbide device;

and the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, so that the output signal is the second voltage signal before the preset time, and the voltage value of the output signal is smaller than that of the second voltage signal after the preset time.

Further, the voltage division module comprises:

the first voltage division unit and the second voltage division unit;

the first end of the second voltage division unit is connected with the driving module and the differential module;

the first end of the first voltage division unit is connected with the second end of the second voltage division unit and the integration module, and the second end of the first voltage division unit is grounded.

Further, the integration module includes:

an integral resistance unit and an integral capacitance unit;

the first end of the integral resistance unit is connected with the first end of the first voltage division unit and the second end of the second voltage division unit;

the second end of the integrating resistance unit is connected with the first end of the integrating capacitor unit and the difference module, and the second end of the integrating capacitor unit is grounded.

Further, the difference module includes:

the circuit comprises a first resistance unit, a second resistance unit, a third resistance unit, a fourth resistance unit and a subtracter;

the first end of the first resistance unit is connected with the second end of the integral resistance unit and the first end of the integral capacitor unit, and the second end of the first resistance unit is connected with the first end of the second resistance unit and the positive input end of the subtracter;

the second end of the second resistance unit is connected with the output end of the subtracter;

the first end of the third resistance unit is connected with the first end of the second voltage division unit, and the second end of the third resistance unit is connected with the first end of the fourth resistance unit and the negative input end of the subtracter;

the second end of the fourth resistance unit is grounded.

Further, in the above-mentioned case,

the first voltage division unit and the second voltage division unit are respectively a first voltage division resistor and a second voltage division resistor;

the resistance value of the first voltage-dividing resistor is R1, the resistance value of the second voltage-dividing resistor is R2, the voltage value of the first voltage signal is U1, the voltage value of the second voltage signal is U2, and the resistance value relationship of the first voltage-dividing resistor and the second voltage-dividing resistor is as follows:

U1/U2＝R3/(R3+R4)。

further, in the above-mentioned case,

the integral resistance unit is an integral resistor, and the integral capacitor unit is an integral capacitor;

the resistance value of the integrating resistor is R3, the capacitance value of the integrating capacitor is C, and the value of the preset time is T;

the relationship between the resistance value of the integrating resistor and the capacitance value of the integrating capacitor is as follows:

T＝R3*C。

further, in the above-mentioned case,

the resistance value of the first resistor unit is R4, the resistance value of the second resistor unit is R5, the resistance value of the third resistor unit is R6, and the resistance value of the fourth resistor unit is R7;

the resistance value relations of the first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit are as follows:

R5/R4＝R7/R6＝1。

further, the gate driving circuit further includes:

the driving circuit comprises a positive driving single-phase conduction diode, a negative driving single-phase conduction diode, a positive driving resistor and a negative driving resistor;

the positive electrode of the positive driving single-phase conduction diode is connected with the driving module, and the negative electrode of the positive driving single-phase conduction diode is connected with the first end of the second voltage division unit;

the first end of the positive driving resistor is connected with the output end of the subtracter, and the second end of the positive driving resistor is connected with the grid electrode of the silicon carbide device;

the first end of the negative driving resistor is connected with the grid electrode of the silicon carbide device, the second end of the negative driving resistor is connected with the positive electrode of the negative driving single-phase conducting diode, and the negative electrode of the negative driving single-phase conducting diode is connected with the driving module.

A second aspect of the present invention provides a driving method for a silicon carbide device, applied to the gate driving circuit of the silicon carbide device in the first aspect, the driving method including:

the driving module receives the pulse width modulation signal and generates an original driving signal, and the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;

the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, wherein the second voltage signal is the same as the original driving signal;

the integration module carries out delay processing of preset time on the first voltage signal;

before the preset time, the output signal of the difference module is a second voltage signal;

after the preset time, the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, wherein the voltage value of the output signal is smaller than that of the second voltage signal.

Therefore, the gate driving circuit of the silicon carbide device comprises a driving module, a voltage dividing module, an integrating module and a differential module, wherein the driving module is connected with the voltage dividing module, the voltage dividing module is connected with the integrating module and the differential module, the differential module is connected with the integrating module, the voltage dividing module and a grid electrode of the silicon carbide device, the driving module generates an original driving signal according to a pulse width modulation signal, sends the original driving signal to the voltage dividing module, the voltage value of the original driving signal is a positive driving voltage value of the silicon carbide device, the voltage dividing module performs voltage dividing processing on the original driving signal to obtain a first voltage signal and a second voltage signal, sends the first voltage signal to the integrating module, sends the second voltage signal to the differential module, the second voltage signal is the same as the original driving signal, and the integrating module performs delay processing on the first voltage signal for a preset time, the preset time is in a drain current rising stage of the silicon carbide device, the difference module performs difference operation on the first voltage signal and the second voltage signal after delay processing to obtain an output signal, the output signal is the second voltage signal before the preset time, and the voltage value of the output signal is smaller than that of the second voltage signal after the preset time. The first voltage signal of the original driving signal is intercepted through the voltage division module, delay is achieved through the integration module, after the preset time, the silicon carbide device is in the second half stage of drain current rising in the conduction process, the first voltage signal and the second voltage signal obtained after voltage division are subjected to differential operation through the differential module, the voltage value of the obtained output signal is reduced compared with the voltage value of the original driving signal, therefore, the rising speed of the drain current is reduced, current overshoot in the conduction process is restrained, meanwhile, the system reliability is effectively improved, and conduction loss is reduced.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic diagram illustrating one embodiment of a gate drive circuit for a silicon carbide device according to the present invention;

FIG. 2 is a schematic diagram illustrating another embodiment of a gate driver circuit for a silicon carbide device according to the present invention;

FIG. 3 is a schematic diagram illustrating a gate driver circuit for a silicon carbide device according to yet another embodiment of the present invention;

FIG. 4 is a schematic flow chart diagram illustrating one embodiment of a method for driving a silicon carbide device provided by the present invention;

FIG. 5 is a graph of current and voltage waveforms provided by the present invention.

Detailed Description

The core of the invention is to provide a gate drive circuit and a drive method of a silicon carbide device, which can inhibit current overshoot in the conduction process, effectively improve the reliability of a circuit system and reduce the conduction loss of the silicon carbide device.

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The general conduction process of the silicon carbide device can be divided into four stages: the method comprises a conduction delay stage, a current rising stage, a voltage falling stage and a saturation conduction stage, wherein the waveforms of direct current side current voltage and voltage switch signals corresponding to the four stages are different. During the turn-on process of the silicon carbide device, the switching speed is very high, and the silicon carbide device is extremely sensitive to parasitic inductance in a circuit, so that the problem of current overshoot generated during the turn-on process of the device is inevitable. Magnitude of current overshoot and drain current I_DRising speed dI of_DDt is related, and the current overshoot value I_rrAnd dI_DThe relational expression of/dt is:

wherein dI_DThe formula/dt is calculated as:

Q_rrrepresenting reverse recovery charge, V, of an antiparallel diode_CCRepresents a positive drive voltage, V_THRepresenting the turn-on threshold voltage, I, of the silicon carbide device_loadRepresenting the load current, g_mDenotes the transconductance, C, of a silicon carbide device_issRepresenting the input capacitance, C, of a silicon carbide device_iss＝C_gd+C_gs，R_onDenotes the on gate resistance, L_sRepresenting the source parasitic inductance.

It can be seen that the rising rate dI of the drain current is adjusted under the condition that the parasitic inductance is constant_DThe current overshoot problem can be effectively improved by the aid of the/dt, and the current change rate dI can be reduced by reducing the driving voltage in the current rising stage_DAnd/dt, thereby reducing the current overshoot during the turn-on process.

As shown in fig. 1, an embodiment of the present invention provides a gate driving circuit of a silicon carbide device, including:

the driving module 101, the voltage dividing module 102, the integrating module 103 and the difference module 104;

the driving module 101 is connected with the voltage dividing module 102;

the voltage division module 102 is connected with the integration module 103 and the difference module 104;

the difference module 104 is connected with the integration module 103, the voltage division module 102 and the grid electrode of the silicon carbide device 105;

the driving module 101 generates an original driving signal according to the pulse width modulation signal, and sends the original driving signal to the voltage division module, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;

the voltage division module 102 divides the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module 103, the second voltage signal is sent to the difference module 104, and the second voltage signal is the same as the original driving signal;

the integration module 103 performs delay processing on the first voltage signal for a preset time, wherein the preset time is in a drain current rising stage of the silicon carbide device 105;

the difference module 104 performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, so that the output signal is the second voltage signal before the preset time, and after the preset time, the voltage value of the output signal is smaller than that of the second voltage signal.

In the embodiment of the invention, the voltage dividing module 102 divides and intercepts the first voltage signal of the original driving signal, the delay is realized through the integrating module 103, after the preset time, the silicon carbide device 105 is in the second half stage of the rise of the drain current in the conducting process, the difference operation is carried out on the first voltage signal and the second voltage signal obtained after the voltage division through the difference module 104, and the voltage value of the obtained output signal is reduced compared with the voltage value of the original driving signal, so that the rise speed of the drain current is reduced, the current overshoot in the conducting process is inhibited, the system reliability is effectively improved, and the conducting loss is reduced.

Optionally, as shown in fig. 2, in some embodiments of the present invention, the voltage dividing module 102 includes:

a first voltage division unit 201 and a second voltage division unit 202;

a first end of the second voltage division unit 202 is connected with the driving module 101 and the differential module 104;

a first end of the first voltage division unit 201 is connected to a second end of the second voltage division unit 202 and the integration module 103, and a second end of the first voltage division unit 201 is grounded.

Optionally, as shown in fig. 2, in some embodiments of the present invention, the integration module 103 includes:

an integrating resistor unit 203 and an integrating capacitor unit 204;

a first end of the integrating resistance unit 203 is connected with a first end of the first voltage division unit 201 and a second end of the second voltage division unit 202;

the second end of the integrating resistor unit 203 is connected to the first end of the integrating capacitor unit 204 and the difference module 104, and the second end of the integrating capacitor unit 204 is grounded.

Optionally, as shown in fig. 2, in some embodiments of the present invention, the difference module 104 includes:

a first resistance unit 205, a second resistance unit 206, a third resistance unit 207, a fourth resistance unit 208, and a subtractor 209;

a first end of the first resistance unit 205 is connected to a second end of the integrating resistance unit 203 and a first end of the integrating capacitor unit 204, and a second end of the first resistance unit 205 is connected to a first end of the second resistance unit 206 and a positive input end of the subtractor 209;

a second terminal of the second resistance unit 206 is connected to an output terminal of the subtractor 209;

a first end of the third resistance unit 207 is connected with a first end of the second voltage division unit 202, and a second end of the third resistance unit 207 is connected with a first end of the fourth resistance unit 208 and a negative input end of the subtractor 209;

a second terminal of the fourth resistance unit 208 is grounded.

In conjunction with the above embodiment shown in fig. 2, specific examples of the units in the modules are defined, and optionally, as shown in fig. 3, in some embodiments of the invention,

the first voltage division unit and the second voltage division unit are respectively a first voltage division resistor and a second voltage division resistor;

the resistance value of the first voltage-dividing resistor is R1, the resistance value of the second voltage-dividing resistor is R2, the voltage value of the first voltage signal is U1, the voltage value of the second voltage signal is U2, and the resistance value relationship of the first voltage-dividing resistor and the second voltage-dividing resistor is as follows:

U1/U2＝R1/(R1+R2)。

in the embodiment of the invention, it is assumed that the driving level needs two kinds of positive and negative voltages, respectively, V_CC: +20V, and V_EE: 5V, namely +20V, and the main function of the voltage division circuit is to pass the voltage of 20V through R₃And R₄The divided voltage is converted into two voltages of 5V and 20V, and then the resistance relationship of R1 and R2 is as follows:

alternatively, as shown in fig. 3, in some embodiments of the invention,

the integral resistance unit is an integral resistor, and the integral capacitor unit is an integral capacitor;

the resistance value of the integrating resistor is R3, the capacitance value of the integrating capacitor is C, and the value of the preset time is T;

the relationship between the resistance value of the integrating resistor and the capacitance value of the integrating capacitor is as follows:

T＝R3*C。

in the embodiment of the invention, the integration module can be an R-C circuit, and is mainly used for delaying a 5V voltage signal obtained by voltage division for a period of time and then transmitting the 5V voltage signal to the differential module, wherein the preset time T can be calculated by the following formula:

T＝R3*C

if the capacitance is expressed in μ F (microfarad), R is expressed in M Ω (mega ohm), and the time constant is expressed in seconds. The turn-on process of the SiCMOSFET is typically on the order of nanoseconds (ns), so the unit level of capacitance is pF (picofarad) and the unit level of resistance is k Ω (kilo ohms).

Alternatively, as shown in fig. 3, in some embodiments of the invention,

the resistance value of the first resistor unit is R4, the resistance value of the second resistor unit is R5, the resistance value of the third resistor unit is R6, and the resistance value of the fourth resistor unit is R7;

the resistance value relations of the first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit are as follows:

R5/R4＝R7/R6＝1。

in the embodiment of the invention, under the condition of ideal operational amplifier, the circuit is regarded as a virtual short phenomenon, and the voltages of the node P and the node N are equal (U)_P＝U_N) The specific nodal equation is as follows:

wherein U is_P＝U_NThe formula can be obtained:

usually taking the resistance R₁、R₂、R_f、R_pThe resistance relationship therebetween satisfies:

at this time, the output voltage U of the differential circuit_oAnd an input voltage U₁、U₂The relationship between them is:

the differential circuit used in the invention does not need to amplify the differential signal, so the resistor R is arranged_f＝R₁。

Optionally, as shown in fig. 3, in some embodiments of the present invention, the gate driving circuit further includes:

a positive drive single-phase conduction diode D1, a negative drive single-phase conduction diode D2 and a positive drive resistor R_onAnd a negative drive resistance R_off；

The positive electrode of the positive driving single-phase conducting diode D1 is connected with the driving module, and the negative electrode of the positive driving single-phase conducting diode D1 is connected with the first end of the second voltage division unit;

positive drive resistance R_onIs connected with the output end of the subtracter, and positively drives the resistor R_onIs connected to the gate of the silicon carbide device;

negative drive resistance R_offIs connected to the gate (G) of the silicon carbide device, and a negative drive resistor R_offThe second end of the negative driving single-phase conducting diode D2 is connected with the positive pole of the negative driving single-phase conducting diode D2, and the negative pole of the negative driving single-phase conducting diode D2 is connected with the driving module.

As shown in fig. 4, an embodiment of the present invention provides a driving method of a silicon carbide device, which is applied to a gate driving circuit of the silicon carbide device described in the above embodiment, and includes:

401. the driving module receives the pulse width modulation signal and generates an original driving signal, and the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;

402. the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, wherein the second voltage signal is the same as the original driving signal;

403. the integration module carries out delay processing of preset time on the first voltage signal;

404. before the preset time, the output signal of the difference module is a second voltage signal;

405. after the preset time, the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, wherein the voltage value of the output signal is smaller than that of the second voltage signal.

In the embodiment of the invention, the working principle of the driving circuit is as follows:

switching on the delay stage (t0-t 1): the driving signal is increased from low level to high level of 20V and passes through the one-way diode D₁At this time, the voltage U of the second voltage signal₂When the voltage of the first voltage signal is 20V, U is present due to the voltage dividing resistor R1 ₁5V. The voltage at U2 passes through R6, subtracter and R_onActing on the gate of the SiCSMOSFET, U₁The voltage at node P is charged to capacitor C through resistor R5_pApproximately 0, as shown in FIG. 5, when the differential circuit portion is equivalent to a voltage follower, the input voltage is equal to the input voltage U₂So that the gate voltage U of the SiC MOSFET at this stage_g＝U₂＝20V。

First half of the current rise phase (t)₁-t₂): the voltage state of the second voltage signal remains unchanged, U₂The difference module is still equivalent to a follower circuit with an output voltage equal to 20V. The voltage of the first voltage signal is divided by the voltage dividing resistors R1 and R2, and U is₁After 5V, the voltage charges the capacitor C through the R-C delay circuit composed of the resistor R3 and the capacitor C, so that the voltage signal is not transmitted to the differential module for the first time, but delayed for a certain time, i.e. V shown in fig. 5_NIs delayed and becomes 5V after t2, during which the current is in the first half of the rising phase, when the gate voltage U is_gStill at a high voltage, V in FIG. 5_gI.e. the gate voltage U_g20V in the period from t1 to t2, and the current I_DRising speed dI of_DThe/dt is faster and the SiC MOSFET does not reach a fully conducting state.

The second half of the current rise phase (t)₂-t₃): after the voltage of the first voltage signal is delayed by a preset time T, the voltage of the first voltage signal is continuously transmitted to the next stage and acts on the differential module, at the moment, the voltage of the positive input end of the subtracter is 20V, the voltage of the negative input end of the subtracter is 5V, and voltage signals at two ends of the subtracter pass through the preset time T and then are transmitted to the next stage to act on the differential moduleThe voltage of the output end after the differential circuit modulation is 15V. Gate voltage U of SiC MOSFET_gThe voltage is reduced relative to the voltage at the first half of the turn-on, as shown by V in FIG. 5_gAfter t2, the current I drops to 15V_DRising speed dI of_DThe/dt decreases, after reaching the current maximum, a fall back occurs, after t3 a steady current value is maintained, according to the formula

The current overshoot value I in the conduction state can be known_rrTherefore, the suppression is reduced, the system reliability is effectively improved, and the conduction loss is reduced.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.