阅读说明：本技术 具有悬浮膜并在锚边缘具有圆角的电容式压力传感器和其他器件
(Capacitive pressure sensor and other devices with suspended membrane and rounded corners at anchor edges
) 是由 威廉·弗雷德里克·阿德里亚努斯·贝斯林
卡斯·范德阿福尔特
瑞曼科·亨里克斯·威廉姆斯·皮内伯格 于 2018-11-16 设计创作，主要内容包括：一种半导体器件,包括集成电路和电容式压力传感器,该电容式压力传感器设置在集成电路之上并且与集成电路电连接。电容式压力传感器包括：第一电极；空腔,其位于第一电极之上；以及第二电极,其包括位于空腔之上的悬浮膜。第二电极还包括横向围绕空腔的导电锚槽。锚槽包括内锚槽和外锚槽,其中,外锚槽具有圆角。(A semiconductor device includes an integrated circuit and a capacitive pressure sensor disposed over and electrically connected to the integrated circuit. The capacitive pressure sensor includes: a first electrode; a cavity over the first electrode; and a second electrode comprising a suspended membrane over the cavity. The second electrode further includes a conductive anchor groove laterally surrounding the cavity. The anchor groove includes interior anchor groove and outer anchor groove, and wherein, outer anchor groove has the fillet.)
1. A semiconductor device, comprising:
a first electrode;
a cavity located over the first electrode; and
a second electrode comprising a suspended membrane positioned over the cavity, the second electrode further comprising a conductive anchor groove laterally surrounding the cavity,
wherein, the anchor groove includes interior anchor groove and outer anchor groove, outer anchor groove has the fillet.
2. The semiconductor device of claim 1, wherein the rounded corners of the outer anchor slots have a radius of at least 40 pm.
3. The semiconductor device of claim 1, wherein the inner anchor slot has substantially right-angled corners.
4. The semiconductor device of claim 1, wherein the inner anchor groove has a rounded corner, and wherein a radius of the rounded corner of the outer anchor groove is at least twice a radius of the rounded corner of the inner anchor groove.
5. The semiconductor device of claim 1, wherein the rounded corners of the outer anchor slots have a radius of at least 5 pm.
6. The semiconductor device of claim 1, wherein the conductive anchor slot further comprises one or more intermediate anchor slots disposed between the inner anchor slot and the outer anchor slot.
7. The semiconductor device of claim 6, wherein one or more of the intermediate anchor slots have rounded corners.
8. The semiconductor device of claim 7, wherein an oxide support layer separates adjacent ones of the conductive anchor trenches from one another.
9. The semiconductor device of claim 1, wherein the film has a rectangular shape.
10. The semiconductor device of claim 1, wherein the film and the anchor trench both have a non-rectangular shape therein.
11. The semiconductor device according to any one of claims 1 to 10, wherein the suspension film is composed of tungsten.
12. A semiconductor device, comprising:
an integrated circuit; and
a capacitive pressure sensor disposed over and electrically connected to the integrated circuit, wherein the capacitive pressure sensor comprises:
a first electrode;
a cavity located over the first electrode; and
a second electrode comprising a suspended membrane positioned over the cavity, the second electrode further comprising a conductive anchor groove laterally surrounding the cavity,
wherein, the anchor groove includes interior anchor groove and outer anchor groove, outer anchor groove has the fillet.
13. The semiconductor device of claim 12, wherein the rounded corners of the outer anchor slots have a radius of at least 40 pm.
14. The semiconductor device of claim 12, wherein the inner anchor slot has substantially right-angled corners.
15. The semiconductor device of claim 12, wherein the inner anchor groove has a rounded corner, and wherein a radius of the rounded corner of the outer anchor groove is at least twice a radius of the rounded corner of the inner anchor groove.
16. The semiconductor device of claim 12, wherein the rounded corners of the outer anchor trenches have a radius of at least 5 μ ι η.
17. The semiconductor device of claim 12, wherein the conductive anchor slots further comprise one or more intermediate anchor slots disposed between the inner anchor slot and the outer anchor slot.
18. The semiconductor device of claim 17, wherein one or more of the intermediate anchor slots have rounded corners.
19. The semiconductor device of claim 18, wherein an oxide support layer separates adjacent ones of the conductive anchor trenches from one another.
20. The semiconductor device of claim 12, wherein the film has a rectangular shape.
21. The semiconductor device of claim 12, wherein the film and the anchor trench both have a non-rectangular shape therein.
22. The semiconductor device of any one of claims 12 to 21, wherein the integrated circuit comprises a CMOS readout circuit.
23. The semiconductor device of claim 22, wherein the CMOS readout circuitry comprises a passivation layer, the capacitive pressure sensor being disposed on the passivation layer.
24. The semiconductor device according to any one of claims 12 to 23, wherein the suspension film is composed of tungsten.
Technical Field
The present disclosure relates to capacitive pressure sensors and other devices having a suspended membrane and rounded corners at the anchor edges.
Background
Pressure sensors, such as micro-electromechanical systems (MEMS) sensors, have many applications. These sensors can be used, for example, in automotive, consumer, industrial, medical, and other applications. For example, in a MEMS sensor, pressure can be measured by deflection of a membrane caused by external pressure. However, large deflections or temperature differences can cause significant non-linearities in the sensor, which can present challenges in various applications. Accurate and repeatable manufacturing processes for the membrane and pressure sensor enable more accurate pressure readings over a range of temperatures and pressures.
Some capacitive pressure sensors include a tungsten membrane. However, tungsten films are known to have high tensile stress, which can lead to cracking and film cracking. Accordingly, improved techniques and structures that can reduce stress and help avoid damage to the membrane are needed.
Disclosure of Invention
The present disclosure describes techniques and structures that can reduce stress and help avoid damage to the suspended membrane of a capacitive pressure sensor or other device.
For example, in one aspect, the present disclosure describes a semiconductor device comprising: a first electrode; a cavity over the first electrode; and a second electrode comprising a suspended membrane over the cavity. The second electrode further includes a conductive anchor groove laterally surrounding the cavity. The anchor groove includes interior anchor groove and outer anchor groove, and wherein, outer anchor groove has the fillet.
In another aspect, the present disclosure describes a semiconductor device that includes an integrated circuit and a capacitive pressure sensor located over and electrically connected to the integrated circuit. The capacitive pressure sensor includes: a first electrode; a cavity over the first electrode; and a second electrode comprising a suspended membrane over the cavity. The second electrode further includes a conductive anchor slot laterally surrounding the cavity. The anchor groove includes interior anchor groove and outer anchor groove, and wherein, outer anchor groove has the fillet.
Some implementations include one or more of the following features. For example, in some cases, the rounded corners of the outer anchor slots have a radius of at least 40 pm. In some embodiments, the rounded corners may have a smaller radius. In some cases, the inner anchor groove also has rounded corners; however, the radius of the fillet of the outer anchor groove can be at least twice the radius of the fillet of the inner anchor groove. In some embodiments, the electrically conductive anchor slots further comprise one or more intermediate anchor slots disposed between the inner anchor slot and the outer anchor slot. One or more of the intermediate anchor slots can also have rounded corners. The oxide support layer can separate adjacent ones of the conductive anchor trenches from one another. In some cases, the membrane has a rectangular shape. In other cases, each of the membrane and the anchor groove has a non-rectangular shape.
Some embodiments include one or more of the following advantages. For example, the devices described herein, including the rounded corners of the outer anchor grooves, can mitigate the formation of microcracks in the underlying etch stop layer at the corners of the trenches forming part of the film support, thereby avoiding reliability issues and reducing the risk of film cracking.
The structure described herein can be particularly advantageous for tungsten films where local stress concentrations should be avoided. Such stress may otherwise result in anchor delamination, anchor underetching, and/or film cracking.
Other aspects, features, and advantages will be apparent from the following detailed description, the accompanying drawings, and the claims.
Drawings
Fig. 1 shows a cross-sectional view of an embodiment of a suspended film of a semiconductor device.
FIG. 1A shows a top view of an example of an outer anchor slot having rounded corners.
Fig. 2 shows a cross-sectional view of an embodiment of a semiconductor device after deposition of a sacrificial layer.
Fig. 3A-3I illustrate a portion of the semiconductor device of fig. 2 in subsequent processing steps.
Fig. 4A-4C illustrate examples of membranes and anchor grooves having non-rectangular shapes.
Detailed Description
As shown in fig. 1, the semiconductor device 100 includes a capacitive pressure sensor 108 formed over an integrated circuit 106. The capacitive pressure sensor 108 includes a suspended tensile membrane 102 over a cavity 112. The sensor 108 can also include a bottom electrode 104, which in some embodiments is formed on top of the final passivation layer of the CMOS readout circuitry. The electrodes and the suspended membrane of the capacitive pressure sensor 108 can be electrically connected to the integrated circuit 106. The bottom electrode 104 may be segmented and may include a plurality of annular rings.
Two or more anchor trenches 114 laterally surrounding the cavity 112 are filled with a first conductive material and separated from each other by an oxide support layer (e.g., silicon oxide) 126. The first conductive material filling the anchor trench 114 can include, for example, a Physical Vapor Deposited (PVD) Ti/TiN liner and a Chemical Vapor Deposited (CVD) tungsten (W). The cavity 112 sidewalls are at least partially formed by the conductive material of the inner anchor slots 114A. The suspended membrane 102 can be composed of a second electrically conductive material (e.g., tungsten (W)) and extend out of the outer anchor groove 114B. Thus, the first conductive material 114 acts as a support anchor for the suspended membrane 102. The first conductive material 114 and the film 102 form a portion of the top electrode suspended over the bottom electrode 104. The cavity 112 separates the membrane 102 and the bottom electrode 104 from each other. The isolation trench 130 can separate the bottom electrode from the connection 120 for the top electrode.
Although various materials can be used for the film 102, it can be advantageous to use tungsten (W) as the film. For example, CVD W is easily used for via fill applications in standard CMOS fabrication facilities, W has a low CTE mismatch with silicon, which can help reduce the temperature sensitivity of the sensor, W has high tensile stress, which can help avoid buckling of the film during seal deposition, W is not corroded by vapor HF during processing (i.e., film release), W is a refractory material that does not exhibit stress changes at high temperatures. The latter feature can help provide stable membrane compliance and sensor performance over time.
In some embodiments, the membrane 102 has a rectangular (e.g., square) shape. This feature can be important for some embodiments because sensors with rectangular membranes can be modeled more accurately using physical flexure models, while also utilizing area more efficiently than circular devices. The ability to accurately model the device can facilitate calibration, which typically relies on an accurate description of the flexural behavior of the film. However, for a rectangular membrane, the stress around the membrane may not be constant. For example, for a square film, the largest lateral stress typically occurs at the edge half the length of the edge. Therefore, this can be advantageous to reduce local stress buildup caused by the highly tensile tungsten film 102.
To help reduce stress, outer anchor slot 114B, which can have a generally rectangular overall shape, has rounded corners 132 at its outer edges, as shown, for example, in FIG. 1A. However, the corners 134 of the inner anchor slots 114A need not be rounded because the local tensile stress at those locations is relatively low. In contrast, the edges forming the corners 134 of the inner anchor slots 114A can be only slightly rounded or can be relatively straight to form an angle of approximately 90. One reason for the foregoing difference between the inner and outer anchor grooves is that the innermost anchor groove 114A determines the flexing behavior of the membrane 102, while the outer anchor groove 114B primarily affects the stress. The rounded corners 132 of the outer anchor slots 114B can help reduce stress.
Some embodiments include a single outer anchor slot 114B and a single inner anchor slot 114A with an oxide support layer 126 therebetween. However, in some cases, it can be beneficial to add one or more intermediate anchor slots 114C, 114D between the innermost and outermost anchor slots 114A, 114B. For example, the additional anchor grooves can be beneficial to help avoid dishing during subsequent Chemical Mechanical Polishing (CMP) steps, and to help avoid catastrophic failure of the device if one or more portions of the anchors 114 are under-etched. When there are more than two anchor slots 114, the corners of all outer anchor slots (i.e., the outermost anchor slot 114A and the intermediate anchor slots 114C, 114D) are preferably rounded. As described above, the anchor trenches are separated from each other by the oxide layer 126.
The inventors of the present application have determined that corner rounding of the outer anchor slots can have a beneficial effect on the maximum corner stress. For example, simulations indicate that for some embodiments, stress drops relatively quickly as the radius of the corner decreases from approximately 5pm to 25 pm. Thus, in some cases, the corners of the outer anchor slots are rounded and have a radius of at least 5pm, at least 10pm, at least 15pm, at least 20pm, or at least 25 pm. Furthermore, in some cases, if the radius of the corners of the outer anchor groove is at least 40 μm, the stress can be reduced by more than 2 times. Accordingly, in some embodiments, it may be advantageous to provide the outer anchor slots with rounded corners having a radius of 40pm or greater.
Although generally the innermost anchor slot 114A need not have rounded corners, it may in some cases have slight rounded corners. However, even in this case, it can be advantageous for the radius of the fillet of the outer anchor groove to be at least twice the radius of the fillet of the innermost anchor groove. For example, if the innermost anchor slot 114A has a fillet with a radius of about 9pm, the outer anchor slot (e.g., 114B) preferably has a fillet with a radius of at least 18 pm.
In some embodiments, the first conductive material filling the anchor trenches is PVD Ti/TiN and CVD W. Other materials can be used in some implementations. In some cases, the anchor grooves have a width of 0.5 μm to 0.8 μm. Other widths may be suitable for some embodiments. In some cases, the distance between adjacent anchor grooves 114 is 4-5 μm. Too great a distance may result in dishing of the oxide 126 between the trenches 114. If there is a distance of 4-5 μm between adjacent anchor grooves 114, the radius of the middle anchor groove should gradually increase moving from the inner groove to the outermost groove. In some cases, in order to have a more or less uniform distance between the anchor grooves 114, there should be at least four grooves 114 to achieve a 40 μm corner rounding of the outermost grooves 114B.
As further shown in fig. 1, the semiconductor device 100 shown includes an isolation layer 110, which can also serve as an etch stop layer. During device fabrication, the sacrificial oxide layer can be etched to create a cavity 112 over the bottom electrode 104. During etching, the isolation layer 110 covers and protects the bottom electrode 104. The suspended membrane 102 can include an etch opening 116 through which the sacrificial layer can be etched and removed, thereby creating the cavity 112. After removal of the sacrificial layer, a sealing layer 118 can be provided to seal the cavity 112 by sealing the etched opening 116. Another advantage of using a rectangular membrane 102 in some embodiments is that the etch release holes 116 are uniformly placed with respect to each other and with respect to the distance to the membrane anchor 114. If the corners of the rectangular membrane 102 and the inner anchor slot 114A are rounded, the distance from the sacrificial etch hole 116 to the edge will vary. Such variations may cause local variations in stress, which in turn may cause film cracking during removal of the sacrificial oxide.
The semiconductor device 100 of fig. 1 also shows a conductive connection 120 to connect the top electrode or membrane 102 to the integrated circuit 106 or elsewhere. The semiconductor device 100 may also include aluminum or other contact pads to provide a connection to another device. Various vias may extend from the contact pad down to the bottom electrode and also down from the bottom electrode to the CMOS top metal layer.
For capacitive sensing, bond wires between the ASIC die and the MEMS die are generally undesirable because they can generate noise. The use of tungsten film technology allows the fabrication of a pressure sensitive film on top of the passivation layer of the CMOS readout circuitry. Thus, the present technology provides monolithic integration in which pressure sensors with readout circuitry are integrated within a single die. Furthermore, the membrane manufacturing method can be implemented at relatively low cost, since only a few (e.g. 4-5) additional mask steps are required to construct the capacitive pressure sensor on top of the CMOS readout circuitry. The resulting technology therefore not only reduces the footprint of the device, thereby reducing manufacturing costs, but also improves noise performance due to the integration of the sensor on the chip and the avoidance of external wire bonds.
Fig. 2 and 3A-3I illustrate various stages in the fabrication of the semiconductor device 100 of fig. 1. Although the semiconductor devices 200 and 300 of fig. 2 and 3A-3I are shown and described with particular components and functions and with particular fabrication steps, other embodiments may include fewer or more components or steps to achieve more or less functions.
As shown in fig. 2, the semiconductor device 200 shows a bottom electrode 204 and an isolation layer/etch stop 210 that has been formed over an integrated circuit 206. In addition, a sacrificial layer 222 is formed over the bottom electrode 204. The semiconductor device 100 shown also includes an additional oxide 226 separated from the sacrificial layer 222 by a boundary trench 224. The illustrated embodiment includes three boundary trenches 224 on each side of the sacrificial layer 222. In some embodiments, there may be a different number of boundary slots 224. The boundary trench 224 preferably completely surrounds the periphery of the sacrificial layer 222. The innermost border groove is used to define the length and width of the suspended membrane. Thus, for a rectangular film, the innermost boundary trench (i.e., the one closest to sacrificial layer 222) can be rectangular in shape with square or slightly rounded corners. As described above, other boundary trenches, including the outermost boundary trench (i.e., the one furthest from the sacrificial layer 222), may also be rectangular in shape, but with rounded corners.
In fig. 2, a portion of the semiconductor device 200 is represented by a circle 228. Fig. 3A through 3I focus on this portion of the semiconductor device (shown by 300 in fig. 3A-3I).
An isolation layer/etch stop 210 can be provided to prevent shorting between the top and bottom electrodes 204 while avoiding etching the underlying passivation layer. The isolation layer/etch stop 210 may be formed, for example, of SiN (including silicon-rich SiN), SiC, and/or Al2O3Or a combination thereof, or another combinationSuitable material composition to prevent short circuits and avoid etching. Some embodiments may differ and utilize separate components to perform the functions of the isolation layer/etch stop layer 210. In some embodiments, an etch stop layer is formed under the bottom electrode 204. To prevent shorting between the bottom electrode 204 and the top electrode, an isolation layer or anti-shorting layer can be formed on top of the bottom electrode 204. In some embodiments, an isolation layer is disposed on top of sacrificial layer 222. In some embodiments, there is an isolation layer below and above sacrificial layer 222. One of the layers can be patterned to provide anti-stiction bumps. In addition, the layers present above the sacrificial layer may become support layers for the top electrode or membrane in order to avoid buckling.
As shown in FIG. 3A, semiconductor device 300 includes a bottom electrode 304, an isolation layer (and/or etch stop layer) 310, a connector 320, a sacrificial layer 322, and an additional material 326 (e.g., SiO)2) To help form the boundary trenches 324. Inner boundary trenches 324 define the sidewall boundaries of sacrificial layer 322. The isolation layer 310 can isolate the bottom electrode 304 from the top electrode or the suspension film if the suspension film collapses or comes into contact with the bottom electrode 304. Furthermore, the isolation layer 310 can serve as an etch stop to protect the bottom electrode 304 during subsequent etching of the sacrificial layer 322.
Fig. 3B shows an example of the semiconductor device of fig. 3A after deposition of an adhesion layer. Some embodiments do not utilize an adhesive layer 330. However, adhesion layer 330 can be used for a variety of purposes, including improving adhesion to underlying layers, avoiding corrosion of underlying oxide during CVD tungsten deposition, reducing stress on conductive materials, and forming good ohmic electrical contact with any underlying material. In some embodiments, adhesion layer 330 comprises titanium, titanium nitride, or a combination thereof.
Fig. 3C shows the example of the semiconductor device 300 of fig. 3B after conformal deposition of the first conductive material 314 over the sacrificial layer 322 and in the sidewall boundary trenches 324. The conformal deposition of first conductive material 314 will deposit a first layer of material over sacrificial layer 322 and in boundary trenches 324. The transition of material 314 from the top of sacrificial layer 322 to boundary trench 324 results in a transition portion 332 that includes a slot or seam 334 that overlies boundary trench 324.
Subsequent processing steps are shown in fig. 3D through 3I and can include a CMP step to remove at least a portion of the first conductive material 314. The CMP step allows for removal of uneven topography, such as slots or seams 334 and corner transitions 332. By removing material using CMP, only the topography will be removed, since the material in the boundary trenches 324 will be protected by the sacrificial layer 322 and the portions 326. Next, a second conductive material may be redeposited over sacrificial layer 322 and first conductive material 314 within boundary trenches 324. Subsequent deposition of the second layer of material allows the material to be deposited in a substantially flat topography without slots, seams, and corner transitions. The subsequent deposition also allows the second conductive material 302 to be deposited outside the plurality of boundary trenches 324, which allows the stress distribution to be limited to not only the innermost boundary trench.
The first conductive material 314 located in the boundary trenches 324 can be used for various purposes including serving as an anchor for a subsequently formed suspended membrane, serving as an electrical connection path for a top electrode, and/or serving as an etch stop around the sacrificial layer 322 and subsequently formed cavities.
Fig. 3D illustrates the embodiment of the semiconductor device 300 of fig. 3C after removing a portion of the first conductive material 314. As shown, a portion of the first conductive material 314 is removed from over the sacrificial layer 322 (a portion of the adhesion layer 330 is also removed). In addition, the corner transition portion 332 above the boundary trench 324 is removed. A portion of the slot or seam 334 may still be present but now most of the topography is substantially planar and ready to deposit the second conductive material in a substantially planar topography without any corner portions 332 that may cause failure. As previously described, the first conductive material 314 acts as a support anchor for the second conductive material that will be deposited as a film. In some embodiments, the support anchor may still include a portion of the slot or socket 334.
In some embodiments, removing a portion of the first conductive material 314 is accomplished by CMP, which can allow for removal of all conductive material outside of the boundary trenches 324. In some embodiments, all material up to the level of the sacrificial layer 322 is removed. In some embodiments, only a portion of the material above sacrificial layer 322 is removed. In some embodiments, only a portion of the corner transition portion 332 is removed. In some embodiments, all seams 334 and corner transitions 332 are completely removed due to the CMP step.
In some cases, uneven topography and/or corner transitions may occur at other locations than in the area above the boundary trench 324. For example, the bottom electrode 304 may be patterned, resulting in an uneven topography of the first conductive material 314 over the sacrificial layer 322. This uneven topography over the sacrificial layer 322 may also be removed in a CMP removal step. Failure to remove this uneven topography and corner transitions can lead to high local stresses, which in turn can lead to damage to the membrane when suspended.
Fig. 3E illustrates the embodiment of the semiconductor device of fig. 3D after deposition of adhesion layer 330A. Adhesion layer 330A may be deposited prior to depositing the second conductive material. For example, the adhesive layer 330A can be the same material as the previous adhesive layer 330 and can serve some of the same functions as the previous adhesive layer 330. Some embodiments do not include adhesive layer 330A. The deposition of the adhesion layer 330 in the boundary trenches 324 can be separated from the subsequent deposition of the adhesion layer 330A as part of the film stack by removing a portion of the first conductive material 314 and then depositing a second conductive material or a second layer of material. This allows the application of thick adhesive layers as stress compensation for the suspended film.
Fig. 3F shows the embodiment of semiconductor device 300 of fig. 3E after conformally depositing second conductive material 302 over sacrificial layer 322 and extending beyond first conductive material 314 and boundary trenches 324. The second conductive material 302 can be the same material as the first conductive material 314, or can be a different material (e.g., tungsten). As described above, the first layer of material 314 serves as an anchor/support point for the second layer of material 302. This reduces problematic stresses that can occur when only a single layer of material is deposited as a transition from above sacrificial layer 322 to boundary trench 324.
Fig. 3G shows the embodiment of the semiconductor device 300 of fig. 3F after depositing another adhesion layer 330B over the second conductive material 302 and creating an etch opening 336 over the sacrificial layer 322. The adhesive layer 330B can be the same material and can serve the same function as the previous adhesive layers 330, 330A. Some embodiments do not include an adhesive layer 330B. The thickness of the adhesion layer 330B and other adhesion layers may be optimized to reduce the stress of the film 302.
Fig. 3H shows the embodiment of the semiconductor device 300 of fig. 3G after removing the sacrificial layer 322 and releasing the film 302 of the semiconductor device 300. The sacrificial layer 322 can be, for example, an oxide, and can be removed by hydrofluoric acid (HF) vapor that removes the sacrificial oxide layer 322 without damaging the first conductive material 314. The first conductive material 314 can act as an etch stop and allow for the precise creation of the cavity 312. By etching the sacrificial layer 322 onto the first conductive material 314, the size and shape of the cavity 312 can be controlled without having to monitor the lateral etch rate. In addition, when lateral etch rate control is desired, the size of the etch openings 336 may need to be larger, and more etch openings 336 may be needed in the film 302. Reducing the number and size of the etched openings can allow for a more structurally sound suspended membrane and can reduce the cost and problems of sealing the cavity 312.
Fig. 3I illustrates the embodiment of the semiconductor device 300 of fig. 3H after depositing the sealing layer 318 over the second conductive material 302 and sealing the etched openings 336 over the cavities 312. The etch opening 336 and the cavity 312 may be sealed by a silicon nitride or silicon oxide dielectric film. The sealing layer 318 may be a dielectric sealing layer for partially or completely filling the etch opening 336. In some embodiments, sealing layer 318 may be a metal sealing layer for partially or completely filling etch opening 336. In some embodiments, septum 302 may be completely sealed and then subsequently reopened at a selected location to form a vent. For example, sealing layer 318 may include silicon dioxide, silicon nitride, or a combination of stacks of these materials. For example, the deposition methods may include high density plasma oxide (HDP oxide), Plasma Enhanced Chemical Vapor Deposition (PECVD), Physical Vapor Deposition (PVD), Chemical Vapor Deposition (CVD), and/or Atomic Layer Deposition (ALD).
Other techniques of fabricating the capacitive pressure sensor 108 may be used in some embodiments.
Although the foregoing examples describe devices having rectangular membranes 102, the rounded corner feature of the outer anchor groove can also be applied to other embodiments where the membranes 102 and anchor grooves 114 have non-rectangular shapes. Examples are shown in fig. 4A, 4B and 4C. In each example, the inner and outer anchor slots 114A, 114B can have an overall shape similar to the shape of the membrane 102. However, outer anchor slots 114A have rounded corners 132. The inner anchor slot 114A need not have rounded corners (although in some cases it may have rounded corners). As described above, some embodiments may include one or more additional anchor slots between the innermost and outermost anchor slots 114A, 114B. Preferably, the corners of any anchor slot between the innermost and outermost anchor slots 114A, 114B are also rounded. Adjacent anchor trenches are separated from each other by an oxide support layer 126.
The aforementioned membrane technology can be applied not only to the fabrication of capacitive pressure sensors on CMOS circuits, but also to ultrasonic transducers, microphones, speakers, micro hotplates, infrared detectors and other devices comprising capacitive pressure sensors.
In the foregoing description, specific details of various embodiments are provided. However, some embodiments may be practiced with less than all of these specific details. Also, some embodiments may include additional features. Accordingly, other implementations are within the scope of the following claims.
