阅读说明：本技术 一种时钟电路 (Clock circuit ) 是由 曾夕 周璞 温建新 严慧婕 连夏梦 于 2020-04-02 设计创作，主要内容包括：本发明提供的一种时钟电路,包括振荡电路和上电复位电路,所述振荡电路包括连接的电流产生模块和环路振荡模块；所述电流产生模块,用于向所述环路振荡模块输出一控制电流；所述环路振荡模块,用于在所述控制电流的作用下输出一具有设定频率的振荡信号；以及所述上电复位电路与所述环路振荡模块连接,其用于在电源上电时提供使能控制信号。本发明通过将上电复位电路仅与环路振荡模块连接,使得在电源上电过程中,所述电流产生模块的所有节点随电源的上电逐渐建立,从而使得电流产生模块的电路建立时间包括在上电复位电路的使能控制信号释放的时间内,加快了振荡电路的建立时间。(The invention provides a clock circuit, which comprises an oscillation circuit and a power-on reset circuit, wherein the oscillation circuit comprises a current generation module and a loop oscillation module which are connected; the current generation module is used for outputting a control current to the loop oscillation module; the loop oscillation module is used for outputting an oscillation signal with a set frequency under the action of the control current; and the power-on reset circuit is connected with the loop oscillation module and is used for providing an enabling control signal when the power supply is powered on. According to the invention, the power-on reset circuit is only connected with the loop oscillation module, so that in the power-on process of the power supply, all nodes of the current generation module are gradually established along with the power-on of the power supply, the circuit establishment time of the current generation module is included in the release time of the enabling control signal of the power-on reset circuit, and the establishment time of the oscillation circuit is accelerated.)

1. A clock circuit comprises an oscillation circuit and a power-on reset circuit, and is characterized in that the oscillation circuit comprises a current generation module and a loop oscillation module which are connected,

the current generation module is used for outputting a control current to the loop oscillation module;

the loop oscillation module is used for outputting an oscillation signal with a set frequency under the action of the control current; and

the power-on reset circuit is used for providing an enabling control signal to the loop oscillation module after the power supply is powered on;

the power-on reset circuit is connected with the loop oscillation module.

2. The clock circuit of claim 1, wherein the loop oscillation module comprises a first sub-module and a second sub-module, the first sub-module and the second sub-module being connected in series, the first sub-module comprising a plurality of comparators and a plurality of control logic circuits.

3. The clock circuit of claim 2, wherein the first submodule includes comparators a first comparator, a second comparator, a first control logic circuit, and a second control logic circuit;

the first input end of the first comparator is simultaneously connected with the current mirror branch circuit and the second input end of the second comparator; the second input end of the first comparator is suspended; the first input end of the first control logic circuit is connected with the output end of the first comparator; the second input end of the first control logic circuit is connected with the output end of the second control logic circuit; the output end of the first control logic circuit is simultaneously connected with the switch control module and the first input end of the second control logic circuit; and a first input end of the second comparator is suspended, and an output end of the second comparator is connected with a second input end of the second control logic circuit.

4. The clock circuit of claim 3, wherein the power-on-reset circuit includes a first output terminal and a second output terminal,

a first output end of the power-on reset circuit is simultaneously connected with a first input end of the first control logic circuit and an output end of the first comparator; and

and the second output end of the power-on reset circuit is simultaneously connected with the output end of the second comparator and the second input end of the second control logic circuit.

5. The clock circuit of claim 3, wherein the oscillating circuit further comprises a switch control module, and the power-on-reset circuit is connected to the loop oscillating module through the switch control module.

6. The clock circuit of claim 5, wherein the switch control module is connected between the first submodule and the second submodule.

7. The clock circuit of claim 6, wherein the switch control module comprises a first switch and a second switch,

the first end of the first switch is simultaneously connected with the output end of the first control logic circuit and the power-on reset circuit; the second end of the first switch is simultaneously connected with the first end of the second switch and the input end of the second submodule; the second end of the second switch is grounded and is connected with the power-on reset circuit;

and the first switch and the second switch are alternatively switched on at the same time.

8. The clock circuit of claim 2, wherein a first terminal of the second submodule is coupled to the switch control module, a second terminal of the second submodule is coupled to the current mirror branch, and a second terminal of the second submodule serves as an output terminal of the oscillator circuit.

9. The clock circuit of claim 8, wherein the second submodule includes inverters.

10. The clock circuit of claim 1, wherein the current generation module comprises a current mirror branch, a feedback loop and a capacitor, the feedback loop is used for generating a substantially constant current required in the oscillating circuit, the current mirror branch is used for generating a current required for charging and discharging the oscillating circuit, and the periodic oscillating signal is completed through the charging and discharging of the capacitor.

Technical Field

The present invention relates to the field of integrated circuit technologies, and in particular, to a clock circuit.

Background

With the development of integrated circuits, circuit performance needs to be improved continuously, wherein a clock circuit is an important input signal of many analog circuits and digital circuits for an integrated circuit system, and therefore the clock circuit is an important circuit in the integrated circuit.

In many systems, the clock circuit must respond quickly after power up, which can shorten the power up setup time for the entire system. Therefore, how to start the clock circuit quickly and stably is an important issue in the clock circuit. The oscillation circuit in the clock circuit is controlled by a POR (Power-on Reset) circuit, so that the voltages of all nodes of the entire oscillation circuit need to be turned on and built slowly until stable. As shown in fig. 1, the POR circuit of the clock circuit is connected to the current generation block 10 and the ring oscillation block 20, so that the voltages of all nodes of the entire oscillation circuit need to be established after the control signal of the POR circuit is released, and then the clock can be stabilized after the voltages of all nodes are stabilized. This causes the oscillation circuit to settle for a time period which is the sum of the time period required for the POR circuit to release and the time period required for the voltages of all the nodes thereof to settle, so that the overall settling time is longer, and eventually the overall oscillation circuit is settled more slowly.

Disclosure of Invention

The invention provides a clock circuit to solve the problem of slow establishment of an oscillating circuit.

In order to solve the above technical problem, the present invention provides a clock circuit, comprising an oscillation circuit and a power-on reset circuit, wherein the oscillation circuit comprises a current generation module and a loop oscillation module which are connected,

the current generation module is used for outputting a control current to the loop oscillation module;

the loop oscillation module is used for outputting an oscillation signal with a set frequency under the action of the control current; and

the power-on reset circuit is used for providing an enabling control signal to the loop oscillation module after the power supply is powered on;

the power-on reset circuit is connected with the loop oscillation module.

Optionally, the loop oscillation module includes a first sub-module and a second sub-module, the first sub-module and the second sub-module are connected in series, and the first sub-module includes a plurality of comparators and a plurality of control logic circuits.

Further, the first sub-module comprises a comparator, a first comparator, a second comparator, a first control logic circuit and a second control logic circuit;

the first input end of the first comparator is simultaneously connected with the current mirror branch circuit and the second input end of the second comparator; the second input end of the first comparator is suspended; the first input end of the first control logic circuit is connected with the output end of the first comparator; the second input end of the first control logic circuit is connected with the output end of the second control logic circuit; the output end of the first control logic circuit is simultaneously connected with the switch control module and the first input end of the second control logic circuit; and a first input end of the second comparator is suspended, and an output end of the second comparator is connected with a second input end of the second control logic circuit.

Furthermore, the power-on reset circuit comprises a first output end and a second output end,

a first output end of the power-on reset circuit is simultaneously connected with a first input end of the first control logic circuit and an output end of the first comparator; and

and the second output end of the power-on reset circuit is simultaneously connected with the output end of the second comparator and the second input end of the second control logic circuit.

Furthermore, the oscillation circuit further comprises a switch control module, and the power-on reset circuit is connected with the loop oscillation module through the switch control module.

Further, the switch control module is connected between the first sub-module and the second sub-module.

Further, the switch control module comprises a first switch and a second switch,

the first end of the first switch is simultaneously connected with the output end of the first control logic circuit and the power-on reset circuit; the second end of the first switch is simultaneously connected with the first end of the second switch and the input end of the second submodule; the second end of the second switch is grounded and is connected with the power-on reset circuit;

and the first switch and the second switch are alternatively switched on at the same time.

Furthermore, a first end of the second sub-module is connected to the switch control module, a second end of the second sub-module is connected to the current mirror branch, and meanwhile, the second end of the second sub-module is used as an output end of the oscillating circuit.

Further, the second sub-module includes a plurality of inverters.

Optionally, the current generation module includes a current mirror branch, a feedback loop and a capacitor, the feedback loop is configured to generate a substantially constant current required in the oscillation circuit, and the current mirror branch is configured to generate a current required for charging and discharging the oscillation circuit, and complete a periodic oscillation signal through charging and discharging of the capacitor.

Compared with the prior art, the invention has the following beneficial effects:

the invention provides a clock circuit, which comprises an oscillation circuit and a power-on reset circuit, wherein the oscillation circuit comprises a current generation module and a loop oscillation module which are connected, and the current generation module is used for outputting a control current to the loop oscillation module; the loop oscillation module is used for outputting an oscillation signal with a set frequency under the action of the control current; the power-on reset circuit is used for providing an enabling control signal to the loop oscillation module after the power supply is powered on; the power-on reset circuit is connected with the loop oscillation module. According to the invention, the power-on reset circuit is only connected with the loop oscillation module, so that in the power-on process of the power supply, all nodes of the current generation module are gradually established along with the power-on of the power supply, the circuit establishment time of the current generation module is included in the release time of the enabling control signal of the power-on reset circuit, and the establishment time of the oscillation circuit is accelerated.

Drawings

FIG. 1 is a schematic diagram of a clock circuit;

fig. 2 is a schematic structural diagram of a clock circuit according to a first embodiment of the present invention;

fig. 3 is a schematic structural diagram of a clock circuit according to a second embodiment of the present invention.

Description of reference numerals:

in fig. 1:

10-a current generating module; 20-a loop oscillation module;

in fig. 2 and 3:

c-capacitance; an OTA-amplifier; m0-loop transistor; c1 — first comparator; c2 — second comparator; NOR1 — first control logic circuit; NOR2 — second control logic; INV-inverter; s1 — a first switch; s2 — a second switch;

100-an oscillating circuit; 110-a current generating module; 111-current mirror branch; 112-a feedback loop; 120-a loop oscillation module; 121-a first submodule; 122-a second sub-module;

200-POR circuit.

Detailed Description

The core of the invention is that the provided clock circuit comprises an oscillation circuit and a power-on reset circuit, wherein the oscillation circuit comprises a current generation module and a loop oscillation module which are connected, and the current generation module is used for outputting a control current to the loop oscillation module; the loop oscillation module is used for outputting an oscillation signal with a set frequency under the action of the control current; the power-on reset circuit is used for providing an enabling control signal to the loop oscillation module after the power supply is powered on; the power-on reset circuit is connected with the loop oscillation module. According to the invention, the power-on reset circuit is only connected with the loop oscillation module, so that in the power-on process of the power supply, all nodes of the current generation module are gradually established along with the power-on of the power supply, the circuit establishment time of the current generation module is included in the release time of the enabling control signal of the power-on reset circuit, and the establishment time of the oscillation circuit is accelerated.

A clock circuit of the present invention will be described in further detail below. The present invention will now be described in more detail with reference to the accompanying drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art may modify the invention herein described while still achieving the advantageous effects of the invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.

In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific details must be set forth in order to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art.

In order to make the objects and features of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. It is to be noted that the drawings are in a very simplified form and are all used in a non-precise ratio for the purpose of facilitating and distinctly aiding in the description of the embodiments of the invention.

It should be understood that in the following description, a "circuit" refers to a conductive loop formed by at least one element or sub-circuit through an electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.