阅读说明：本技术 一种共模反馈电路和差分放大器 (Common mode feedback circuit and differential amplifier ) 是由 周晓秋 钱永学 王同 孟震一 蔡光杰 马荣荣 孟浩 黄鑫 于 2020-04-20 设计创作，主要内容包括：本申请公开了一种共模反馈电路和差分放大器,减小了在差分放大器两个输入端v1、v2处引入的差模噪声,并保证了共模反馈环路稳定性。该电路包括误差放大器U2和四个晶体管M1a、M1b、M2a和M2b,其中：U2的两个同相输入端分别接v1和v2；U2的反相输入端接收基准共模电压；M1a和M1b的栅极接U2输出端；M2a和M2b的栅极接收一驱动信号；M1a和M1b的源极接地；M1a的漏极、M1b的漏极、M2a的源极以及M2b的源极连接于同一点；M2a的漏极接v1；晶体管M2b的漏极接v2；M2a与M2b的跨导之差不超过第二预设值；M2a的跨导不超过第四预设值；次极点频率大于共模反馈环路的带宽。(The application discloses a common mode feedback circuit and a differential amplifier, wherein differential mode noise introduced at two input ends v1 and v2 of the differential amplifier is reduced, and the stability of a common mode feedback loop is ensured. The circuit includes an error amplifier U2 and four transistors M1a, M1b, M2a, and M2b, wherein: two non-inverting input terminals of U2 are respectively connected with v1 and v 2; the inverting input of U2 receives a reference common mode voltage; the gates of M1a and M1b are connected with the output end of U2; the gates of M2a and M2b receive a driving signal; the sources of M1a and M1b are grounded; the drain of M1a, the drain of M1b, the source of M2a and the source of M2b are connected to the same point; the drain of M2a is connected with v 1; the drain of the transistor M2b is connected with v 2; the difference between the transconductance of M2a and the transconductance of M2b does not exceed a second preset value; the transconductance of M2a does not exceed the fourth preset value; the secondary pole frequency is greater than the bandwidth of the common mode feedback loop.)

1. A common mode feedback circuit comprising an error amplifier, a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein:

the two in-phase input ends of the error amplifier are used for being respectively connected to the in-phase input end and the reverse-phase input end of the differential amplifier;

the inverting input end of the error amplifier receives a reference common-mode voltage;

the grids of the first transistor and the second transistor are connected with the output end of the error amplifier;

the grid electrodes of the third transistor and the fourth transistor receive a driving signal;

the sources of the first transistor and the second transistor are grounded;

the drain electrode of the first transistor, the drain electrode of the second transistor, the source electrode of the third transistor and the source electrode of the fourth transistor are connected to the same point;

the drain electrode of the third transistor is used for being connected to the non-inverting input end of the differential amplifier; the drain electrode of the fourth transistor is used for being connected to the inverting input end of the differential amplifier;

the difference value between the transconductance of the first transistor and the transconductance of the second transistor does not exceed a first preset value; the difference value between the transconductance of the third transistor and the transconductance of the fourth transistor does not exceed a second preset value; the difference value between the drain electrode to ground parasitic capacitance of the third transistor and the drain electrode to ground parasitic capacitance of the fourth transistor does not exceed a third preset value; the transconductance of the third transistor does not exceed a fourth preset value; the secondary pole frequency of the common mode feedback circuit is greater than the bandwidth of the common mode feedback loop.

2. A common-mode feedback circuit according to claim 1, wherein the first preset value is equal to zero.

3. A common-mode feedback circuit according to claim 1, wherein the second preset value is equal to zero.

4. A common-mode feedback circuit according to claim 1, wherein the third preset value is equal to zero.

5. A common mode feedback circuit according to claim 1 wherein the transistors in the common mode feedback circuit are MOSFETs.

6. A common mode feedback circuit according to claim 5, wherein the MOSFETs are replaced by IGBTs, when: the drain electrode of the transistor is correspondingly replaced by the collector electrode of the IGBT, and the source electrode of the transistor is correspondingly replaced by the emitter electrode of the IGBT.

7. A common mode feedback circuit according to claim 5, wherein the MOSFETs are replaced with transistors, when: the drain electrode of the transistor is replaced by the collector electrode of the triode correspondingly, the source electrode of the transistor is replaced by the emitter electrode of the triode correspondingly, and the grid electrode of the transistor is replaced by the base electrode of the triode correspondingly.

8. A differential amplifier with a common mode feedback circuit, characterized in that the common mode feedback circuit is a common mode feedback circuit according to any one of claims 1 to 7.

Technical Field

The invention relates to the technical field of power electronics, in particular to a common-mode feedback circuit and a differential amplifier.

Background

In differential amplifier applications, it is sometimes necessary to introduce a common-mode feedback circuit to stabilize the common-mode voltage of the two inputs v1, v2 of the differential amplifier U1, as shown in fig. 1.

The conventional circuit structure of the common mode feedback circuit is shown in fig. 2, and includes an error amplifier U2 and two transistors M1a and M1b, wherein: two non-inverting input ends of the error amplifier U2 are respectively connected with two input ends v1 and v2 of the differential amplifier U1; the inverting input terminal of the error amplifier U2 receives the reference common mode voltage vcm; the output end of the error amplifier U2 is connected with the gates of the transistor M1a and the transistor M1 b; the sources of the transistor M1a and the transistor M1b are grounded; the drain of the transistor M1a is connected to the non-inverting input v1 of the differential amplifier U1 as the first output vo1 of the common mode feedback circuit; the drain of the transistor M1b is connected as the second output vo2 of the common mode feedback circuit to the inverting input v2 of the differential amplifier U1.

The working principle of the common mode feedback circuit shown in fig. 2 is to compare the common mode voltage of the two input ends v1 and v2 of the differential amplifier U1 with the reference common mode voltage vcm, and amplify a difference signal and output the amplified difference signal to the gates of the two transistors to realize the adjustment of the drain signals of the two transistors, so that the common mode voltage of v1 and v2 is stabilized.

However, the common mode feedback circuit shown in fig. 2 may introduce noise at v1 and v2, where the noise includes common mode noise and differential mode noise, the common mode noise does not affect the system, and the differential mode noise may cause the signal-to-noise ratio of the system to decrease.

Disclosure of Invention

In view of the above, the present invention provides a common mode feedback circuit and a differential amplifier, so as to reduce the differential mode noise introduced by the common mode feedback circuit at the two input terminals v1, v2 of the differential amplifier and ensure the stability of the common mode feedback loop.

A common-mode feedback circuit comprising an error amplifier, a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein:

the two in-phase input ends of the error amplifier are used for being respectively connected to the in-phase input end and the reverse-phase input end of the differential amplifier;

the inverting input end of the error amplifier receives a reference common-mode voltage;

the grids of the first transistor and the second transistor are connected with the output end of the error amplifier;

the grid electrodes of the third transistor and the fourth transistor receive a driving signal;

the sources of the first transistor and the second transistor are grounded;

the drain electrode of the first transistor, the drain electrode of the second transistor, the source electrode of the third transistor and the source electrode of the fourth transistor are connected to the same point;

the drain electrode of the third transistor is used for being connected to the non-inverting input end of the differential amplifier; the drain electrode of the fourth transistor is used for being connected to the inverting input end of the differential amplifier;

the difference value between the transconductance of the first transistor and the transconductance of the second transistor does not exceed a first preset value; the difference value between the transconductance of the third transistor and the transconductance of the fourth transistor does not exceed a second preset value; the difference value between the drain electrode to ground parasitic capacitance of the third transistor and the drain electrode to ground parasitic capacitance of the fourth transistor does not exceed a third preset value; the transconductance of the third transistor does not exceed a fourth preset value; the secondary pole frequency of the common mode feedback circuit is greater than the bandwidth of the common mode feedback loop.

Optionally, the first preset value is equal to zero.

Optionally, the second preset value is equal to zero.

Optionally, the third preset value is equal to zero.

Optionally, the transistor in the common mode feedback circuit is a MOSFET.

Optionally, the MOSFET is replaced with an IGBT, and at this time: the drain electrode of the transistor is correspondingly replaced by the collector electrode of the IGBT, and the source electrode of the transistor is correspondingly replaced by the emitter electrode of the IGBT.

Optionally, the MOSFET is replaced by a triode, and at this time: the drain electrode of the transistor is replaced by the collector electrode of the triode correspondingly, the source electrode of the transistor is replaced by the emitter electrode of the triode correspondingly, and the grid electrode of the transistor is replaced by the base electrode of the triode correspondingly.

A differential amplifier with a common mode feedback circuit, wherein the common mode feedback circuit is any one of the common mode feedback circuits disclosed above.

According to the technical scheme, the two transistors are additionally arranged on the basis of the traditional circuit structure of the common-mode feedback circuit, so that the noise generated by the two transistors is changed into the pure common-mode noise, and the differential-mode noise at v1 and v2 is determined by the transconductance of the two newly arranged transistors, so that the differential-mode noise is reduced by reducing the transconductance of the two newly arranged transistors. In addition, the stability of the common mode feedback loop is determined by the transconductance of the two original transistors, so the stability of the common mode feedback loop is improved by increasing the transconductance of the two original transistors.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a differential amplifier with a common-mode feedback circuit disclosed in the prior art;

FIG. 2 is a schematic diagram of a common mode feedback circuit according to the prior art;

FIG. 3 is a schematic diagram of a common mode feedback circuit according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of an equivalent circuit structure of the common mode feedback circuit shown in FIG. 2;

FIG. 5 is a schematic diagram illustrating the flow of noise current in the common mode feedback circuit of FIG. 2;

FIG. 6 is a schematic diagram of an equivalent circuit structure of the common mode feedback circuit shown in FIG. 3;

fig. 7 is a schematic diagram illustrating the flow of noise current in the common mode feedback circuit shown in fig. 3.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 3, an embodiment of the present invention discloses a common mode feedback circuit, including an error amplifier U2, a transistor M1a, a transistor M1b, a transistor M2a, and a transistor M2b, wherein:

the two non-inverting input ends of the error amplifier U2 are respectively connected to the non-inverting input end v1 and the inverting input end v2 of the differential amplifier U1;

the inverting input terminal of the error amplifier U2 receives the reference common mode voltage vcm;

the gates of the transistor M1a and the transistor M1b are connected with the output end of the error amplifier U2;

the gates of the transistor M2a and the transistor M2b receive a driving signal;

the sources of the transistor M1a and the transistor M1b are grounded;

the drain of the transistor M1a, the drain of the transistor M1b, the source of the transistor M2a and the source of the transistor M2b are connected to the same point P;

the drain of the transistor M2a is used as the first output terminal vo1 of the common mode feedback circuit for connecting the non-inverting input terminal v1 of the differential amplifier U1; the drain of the transistor M2b is used as the second output terminal vo2 of the common mode feedback circuit for connecting to the inverting input terminal v2 of the differential amplifier U1;

on the parameter setting, the difference between the transconductance of the transistor M1a and the transconductance of the transistor M1b does not exceed a first preset value; the difference between the transconductance of the transistor M2a and the transconductance of the transistor M2b does not exceed a second preset value; the difference between the parasitic capacitance to ground of the first output vo1 and the parasitic capacitance to ground of the second output vo2 does not exceed a third preset value; the transconductance of the transistor M2a does not exceed the fourth preset value; the secondary pole frequency of the common mode feedback circuit is larger than the bandwidth of the common mode feedback loop.

The common mode feedback circuit shown in fig. 4 is obtained by adding two transistors M2a and M2b to the common mode feedback circuit shown in fig. 2. The working principle of the common mode feedback circuit shown in fig. 4 will be elucidated by analyzing the common mode feedback circuit shown in fig. 2.

In fig. 2, the transistor M1a satisfies the following relational expression

S_in-M1a＝4kTr·gm1a+V_nflick-M1a·gm1a²(1)

In fig. 2, the transistor M1b satisfies the following relational expression

S_in-M1b＝4kTr·gm1b+V_nflick-M1b·gm1b²(2)

Wherein k is Boltzmann's constant, T is absolute temperature, and r is a constant; v_nflick-M1aAnd V_nflick-M1bThe flicker noise voltages of the transistor M1a and the transistor M1b are respectively represented; s_in-M1aAnd S_in-M1bPower spectral densities representing noise currents generated by the transistor M1a and the transistor M1b, respectively; gm1a and gm1b represent the transconductance of the transistor M1a and the transistor M1b, respectively, and theoretically, gm1a is required to be gm1b to gm 1.

The parasitic capacitances of the first output terminal vo1 and the second output terminal vo2 to ground are denoted by C1 and C2, respectively, and theoretically, C1 ═ C2 ═ C is required (the parasitic capacitances refer to capacitance characteristics exhibited at corresponding nodes, and are not artificially mounted on capacitors at the nodes, and fig. 4 is an equivalent circuit of fig. 2). When the sub-pole frequency of the common mode feedback circuit shown in FIG. 2 is represented by wp2, wp2 theoretically satisfies the following relation

wp2＝gm1/C (3)

As can be seen from the equations (1) and (3), the larger the secondary pole frequency wp2 of the common mode feedback circuit is, the larger the required transconductance gm1a of the transistor M1a is, and the larger the transistor M1a is, resulting in crystal grainsPower spectral density S of noise current generated by transistor M1a_in-M1aThe larger.

As can be seen from equations (2) and (3), for the transistor M1b, the larger the secondary pole frequency wp2 of the common mode feedback circuit is, the larger the required transconductance gm1b of the transistor M1b is, resulting in the power spectral density S of the noise current generated by the transistor M1b_in-M1bThe larger.

It can be seen that by reducing the sub-pole frequency wp2, smaller gm1a and gm1b can be selected, thereby reducing S_in-M1aAnd S_in-M1b。

The differential mode noise current introduced by the common mode feedback circuit at v1 and v2 is the difference between the noise current output by the first output terminal vo1 and the noise current output by the second output terminal vo 2. In fig. 2, the noise current output by the first output terminal vo1 is the noise current IM1a generated by the transistor M1b, the noise current output by the second output terminal vo2 is the noise current IM1b generated by the transistor IM1b (the forward noise current flows to the dotted line shown in fig. 5), so the differential mode noise currents introduced by the common mode feedback circuit at v1 and v2 are equal to IM1a-IM1b, and it can be seen that the differential mode noise currents at v1 and v2 are substantially introduced by the transistors M1a and M1b, so S is reduced_in-M1aAnd S_in-M1bDifferential mode noise currents introduced by the transistors M1a, M1b at v1, v2 can be reduced. As can be seen from the above description, reducing the secondary pole frequency wp2 reduces the differential mode noise introduced by the common mode feedback circuit at v1 and v 2.

However, to achieve common-mode feedback loop stability requirements, the secondary pole frequency wp2 must be larger than the bandwidth of the common-mode feedback loop. For the common mode feedback circuit shown in fig. 2, the value of wp2 must be chosen as a compromise between high loop bandwidth and low differential mode noise, and cannot satisfy both high loop bandwidth and low differential mode noise.

In this regard, the embodiment of the present invention adds two transistors M2a and M2b directly on the basis of the common mode feedback circuit shown in fig. 2, so as to obtain the common mode feedback circuit shown in fig. 3.

The two transistors M2a and M2b remain on when the common mode feedback circuit of fig. 3 is operating. The working principle of the common mode feedback circuit shown in fig. 3 is: the common-mode voltage of two input ends v1 and v2 of a differential amplifier U1 is compared with a reference common-mode voltage vcm, a difference signal is amplified and then output to the gates of two transistors M1a and M1b, adjustment of drain signals of the two transistors M1a and M1b is achieved, adjustment of drain signals of the two transistors M2a and M2b is further achieved, and therefore the common-mode voltage of v1 and v2 is stable.

The transconductances of the transistor M2a and the transistor M2b are denoted by gm2a and gm2b, respectively, and theoretically gm2a is required to be gm2b to gm 2; respectively with S_in-M2aAnd S_in-M1bPower spectral density representing noise current generated by transistors M2a, M2 b; respectively by V_nflick-M2aAnd V_nflick-M2bThe flicker noise voltages of the transistor M2a and the transistor M2b are shown. Then in fig. 3, the transistor M2a satisfies the following relation

S_in-M2a＝4kTr·gm2a+V_nflick-M1a·gm2a²(4)

The transistor M2b satisfies the following relation

S_in-M2b＝4kTr·gm2b+V_nflick-M2b·gm2b²(5)

The formulae (1) and (2) are also satisfied in fig. 3.

The differential mode noise current introduced by the common mode feedback circuit at v1 and v2 is the difference between the noise current output by the first output terminal vo1 and the noise current output by the second output terminal vo 2. In fig. 3, noise is generated in transistors M1a, M1b, M2a, and M2b, noise current IM1a generated in transistor M1a and noise current IM1b generated in M1b are merged at a point P, the noise current at point P is divided into two paths for output, one path is distributed to transistor M2a and is superimposed with noise current IM2a generated in transistor M2a to obtain noise current I1 output by first output terminal vo1, the other path is distributed to transistor M2b and is superimposed with noise current IM2b generated in transistor M2b to obtain noise current I2 output by second output terminal vo2 (forward noise current flows refer to the dashed directional line shown in fig. 7). Since gm2a is gm2b, the P-point noise current is uniformly distributed to transistor M2a and transistor M2b, i.e., noise current I1 is IM2a + (IM1a + IM1b)/2, and noise current I2 is IM2b + (IM1a + IM1 b)/2. And the differential mode noise current at the two input ends v1, v2 of the differential amplifier U1 is:

I1-I2＝IM2a+(IM1a+IM1b)/2-(IM2b+(IM1a+IM1b)/2)＝IM2a-IM2b (6)

as can be seen from equation (6), the improved common mode feedback circuit changes the noise generated by the transistors M1a and M1b into pure common mode noise, and the differential mode noise currents at v1 and v2 are substantially introduced by the transistors M2a and M2b, so that the power spectral density S of the noise currents of the transistors M2a and M2b is reduced_in-M2aAnd S_in-M1bThe differential mode noise current introduced by the transistors M2a and M2b at v1 and v2 can be reduced, and S can be reduced by selecting smaller gm2 according to the formulas (4) and (5)_in-M2aAnd S_in-M1b。

The parasitic capacitances of the first output terminal vo1 and the second output terminal vo2 to the ground are denoted by C3 and C4, and theoretically, C3 is required to be C4, and fig. 6 is an equivalent circuit diagram of fig. 3. Due to the addition of two transistors M2a and M2b, the capacitance value C' may be changed from that of fig. 2. The sub-pole frequency of the common-mode feedback circuit shown in fig. 3 is still represented by wp2, the working principle of the common-mode feedback circuit determines that the size of the sub-pole frequency wp2 is always determined by the transconductance of two transistors connected to the output of the error amplifier U2, and wp2 theoretically satisfies the following relational expression

wp2＝gm1/C′ (7)

As can be seen from equations (7) and (6), in fig. 3, the magnitude of the secondary pole frequency wp2 is determined by the transconductance gm1 of transistors M1a and M1b, while the magnitudes of the differential mode noise currents at v1 and v2 are determined by the transconductance gm2 of transistors M2a and M2b, and since gm1 and gm2 are independent from each other, the magnitude of the secondary pole frequency wp2 and the magnitudes of the differential mode noise currents at v1 and v2 are also independent from each other. Therefore, for the common mode feedback circuit shown in fig. 3, it is allowed to set the secondary pole frequency wp2 larger than the bandwidth of the loop, while setting gm2 small to reduce the differential mode noise current, thereby satisfying both a very high loop bandwidth and a very low differential mode noise.

As can be seen from the above description, the embodiment of the present invention adds two transistors on the basis of the common mode feedback circuit shown in fig. 2, so that the noise generated by the two transistors originally becomes a pure common mode noise, and the differential mode noise at v1 and v2 is determined only by the transconductance of the two transistors added, so that the embodiment of the present invention reduces the differential mode noise by reducing the transconductance of the two transistors added. In addition, the stability of the common mode feedback loop is determined by the transconductance of the original two transistors, so the embodiment of the invention improves the stability of the common mode feedback loop by increasing the transconductance of the original two transistors.

It should be noted that, under the influence of the device production process or other factors, there may be slight differences in size between gm1a and gm1b, between gm2a and gm2b, and between C3 and C4, which are allowed in practical engineering applications, and the deviations thereof are negligible, that is, gm1a and gm1b are allowed to be equal or approximately equal in practical engineering applications (i.e., the difference between gm1a and gm1b is not limited to a first preset value in practical engineering applications), and gm2a and gm2b are allowed to be equal or approximately equal in practical engineering applications (i.e., the difference between gm2a and gm2b is not limited to a second preset value in practical engineering applications), and C3 and C4 are allowed to be equal or approximately equal (i.e., the difference between C3 and C4 is not limited to a third preset value in practical engineering applications).

In addition, the Transistor in the embodiment of the present invention is preferably a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Alternatively, the Transistor may be an IGBT (Insulated Gate Bipolar Transistor), a triode, or the like, without limitation. When the transistor is an IGBT, the drain electrode of the transistor is correspondingly replaced by the collector electrode of the IGBT, and the source electrode of the transistor is correspondingly replaced by the emitter electrode of the IGBT. When the transistor is a triode, the drain electrode of the transistor is correspondingly replaced by the collector electrode of the triode, the source electrode of the transistor is correspondingly replaced by the emitter electrode of the triode, and the grid electrode of the transistor is correspondingly replaced by the base electrode of the triode.

In addition, the embodiment of the invention also discloses a differential amplifier with any one of the common mode feedback circuits disclosed above.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the use of the verb "comprise a" to define an element does not exclude the presence of another, identical element in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the embodiments. Thus, the present embodiments are not intended to be limited to the embodiments shown herein but are to be accorded the widest scope consistent with the principles and novel features disclosed herein.