阅读说明：本技术 一种射频功率放大器及控制方法 (Radio frequency power amplifier and control method ) 是由 曹原 胡自洁 倪楠 倪建兴 于 2020-04-01 设计创作，主要内容包括：本发明公开了一种射频功率放大器及控制方法,该放大器包括至少两级用于对射频输入信号进行放大并输出射频信号的放大电路和开关网络,所述开关网络在放大器处于高功率模式时使各级放大电路均处于工作状态；所述开关网络在放大器工作于低功率模式时使一级放大电路处于工作状态。本发明提供的射频功率放大器通过开关网络控制放大器在低功率模式只有一级放大电路处于工作状态,其功耗和增益都可以控制在较低的水平。对于差分结构的功率放大器,一般在低功率模式(LPM)下,增益大概18dB,电源电压0.6V时对应的电流为70mA。本发明提供的射频功率放大器可以将增益降到10dB(LPM一般要求13-15dB),电源电压0.6V时的电流可以降低到50mA。(The invention discloses a radio frequency power amplifier and a control method, wherein the amplifier comprises at least two stages of amplifying circuits and a switch network, wherein the amplifying circuits and the switch network are used for amplifying a radio frequency input signal and outputting a radio frequency signal, the switch network enables all stages of amplifying circuits to be in a working state when the amplifier is in a high power mode, and the switch network enables one stage of amplifying circuit to be in a working state when the amplifier is in a low power mode.)

1. A radio frequency power amplifier is characterized in that the amplifier comprises at least two stages of amplifying circuits and a switch network, wherein the amplifying circuits are used for amplifying a radio frequency input signal and outputting a radio frequency signal; the switch network enables one stage of amplifying circuit in each stage of amplifying circuit to be in a working state when the amplifier works in a low-power mode.

2. The radio frequency power amplifier of claim 1, wherein: the high power mode input matching circuit is used for matching a radio frequency input signal to the first stage of amplifying circuit when the amplifier works in the high power mode.

3. The radio frequency power amplifier of claim 1 or 2, wherein: also included is a low power mode input matching circuit that matches a radio frequency input signal to the amplifying circuit in an active state when the amplifier is operating in a low power mode.

4. The radio frequency power amplifier of claim 3, wherein: the switch network comprises a first switch S1, a second switch S2 and a third switch S3, when the power amplifier works in a high-power mode, the first switch S1 is closed, and the second switch S2 and the third switch S3 are opened, so that each stage of amplifying circuit is in a working state; when the power amplifier works in a low power mode, the first switch S1 is opened, and the second switch S2 and the third switch S3 are closed, so that one of the amplifying circuits in each stage is in a working state; when the power amplifier works in the low power mode, the radio frequency input signal is input to the amplifying circuit in the working state through the second switch S2, the low power mode input matching circuit and the third switch S3 in sequence.

5. The radio frequency power amplifier of claim 3, wherein: when the power amplifier works in a low-power mode, a radio-frequency input signal is sequentially input through the switch network and the low-power mode input matching circuit, or a radio-frequency signal is sequentially input through the low-power mode input matching circuit and the switch network.

6. The radio frequency power amplifier of claim 1 or 2, wherein: a high frequency bias circuit is also included that provides a bias signal to each stage of the amplification circuit when the amplifier is operating in the high power mode.

7. The radio frequency power amplifier of claim 1 or 2, wherein: the amplifier further comprises a low frequency bias circuit for providing a bias signal to the operational amplifier circuit when the amplifier is operating in the low power mode.

8. The radio frequency power amplifier of claim 1 or 2, wherein: and the intermediate stage matching circuit is connected between the adjacent two stages of amplifying circuits in series.

9. The radio frequency power amplifier of claim 1 or 2, wherein: the radio frequency signal output matching circuit is used for carrying out output matching on the radio frequency signal output by the last stage of amplifying circuit.

10. A method of controlling a radio frequency power amplifier, comprising: the amplifier comprises at least two stages of amplifying circuits and a switch network, wherein the amplifying circuits are used for amplifying radio frequency input signals and outputting the radio frequency signals; the switching network places the primary amplification circuit in operation when the amplifier is operating in a low power mode.

Technical Field

The invention belongs to the field of electronic circuits, and particularly relates to a radio frequency power amplifier and a control method thereof.

Background

The power amplifier is a device capable of amplifying the voltage or power of an input signal to control the output power within a specific range; the power amplifier consists of an electronic tube or a transistor, a power transformer and other electrical elements; is widely used in various devices such as communication, broadcasting, radar, television, automatic control and the like.

In the front stage circuit of the transmitter, the radio frequency signal power generated by the modulation oscillating circuit is very small, and the radio frequency signal power needs to pass through a series of amplifying-buffer stage, intermediate amplifying stage and final power amplifying stage, and can be fed to the antenna to be radiated after obtaining enough radio frequency power. In order to obtain a sufficiently large radio frequency output power, a radio frequency power amplifier must be employed.

The rf power amplification is an important component of the transmitting device, and the main technical indicators of the rf power amplifier are output power and efficiency. In addition, the harmonic components in the output should be as small as possible to avoid interference with other channels.

The rf amplifier generally includes two or more stages of amplifying circuits, and its operation mode generally includes: a high power mode and a low power mode. Currently, when designing the low power mode of an amplifier, manufacturers of radio frequency amplifiers usually adopt a mode of "configuring independent low power mode bias circuits for the first stage/second stage amplification circuits respectively", which can reduce the power consumption of the amplifier to some extent, but is still not low enough because the first stage/second stage amplifiers in this mode need to be powered on, and the low power mode requires that the amplifier has a relatively low gain (amplification factor), but because the two stage amplification circuits are in an operating state in the above method, the gain is still high.

Disclosure of Invention

In order to solve the technical problems in the prior art, the present invention is directed to a radio frequency power amplifier having a significantly lower power consumption in a low power mode than in a high power mode.

The radio frequency power amplifier provided for achieving the purpose of the invention comprises at least two stages of amplifying circuits and a switch network, wherein the amplifying circuits are used for amplifying a radio frequency input signal and outputting a radio frequency signal; the switch network enables one stage of amplifying circuit in each stage of amplifying circuit to be in a working state when the amplifier works in a low-power mode.

Further, the radio frequency power amplifier provided by the invention also comprises a high power mode input matching circuit which matches the radio frequency input signal to the first stage of amplifying circuit when the amplifier works in the high power mode.

Further, the radio frequency power amplifier provided by the invention also comprises a low power mode input matching circuit which matches the radio frequency input signal to the amplifying circuit in the working state when the amplifier works in the low power mode.

Further, in the radio frequency power amplifier provided by the present invention, the switch network includes a first switch S1, a second switch S2, and a third switch S3, when the power amplifier operates in the high power mode, the first switch S1 is closed, and the second switch S2 and the third switch S3 are opened, so that each stage of the amplifying circuit is in an operating state; when the power amplifier works in a low power mode, the first switch S1 is opened, and the second switch S2 and the third switch S3 are closed, so that one of the amplifying circuits in each stage is in a working state; when the power amplifier works in the low power mode, the radio frequency input signal is input to the amplifying circuit in the working state through the second switch S2, the low power mode input matching circuit and the third switch S3 in sequence.

Further, when the radio frequency power amplifier provided by the invention operates in the low power mode, the radio frequency input signal is sequentially input through the switch network and the low power mode input matching circuit, or the radio frequency signal is sequentially input through the low power mode input matching circuit and the switch network.

Further, the radio frequency power amplifier provided by the invention also comprises a high-frequency bias circuit which provides a bias signal for each stage of amplifying circuit when the amplifier works in a high-power mode.

Further, the radio frequency power amplifier provided by the invention also comprises a low-frequency bias circuit which provides a bias signal for the amplifying circuit in the working state when the amplifier works in the low-power mode.

Furthermore, the radio frequency power amplifier provided by the invention also comprises an intermediate stage matching circuit which is connected in series between two adjacent stages of amplifying circuits.

Further, the radio frequency power amplifier provided by the invention further comprises an output matching circuit, wherein the output matching circuit is used for performing output matching on the radio frequency signal output by the last stage of amplifying circuit.

The beneficial effects of the invention include:

for the power amplifier with a differential structure, generally in a low power mode (L PM), the gain is about 18dB, the corresponding current at a power supply voltage of 0.6V is 70 mA., the gain of the radio frequency power amplifier provided by the invention can be reduced to 10dB (L PM generally requires 13-15 dB), and the current at the power supply voltage of 0.6V can be reduced to 50 mA.

The radio frequency power amplifier provided by the invention matches different biases (a high-frequency bias circuit and a low-frequency bias circuit) for different modes, realizes the adaptation of the two different modes, and further ensures the gain of a high-power mode and the low power of the low-power mode.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:

fig. 1 is a first schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 2 is a schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 3 is a schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 4 is a schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 5 is a schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 6 is a sixth schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 7 is a seventh schematic diagram of the rf power amplifier provided by the present invention;

fig. 8 is a schematic diagram eight of a radio frequency power amplifier provided by the present invention;

fig. 9 is a schematic diagram nine of a radio frequency power amplifier provided by the present invention;

fig. 10 is a schematic diagram ten of a radio frequency power amplifier provided by the present invention;

fig. 11 is an eleventh schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 12 is a twelve schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 13 is a thirteenth schematic diagram of the rf power amplifier provided by the present invention;

fig. 14 is a fourteenth schematic diagram of a radio frequency power amplifier provided by the present invention;

fig. 15 is a schematic diagram fifteen of a radio frequency power amplifier provided by the present invention;

FIG. 16 is one of the circuit schematic diagrams of the low power mode input matching circuit F provided by the present invention;

FIG. 17 is a second schematic circuit diagram of the low power mode input matching circuit F according to the present invention;

FIG. 18 is a third schematic circuit diagram of a low power mode input matching circuit F according to the present invention;

FIG. 19 is a fourth schematic circuit diagram of the low power mode input matching circuit F provided by the present invention;

FIG. 20 is a fifth schematic circuit diagram of the low power mode input matching circuit F provided in the present invention;

fig. 21 is a circuit schematic diagram of the high frequency bias circuit/low frequency bias circuit provided by the present invention.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art.

The invention provides a radio frequency power amplifier, aiming at solving the technical problems of high power consumption and high gain of the existing radio frequency power amplifier in a low power mode.

The radio frequency power amplifier provided by the invention comprises at least two stages of amplifying circuits and a switch network, wherein the amplifying circuits are used for amplifying radio frequency input signals and outputting the radio frequency signals; the switch network enables one stage of the amplifying circuits to be in an operating state when the amplifier works in a low-power mode.

The rf power amplifier provided by the present invention is described in detail herein with reference to the two-stage amplifier circuit shown in fig. 1 for amplifying an rf input signal and outputting an rf signal.

The two-stage amplifying circuit is a first-stage amplifying circuit B and a second-stage amplifying circuit D respectively, and the first-stage amplifying circuit B and the second-stage amplifying circuit D are connected in series. The switch network comprises a first switch S1 and a second switch S2 matched with the amplifying circuit; the radio frequency input signal is respectively input into a first-stage amplifying circuit B and a second-stage amplifying circuit D through a first switch S1 and a second switch S2; the first switch S1/the second switch S2 are controlled by a control signal to be turned on/off, specifically: when the power amplifier is in a high-power mode, the control signal controls the first switch S1 to be closed, the second switch S2 to be opened, the radio-frequency input signal is input into the first-stage amplifying circuit B through the first switch S1, and is amplified by the first-stage amplifying circuit B and the second-stage amplifying circuit D in sequence and then is output through the second-stage amplifying circuit D; when the power amplifier is in the low power mode, the control signal controls the first switch S1 to be opened, the second switch S2 to be closed, and the rf input signal is input to the second stage amplifying circuit D through the first switch S2 for amplification and then output. Here, control signals of the first switch S1 and the second switch S2 are provided through the controller.

The above radio frequency power amplifier structure achieves switching in different modes through the first switch S1 and the second switch S2. The second stage of the amplifying circuit D can be multiplexed in two modes, and the multiplexed amplifying circuit can adopt a differential structure, as shown in fig. 13, which ensures PAE of the radio frequency power amplifier structure.

As shown in fig. 2-11, the rf power amplifier herein further includes one or any combination of the following functional circuits; fig. 2 is a schematic diagram including the following high power mode input matching circuit a, fig. 3 is a schematic diagram including the following low power mode input matching circuit F, fig. 4 and 5 are schematic diagrams including the following intermediate stage matching circuit C, fig. 6 is a schematic diagram including the following high frequency bias circuit, and fig. 7 is a schematic diagram including the following low frequency bias circuit; fig. 8 is a schematic diagram including the following output matching circuit E, fig. 9 is a schematic diagram including the following high power mode input matching circuit a, low power mode input matching circuit F, intermediate stage matching circuit C, and output matching circuit E, fig. 10 is a schematic diagram including the following high frequency bias circuit and low frequency bias circuit, and fig. 11 is a schematic diagram including all the following functional circuits.

The high-power mode input matching circuit A is used for matching a radio frequency input signal input through the switch network to the first-stage amplifying circuit when the power amplifier works in the high-power mode;

a low power mode input matching circuit F, wherein when the power amplifier operates in the low power mode, the rf input signal is matched to the amplifier circuit in an operating state through the switch network and the low power mode input matching circuit F, and when the power amplifier operates in the low power mode, the rf input signal input through the second switch S2 is matched to the second stage amplifier circuit D in combination with the schematic diagram shown in fig. 1;

the intermediate stage matching circuit C is connected between the two adjacent stages of amplifying circuits in series and is used for matching the amplifying signals between the two adjacent stages of amplifying circuits; when the power amplifier is in a low-power mode, when the power amplifier is in the low-power mode, a radio-frequency input signal input through the switch network is matched to the amplifying circuit in a working state through the low-power mode input matching circuit F and the intermediate stage matching circuit C; or when the power amplifier works in the low-power mode in combination with the low-power mode input matching circuit F, the radio-frequency input signal input through the switch network is matched to the amplifying circuit in the working state through the low-power mode input matching circuit F;

the high-frequency bias circuit is used for providing a bias signal for each stage of amplifying circuit when the power amplifier works in a high-power mode; with reference to the schematic diagram shown in fig. 1, a first stage high frequency bias circuit G and a second stage high frequency bias circuit H are respectively configured; providing bias signals for the first-stage amplifying circuit B and the second-stage amplifying circuit D respectively when the power amplifier works in a high-power mode;

the low-frequency bias circuit is used for providing a bias signal for the amplifying circuit in the working state when the power amplifier works in the low-power mode; in combination with the schematic diagram shown in fig. 1, a second-stage low-frequency bias circuit I is configured to provide a bias signal for a second-stage amplifying circuit D in an operating state when the power amplifier operates in a low-power mode;

the output matching circuit E is used for performing output matching on the radio-frequency signal output by the last stage of amplifying circuit after being processed by the amplifying circuit; with reference to the schematic diagram shown in fig. 1, the output matching circuit E is configured to perform output matching on the radio frequency signal output by the second stage amplifying circuit D to form a radio frequency output.

The working states of the high-frequency bias circuit and the low-frequency bias circuit are controlled by control signals, and the control signals are generated by a controller in one embodiment of the invention; if the power amplifier works in a high-power mode, the controller outputs a control signal to control the first-stage high-frequency bias circuit G and the second-stage high-frequency bias circuit H to provide bias signals for the first-stage amplifying circuit B and the second-stage amplifying circuit D; if the power amplifier works in the low power mode, the controller outputs a control signal to control the second-stage low-frequency bias circuit I to provide a bias signal for the second-stage amplifying circuit D.

The radio frequency power amplifier provided by the present invention is described in detail herein by taking as an example that the radio frequency power amplifier includes a first switch S1, a second switch S2, a third switch S3, a first stage amplification circuit B, a second stage amplification circuit D, a high power mode input matching circuit a, a low power mode input matching circuit F, an intermediate stage matching circuit C, a first stage high frequency bias circuit G, a second stage high frequency bias circuit H, a second stage low frequency bias circuit I, and an output matching circuit E, and specific circuit structures include the following three types:

1. as shown in fig. 12, the high-power mode input matching circuit a includes a capacitor C1, a capacitor C2 and an inductor L1, the low-power mode input matching circuit F includes a capacitor C8, a capacitor C9 and an inductor L5, the first stage amplifier circuit B includes a transistor Q1, the intermediate stage matching capacitor C includes a capacitor C3, the second stage amplifier circuit D includes a transistor Q2, the output matching circuit E includes a capacitor C6, a capacitor C7, an inductor L4 and an inductor L6, the first stage high-frequency bias circuit G provides a bias signal for the first stage amplifier circuit B, the second stage high-frequency bias circuit H provides a bias signal for the second stage amplifier circuit D, the second stage high-frequency bias circuit H and the second stage low-frequency bias circuit I provide bias signals for the second stage amplifier circuit D through a resistor R1 and a resistor R2, respectively, the second stage bias circuit H provides a bias signal for the second stage amplifier circuit D when the power amplifier operates in the high-power mode, and the second stage high-frequency bias circuit I provides a single-end bias signal for the low-power amplifier when the power amplifier operates in the low-power mode.

One end of a first switch S1 serves as an input end and is used for loading radio frequency input signals, the other end of the first switch S1 is connected with a first pole plate of a capacitor C1, a second pole plate of the capacitor C1 is connected with a first pole plate of the capacitor C2 and is grounded through an inductor L, a second pole plate of a capacitor C2 is connected with a base electrode of a triode Q1, an emitter electrode of a triode Q1 is grounded, a collector electrode of a triode Q1 is connected with a power supply VCC1 through an inductor L and serves as an output end and is connected with a first pole plate of a capacitor C3, a second pole plate of a capacitor C3 is connected with a base electrode of a triode Q2, an emitter electrode of a triode Q2 is grounded, a collector electrode of the triode Q L is connected with a power supply VCC2 and serves as an output end and is connected with a first pole plate of a capacitor C6, a second pole plate of a capacitor C6 is connected with one end of an inductor 59.

One end of the second switch S2 is used as an input end for loading a radio frequency input signal, the other end is connected to the first plate of the capacitor C8, the second plate of the capacitor C8 is connected to the first plate of the capacitor C9 and grounded via the inductor L5, and the second plate of the capacitor C9 is connected to the first plate of the capacitor C3.

When the power amplifier operates in the high power mode, the first switch S1 is closed, the second switch S2 is opened, and the first stage high frequency bias circuit G and the second stage high frequency bias circuit H provide bias signals for the first amplifying circuit B and the second amplifying circuit D, respectively. The radio frequency input signal is input into the matching circuit A, the first amplifying circuit B, the intermediate stage matching circuit C, the second amplifying circuit D and the output matching circuit E through the high power mode and then is output in radio frequency.

When the power amplifier operates in the low power mode, the first switch S1 is opened, the second switch S2 is closed, and the second stage low frequency bias circuit I provides a bias signal for the second amplifying circuit D. The radio frequency input signal is input into the matching circuit F, the intermediate stage matching circuit C, the second amplifying circuit D and the output matching circuit E in a low power mode and then is output in a radio frequency mode.

2. As shown in fig. 13, the high-power mode input matching circuit a includes a capacitor C1, a capacitor C2 and an inductor L, the low-power mode input matching circuit F includes a capacitor C8, a capacitor C9 and an inductor L, the first stage amplifier circuit B includes a transistor Q1, the intermediate stage matching capacitor C includes a transformer T1, a capacitor C3, a capacitor C4 and a capacitor C5, the second stage amplifier circuit D includes a transistor Q2 and a transistor Q3, the output matching circuit E includes a transformer T2, a capacitor C6, a capacitor C7 and a capacitor C7, the first stage high-frequency bias circuit G provides a bias signal for the first stage amplifier circuit B, the second stage high-frequency bias circuit H, the second stage low-frequency bias circuit I provides a bias signal for the second stage amplifier circuit D through a resistor R7, the second stage high-frequency bias circuit H provides a bias signal for the transistor Q7 through a resistor R7, the second stage high-frequency bias circuit I provides a bias signal for the transistor Q7 through a resistor R7, the second stage high-frequency bias circuit H provides a bias signal for the transistor Q7, the second stage amplifier circuit H7 provides a bias signal, the bias circuit H, the high-frequency bias circuit H provides a bias signal, the bias circuit H-PM bias circuit 14, the bias circuit provides a bias signal when the high-PM bias circuit 14, the high-PM bias circuit provides a power amplifier circuit p-PM bias signal when the low-PM bias circuit operates in a power mode amplifier circuit, the low-PM bias circuit operates, the low-PM amplifier circuit operates, the low-power amplifier circuit operates under a power amplifier circuit operates, the low-power amplifier circuit operates under a differential amplifier circuit operates, the normal operation mode amplifier circuit operates, the low.

One end of a first switch S1 is used as an input end and is used for loading a radio frequency input signal, the other end of the first switch S1 is connected with a first pole plate of a capacitor C1, a second pole plate of a capacitor C1 is connected with a first pole plate of a capacitor C2 and is grounded through an inductor L1, a second pole plate of a capacitor C2 is connected with a base electrode of a triode Q1, an emitter electrode of a triode Q1 is grounded, a collector electrode of a triode Q1 is used as an output end and is connected with a 1 end of a transformer T1, a 1 end of the transformer T1 is grounded through a capacitor C1, a 2 end of the transformer T1 is connected with a power supply VCC1, a 3 end of the transformer T1 is connected with a base electrode of the triode Q1 through a capacitor C1, an emitter electrode of the transformer T1 is grounded, a collector electrode of the transformer T1 is used as an output end 2 end of the transformer T1, a tap 5 of the transformer T1 is connected with a power supply 1, a VCC is connected in series with the transformer T1, a capacitor C1 and a radio frequency signal output end 1 and is connected with a capacitor C1 and a radio frequency output.

One end of the second switch S2 is used as an input end for loading a radio frequency input signal, the other end is connected to the first plate of the capacitor C8, the second plate of the capacitor C8 is connected to the first plate of the capacitor C9 and grounded via the inductor L5, and the second plate of the capacitor C9 is connected to the 1 end of the transformer T1.

The working principle of the circuit structure is the same as that of the circuit structure, when the power amplifier works in a high-power mode, a radio-frequency input signal is input into the matching circuit A, the first amplifying circuit B, the intermediate stage matching circuit C, the second amplifying circuit D and the output matching circuit E through the high-power mode and then is output in a radio-frequency mode. When the power amplifier works in a low power mode, a radio frequency input signal passes through the low power mode input matching circuit F, the intermediate stage matching circuit C, the second amplifying circuit D and the output matching circuit E and then is output in a radio frequency mode.

3. This structure differs from the above 1 st and 2 nd structures in that: in this configuration, the second switch S2 and the third switch S3 are located in a branch with the low power mode input matching circuit F, and are connected to the input terminal and the output terminal of the low power mode input matching circuit F, respectively, as shown in fig. 14 and 15. When the power amplifier operates in the high power mode, the second switch S2 is turned off, or the third switch S3 is turned off, or both the second switch S2 and the third switch S3 are turned off; when the power amplifier operates in the low power mode, the rf input signal is rf output through the second switch S2, the low power mode input matching circuit F, the third switch S3, the middle stage matching circuit C, the second amplifying circuit D and the output matching circuit E. The input and output ends of the low-power mode input matching circuit F are respectively connected with the second switch S2 and the third switch S3, so that in the high-power mode, the low-power mode input matching circuit F does not affect the matching networks of the high-power mode input matching circuit a and the intermediate stage matching circuit C, the efficiency of the power amplifier is ensured, and particularly, in the high-power mode, the second switch S2 and the third switch S3 are both off, and the efficiency of the power amplifier is further ensured.

In addition to the above-noted circuit configuration of the low power mode input matching circuit F, the low power mode input matching circuit F provided herein may also be one of the following configurations:

1) as shown in fig. 16, the low power mode input matching circuit F includes a capacitor C8, a capacitor C9, and an inductor L5, wherein a first plate of the capacitor C8 is used as an input terminal for loading a radio frequency input signal, a second plate of the capacitor C8 is connected to a first plate of the capacitor C9 and is grounded via the inductor L5, a second plate of the capacitor C9 is connected to one end of a second switch S2, and the other end of the second switch S2 is used for being connected to the middle stage matching circuit C or the second stage amplifying circuit D;

2) as shown in fig. 17, the low power mode input matching circuit F includes a capacitor C8 and a capacitor C9, a first plate of the capacitor C8 is used as an input terminal for loading the radio frequency input signal, a second plate of the capacitor C8 is connected to the first plate of the capacitor C9 through a second switch S2, and a second plate of the capacitor C9 is used for connecting with the middle stage matching circuit C or the second stage amplifying circuit D;

3) as shown in fig. 18, the low power mode input matching circuit F includes a resistor R5, one end of the resistor R5 is connected to the output terminal of the second switch S2, and the other end is used for connecting to the intermediate stage matching circuit C or to the second stage amplifying circuit D;

4) as shown in fig. 19, the low power mode input matching circuit F includes a resistor C8, a capacitor C8 having a first plate connected to the output terminal of the second switch S2, and a second plate for connecting to the intermediate stage matching circuit C or to the second stage amplifying circuit D;

3) as shown in fig. 20, the low power mode input matching circuit F includes an inductor L5, and one end of the inductor L5 is connected to the output terminal of the second switch S2, and the other end is used for connecting to the intermediate stage matching circuit C or to the second stage amplifying circuit D.

The first stage high frequency bias circuit G, the second stage high frequency bias circuit H, and the second stage low frequency bias circuit I described herein may be any one of those known in the art, and the bias circuit shown in fig. 21 is used herein. As shown in fig. 21, the diode comprises a diode D1, a diode D2 and a transistor Q4, wherein the anode of the diode D1 is connected with a power supply, the cathode is connected with the anode of the diode D2, and the cathode of the diode D2 is grounded; the anode of diode D1 is also connected to the base of transistor Q4, and the grounded-emitter collector of transistor Q4 serves as an output for providing a bias signal to the amplification circuit.

The output voltage, current and resistance of the high-frequency bias circuit and the low-frequency bias circuit can be adaptively set according to the corresponding modes.

Different bias circuits are matched for different modes, adaptation to the two different modes is achieved, and high-power gain and low power in a low-power mode are further guaranteed.

The "certain stage of amplifier circuit" in "a certain stage of amplifier circuit in working state" described herein refers to one stage of multi-stage amplifier circuit, and the radio frequency power amplifier provided by the present invention includes, for example, a first switch S1, a second switch S2, a third switch S3, a first stage of amplifier circuit B, a second stage of amplifier circuit D, a high power mode input matching circuit a, a low power mode input matching circuit F, an intermediate stage of matching circuit C, a first stage of high frequency bias circuit G, a second stage of high frequency bias circuit H, a second stage of low frequency bias circuit I, and an output matching circuit E, when the power amplifier is in low power consumption mode, the "certain stage of amplifier circuit in" working state "in" the certain stage of amplifier circuit is the second stage of amplifier circuit D; "first stage amplification circuit" refers to the amplification circuit that is first in the circuit, such as "first stage amplification circuit B" in fig. 12-15.

The radio frequency power amplifier disclosed by the invention realizes that only one path of amplifying circuit in the power amplifier is in a working state when the power amplifier works in a low power mode by controlling the switch to be in a conducting state under different working modes, so that the power consumption and the gain of the circuit are reduced.

The above embodiments are only for illustrating the technical solutions of the present invention and are not limited, and modifications or equivalent substitutions made by those skilled in the art to the technical solutions of the present invention are included in the scope of the claims of the present invention without departing from the spirit and scope of the technical solutions of the present invention.