阅读说明：本技术 一种触摸显示面板及其制造方法 (Touch display panel and manufacturing method thereof ) 是由 孙德瑞 于 2020-05-09 设计创作，主要内容包括：本发明提供了一种触摸显示面板及其制造方法,其在像素限定层或者像素限定层和平坦层中形成环绕像素单元的垂直型电容器,可以增加电容值的同时,防止像素限定层和平坦层中的水汽进入像素单元以及各层金属互连层；触控压力通过挡墙结构传递,使得电容值改变,实现触摸操作,且所述挡墙结构还可以防止有机发光层在喷墨打印形成时的串色问题。(The invention provides a touch display panel and a manufacturing method thereof.A vertical capacitor surrounding a pixel unit is formed in a pixel limiting layer or the pixel limiting layer and a flat layer, so that the capacitance value can be increased, and simultaneously, water vapor in the pixel limiting layer and the flat layer is prevented from entering the pixel unit and each metal interconnection layer; touch pressure is transmitted through the retaining wall structure, so that capacitance is changed, touch operation is realized, and the retaining wall structure can also prevent the color cross problem of the organic light emitting layer during ink jet printing formation.)

1. A method of manufacturing a touch display panel, comprising the steps of:

(1) forming a thin film transistor on a substrate;

(2) forming a flat layer covering the thin film transistor;

(3) forming a pixel defining layer on the planarization layer;

(4) forming a plurality of ring-shaped capacitive structures in the pixel defining layer, the ring-shaped capacitive structures comprising first and second annularly opposing capacitive electrodes;

(5) forming a retaining wall structure between the first capacitor electrode and the second capacitor electrode, wherein a part of the retaining wall structure is embedded in the pixel defining layer;

(6) forming a plurality of pixel defining holes in the pixel defining layer, and forming a plurality of pixel units in the plurality of pixel defining holes, wherein the plurality of ring-shaped capacitor structures surround the plurality of pixel units, respectively.

2. The method as claimed in claim 1, wherein another portion of the dam structure protrudes from the upper surface of the pixel defining layer.

3. The method of manufacturing a touch display panel according to claim 1, wherein the pixel unit includes a bottom electrode on an upper surface of the planarization layer, an organic light emitting layer in the pixel defining hole, and a top electrode covering the organic light emitting layer in this order.

4. The method of manufacturing a touch display panel according to claim 3, wherein the first capacitance electrode and the second capacitance electrode are perpendicular to an upper surface of the pixel defining layer and are completely embedded in the pixel defining layer.

5. The method for manufacturing a touch display panel according to claim 4, wherein a first lead line and a second lead line respectively connecting the first capacitor electrode and the second capacitor electrode are formed at the same time when the bottom electrode is prepared on the planarization layer.

6. The method as claimed in claim 3, wherein the first and second capacitor electrodes are perpendicular to the upper surface of the pixel defining layer and extend into the planarization layer through the pixel defining layer, and the dam structure extends at least to the pixel defining layer.

7. The method for manufacturing a touch display panel according to claim 6, wherein a first lead line and a second lead line for connecting the first capacitor electrode and the second capacitor electrode, respectively, are formed at the same time as a source-drain electrode layer of the thin film transistor is formed.

8. The method as claimed in claim 1, wherein the dam structure has a gap, and the interconnection layer of the top electrode passes through the gap.

9. The method of claim 1, wherein the dam structure is an inorganic oxide, a polymer material, or other rigid material.

10. A touch display panel formed by the method of manufacturing a touch display panel according to any one of claims 1 to 9.

Technical Field

The invention relates to the technical field of touch display panels, in particular to a touch display panel and a manufacturing method thereof.

Background

With the Organic Light-emitting Diode (OLED) panel, the panel has become more and more widely applied in the fields of mobile phones, watches, pads, etc. due to its advantages of wide color gamut, high contrast, large viewing angle, fast response speed, Light weight, and the like.

Touch display panel has been integrated display module and touch module's display panel structure, capacitive touch screen wherein, need set up the electric capacity structure in order to be used for responding to touch operation in the display screen, and current electric capacity structure is mostly vertical arrangement's upper and lower plate electrode, and it sets up between the pixel cell, can't improve the capacitance value of this electric capacity, and the touch is sensitive inadequately, and the pixel cell is also eroded easily to the steam on pixel limited layer.

Disclosure of Invention

In order to solve the above problems, the present invention provides a method for manufacturing a touch display panel, including the steps of:

(1) forming a thin film transistor on a substrate;

(2) forming a flat layer covering the thin film transistor;

(3) forming a pixel defining layer on the planarization layer;

(4) forming a plurality of ring-shaped capacitive structures in the pixel defining layer, the ring-shaped capacitive structures comprising first and second annularly opposing capacitive electrodes;

(5) forming a retaining wall structure between the first capacitor electrode and the second capacitor electrode, wherein a part of the retaining wall structure is embedded in the pixel defining layer;

(6) forming a plurality of pixel defining holes in the pixel defining layer, and forming a plurality of pixel units in the plurality of pixel defining holes, wherein the plurality of ring-shaped capacitor structures surround the plurality of pixel units, respectively.

And the other part of the retaining wall structure protrudes out of the upper surface of the pixel limiting layer.

The pixel unit comprises a bottom electrode on the upper surface of the flat layer, an organic light-emitting layer in the pixel defining hole and a top electrode covering the organic light-emitting layer in sequence.

Wherein the first and second capacitive electrodes are perpendicular to an upper surface of the pixel defining layer and are completely embedded in the pixel defining layer.

And forming a first outgoing line and a second outgoing line which are respectively connected with the first capacitor electrode and the second capacitor electrode while preparing the bottom electrode on the flat layer.

The first capacitor electrode and the second capacitor electrode are perpendicular to the upper surface of the pixel defining layer and extend into the flat layer through the pixel defining layer, and the retaining wall structure at least extends to the pixel defining layer.

And forming a first outgoing line and a second outgoing line which are respectively connected with the first capacitor electrode and the second capacitor electrode at the same time of forming the source-drain electrode layer of the thin film transistor.

The retaining wall structure is provided with a notch, and the interconnection layer of the top electrode passes through the notch.

Wherein, the retaining wall structure is made of inorganic oxide, polymer material or other rigid materials.

The invention further provides a touch display panel according to the manufacturing method.

According to the invention, the vertical capacitor surrounding the pixel unit is formed in the pixel limiting layer or the pixel limiting layer and the flat layer, so that the capacitance value can be increased, and meanwhile, water vapor in the pixel limiting layer and the flat layer is prevented from entering the pixel unit and each metal interconnection layer; touch pressure is transmitted through the retaining wall structure, so that capacitance is changed, touch operation is realized, and the retaining wall structure can also prevent the color cross problem of the organic light emitting layer during ink jet printing formation.

Drawings

Fig. 1 is a sectional view of a touch display panel of the first embodiment;

FIG. 2 is a top view of the touch display panel of the first embodiment;

fig. 3 to 8 are schematic views of a manufacturing method of the touch display panel of the first embodiment;

fig. 9 is a sectional view of a touch display panel of the second embodiment;

fig. 10 is a top view of the touch display panel of the second embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.

Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.

A touch display panel and a method of manufacturing the same according to the disclosed embodiments of the invention will be described in detail below with reference to the accompanying drawings.

Referring to fig. 1 and 2, a touch display panel according to a first embodiment of the present application includes: a substrate 10; a Thin Film Transistor (TFT) layer on the substrate 10; a planarization layer 16 on the thin-film-transistor layer; a pixel defining layer 21 on the planarization layer 16; the pixel defines the pixel cells and the capacitive structure in the layer 21. It will be appreciated that some references to "on" in this embodiment are to be understood as being on "the side remote from the substrate 10".

Wherein the substrate 10 may be flexible and thus stretchable, foldable, bendable or rollable, such that the touch display panel may be stretchable, foldable, bendable or rollable. The substrate 10 may be formed of any suitable insulating material having flexibility. For example, the resin composition may be formed of a polymer material such as Polyimide (PI), Polycarbonate (PC), Polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), Polyarylate (PAR), or glass Fiber Reinforced Plastic (FRP). The substrate 10 may also be rigid, such as a glass, plastic or silicon substrate. The substrate 10 serves to block oxygen and moisture, prevent moisture or impurities from diffusing through the flexible base, and provide a flat surface on an upper surface of the flexible base.

The Thin Film Transistor layer may include a plurality of Thin Film Transistors (TFTs) and a pixel circuit formed by the TFTs, and the pixel circuit is configured to control a light emitting structure in a pixel unit, where the light emitting structure is an organic light emitting diode. The thin film transistor layer includes a plurality of insulating layers, specifically, a gate insulating layer 12 and an interlayer insulating layer 14, which are sequentially disposed on the substrate 10. An active layer 11 on the substrate 10, a gate line 13 on the gate insulating layer 11, and a source-drain electrode layer 15 on the interlayer insulating layer 14 are also provided in the multilayer insulating layer; the source/drain electrode layer 15 extends from a source/drain region of the thin film transistor to between the multilayer insulating layer and the planarization layer 16.

The active layer 11 may be an amorphous silicon material, a polysilicon material, a metal oxide material, or the like. When the active layer 5 is made of a polysilicon material, a low-temperature amorphous silicon technology may be used, that is, the amorphous silicon material is melted by the laser to form a polysilicon material. In addition, various methods such as a Rapid Thermal Annealing (RTA) method, a Solid Phase Crystallization (SPC) method, an Excimer Laser Annealing (ELA) method, a Metal Induced Crystallization (MIC) method, a Metal Induced Lateral Crystallization (MILC) method, or a Sequential Lateral Solidification (SLS) method may also be used. The active layer 11 further includes source and drain regions formed by doping N-type impurity ions or P-type impurity ions, and a channel region between the source and drain regions.

The gate insulating layer 12 on the active layer 11 includes an inorganic layer such as silicon oxide, silicon nitride, and may include a single layer or a plurality of layers.

The gate line 13 on the gate insulating layer 12 may include a single layer or a plurality of layers of gold (Au), silver (Ag), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pd), aluminum (Al), Molybdenum (MO), or chromium (Cr), or a material such as aluminum (Al): neodymium (Nd) alloy and Molybdenum (MO) alloy, tungsten (W) alloy.

The interlayer insulating layer 14 positioned on the gate line 13 may be formed of an inorganic layer insulation of silicon oxide, silicon nitride, or the like. Of course, in other alternative embodiments of the present invention, the interlayer insulating layer may be formed of an organic insulating material.

The source-drain electrode layer 15 located on the interlayer insulating layer 14 is electrically connected (or bonded) to the source and drain regions through contact holes formed by selectively removing the gate insulating layer 12 and the interlayer insulating layer 14.

The touch display panel may also include a planarization layer 16. Optionally, the planarization layer 16 includes an organic material such as acrylic, Polyimide (PI), or benzocyclobutene (BCB), and has a planarization effect.

Above the planarization layer 16 is a pixel defining layer 21, and the pixel defining layer 21 may be formed of an organic material such as Polyimide (PI), polyamide, benzocyclobutene (BCB), acryl resin, or phenol resin, or an inorganic material such as SiNx. A plurality of pixel defining holes are formed in the pixel defining layer 21, and a plurality of pixel units are formed in the pixel defining holes, wherein the pixel units include a bottom electrode 18 on the upper surface of the planarization layer 16, an organic light emitting layer 29 in the pixel defining holes, and a top electrode 30 covering the organic light emitting layer 29 in this order.

There are also a plurality of capacitive structures in the pixel defining layer 21, which surround the plurality of pixel cells, respectively, and include first and second capacitive electrodes 26 and 27 that are annularly opposed. The first and second capacitor electrodes 26 and 27 are perpendicular to the upper surface of the pixel defining layer 21, and are made of a metal material having light reflection and moisture resistance, such as aluminum, silver, etc., which is electrically extracted through the first and second extraction lines 19 and 20 on the flat layer.

The capacitor structure surrounds the pixel unit, so that water vapor in the pixel defining layer 21 and the flat layer 16 can be prevented from entering the pixel unit, and two vertical electrodes of the capacitor structure play a role in isolation.

In order to make the capacitor structure respond to the touch operation, a retaining wall structure 28 protruding from the upper surface of the pixel defining layer 21 is further provided in the pixel defining layer 21, and the retaining wall structure 28 is in an inverted trapezoid shape. The retaining wall structure 28 extends through the pixel defining layer 21 and is disposed between the first capacitor electrode 26 and the second capacitor electrode 27. When the touch pressing is carried out, the pressure changes the insertion depth of the retaining wall structure 28, so that the capacitance value of the capacitor structure is changed, and the response of the touch operation is realized.

The retaining wall structure 28 should have greater rigidity than the pixel defining layer 21, and the material thereof is preferably an inorganic oxide such as silicon oxide, silicon nitride, or aluminum oxide, and may of course be a polymer material such as a tempered glass material, a tempered resin material, and the like. The dam structure 28 protrudes from the upper surface of the pixel defining layer 21 to protect the pixel unit and to prevent a color cross-talk caused by a deviation of printing when the organic light emitting layer 29 is screen printed.

At least one wiring layer 13 is provided on the bottom surface 12 of the groove 10, the wiring layer 13 is arranged along the extending direction of the groove 10, the groove 10 is a grid-like structure arranged in the display area, and the wiring layer 13 is in direct contact with the first laser activated polymer layer 3. The circuit layer 13 is a circuit layer connected to the source/drain line 9, and is a routing structure.

Referring to fig. 2, the retaining wall structure 28 has a notch through which the interconnection layer 31 of the top electrode 30 is led out. At the gap, the capacitor structure is also in a discontinuous off-state, which facilitates the extraction of the interconnect layer 31.

According to the touch display panel, the invention also provides a manufacturing method of the touch display panel, which comprises the following steps:

(1) forming a thin film transistor on a substrate;

(2) forming a flat layer covering the thin film transistor;

(3) forming a pixel defining layer on the planarization layer;

(4) forming a plurality of ring-shaped capacitive structures in the pixel defining layer, the ring-shaped capacitive structures comprising first and second annularly opposing capacitive electrodes;

(5) forming a retaining wall structure between the first capacitor electrode and the second capacitor electrode, wherein a part of the retaining wall structure is embedded in the pixel defining layer;

(6) forming a plurality of pixel defining holes in the pixel defining layer, and forming a plurality of pixel units in the plurality of pixel defining holes, wherein the plurality of ring-shaped capacitor structures surround the plurality of pixel units, respectively.

And the other part of the retaining wall structure protrudes out of the upper surface of the pixel limiting layer.

The pixel unit comprises a bottom electrode on the upper surface of the flat layer, an organic light-emitting layer in the pixel defining hole and a top electrode covering the organic light-emitting layer in sequence.

Wherein the first and second capacitive electrodes are perpendicular to an upper surface of the pixel defining layer and are completely embedded in the pixel defining layer.

And forming a first outgoing line and a second outgoing line which are respectively connected with the first capacitor electrode and the second capacitor electrode while preparing the bottom electrode on the flat layer.

The first capacitor electrode and the second capacitor electrode are perpendicular to the upper surface of the pixel defining layer and extend into the flat layer through the pixel defining layer, and the retaining wall structure at least extends to the pixel defining layer.

And forming a first outgoing line and a second outgoing line which are respectively connected with the first capacitor electrode and the second capacitor electrode at the same time of forming the source-drain electrode layer of the thin film transistor.

The retaining wall structure is provided with a notch, and the interconnection layer of the top electrode passes through the notch.

Wherein, the retaining wall structure is made of inorganic oxide, polymer material or other rigid materials.

Referring to fig. 3-8, the specific steps are as follows:

first, referring to fig. 3, a thin film transistor and related thin film transistor layers are formed on a substrate 10, specifically, an active layer 11 is formed on the substrate 10, and then a gate insulating layer 12 is covered, and a gate line 13 is formed on the gate insulating layer 12. An interlayer insulating layer 14 is covered on the gate line 13, and a groove is filled with a conductive material to form a source drain electrode layer 15.

Next, referring to fig. 4, a planarization layer 16 is formed on the source/drain electrode layer 15, the planarization layer 16 covers the thin film transistor, and patterning is performed to form a through hole 17, and the through hole 17 exposes the source/drain electrode layer 15.

Referring to fig. 5, a conductive layer is deposited on the planarization layer 16 and then patterned to simultaneously form the bottom electrode 18, the first lead layer 19, and the second lead layer 20.

Referring to fig. 6, a pixel defining layer 21 is deposited on the planarization layer 16 and patterned to form a pixel defining hole 25, a first capacitive electrode groove 22, a second capacitive electrode groove 23, and a blind hole 24 between the first and second capacitive electrode grooves. The blind hole 24, the first capacitor electrode groove 22 and the second capacitor electrode groove 23 surround the pixel defining layer 21, and the cross-sectional pattern of the blind hole 24 is an inverted trapezoidal structure.

Next, referring to fig. 7, the first and second capacitor electrode grooves 22 and 23 are filled with a metal material to form a first capacitor electrode 26 and a second capacitor electrode 27. Then, a bank structure 28 may be formed in the blind via 24 by a photoresist layer (not shown), and the bank structure 28 protrudes from the pixel defining layer 21.

Finally, referring to fig. 8, the organic light emitting layer 29 is screen-printed with the bank structures 28 as isolation structures and cured, and then the top electrode 30 is formed on the organic light emitting layer 29. The top electrode 30 may be a transparent conductive layer (TCO) such as ITO, FTO, AZO, and the like.

The present invention provides a second preferred embodiment based on the first embodiment, and referring to fig. 9-10, the structure is substantially the same as the first embodiment, except that the first and second lead-out lines and the source/drain electrode layers are formed simultaneously, and the first and second capacitor electrodes 32 and 33 extend into the planarization layer through the pixel defining layer, and the retaining wall structure 34 extends into the planarization layer. In this embodiment, the dam structure 34 is deeper, and the relative area of the first capacitor electrode 32 and the second capacitor electrode 33 is larger, so as to ensure a larger capacitance.

The manufacturing method of the second embodiment is also substantially the same as that of the first embodiment except that the source-drain electrode layer of the thin film transistor is formed and the first lead line and the second lead line for connecting the first capacitor electrode and the second capacitor electrode, respectively, are formed. And forming a first capacitor electrode groove and a second capacitor electrode groove through the pixel defining layer and the planarization layer until the first lead line and the second lead line are exposed. The blind holes also extend to the flat layer, and the transverse position of the blind holes is unchanged, which is not described in detail herein.

According to the invention, the vertical capacitor surrounding the pixel unit is formed in the pixel limiting layer or the pixel limiting layer and the flat layer, so that the capacitance value can be increased, and meanwhile, water vapor in the pixel limiting layer and the flat layer is prevented from entering the pixel unit and each metal interconnection layer; touch pressure is transmitted through the retaining wall structure, so that capacitance is changed, touch operation is realized, and the retaining wall structure can also prevent the color cross problem of the organic light emitting layer during ink jet printing formation.

The expressions "exemplary embodiment," "example," and the like, as used herein, do not refer to the same embodiment, but are provided to emphasize different particular features. However, the above examples and exemplary embodiments do not preclude their implementation in combination with features of other examples. For example, even in a case where a description of a specific example is not provided in another example, unless otherwise stated or contrary to the description in the other example, the description may be understood as an explanation relating to the other example.

The terminology used in the present invention is for the purpose of illustrating examples only and is not intended to be limiting of the invention. Unless the context clearly dictates otherwise, singular expressions include plural expressions.

While example embodiments have been shown and described, it will be apparent to those skilled in the art that modifications and changes may be made without departing from the scope of the invention as defined by the claims.