阅读说明：本技术 存储器修补线路确定方法及装置、存储介质及电子设备 (Memory repair line determination method and device, storage medium and electronic device ) 是由 杨波 骆晓东 于 2021-07-21 设计创作，主要内容包括：本公开是关于一种存储器修补线路确定方法及装置、计算机可读存储介质及电子设备,该存储器修补线路确定方法包括：在正常区域的各线路中均写入第一预设数据组,在冗余区域的各线路中写入第二预设数据组,冗余区域的各线路中写入的第二预设数据组不同,第二预设数据组与第一预设数据组不同；使用冗余区域中的线路对正常区域中的线路进行修补；读取修补后的正常区域中各线路的数据；根据正常区域中各线路的数据、修补后的正常区域中各线路的数据或冗余区域中各线路的数据,确定正常区域中的被修补线路以及冗余区域中的去修补线路。本公开可以用于验证修补规则的准确性。(The present disclosure relates to a method and an apparatus for determining a memory repair line, a computer-readable storage medium, and an electronic device, wherein the method for determining the memory repair line includes: writing a first preset data group into each line of the normal area, writing a second preset data group into each line of the redundant area, wherein the second preset data groups written into each line of the redundant area are different, and the second preset data groups are different from the first preset data groups; repairing the line in the normal area by using the line in the redundant area; reading the data of each line in the repaired normal area; and determining the repaired line in the normal area and the repaired line in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area or the repaired data of each line in the redundant area. The present disclosure may be used to verify the accuracy of patching rules.)

1. A memory repair line determination method, the method comprising:

writing a first preset data group into each line of a normal area, and writing a second preset data group into each line of a redundant area, wherein the second preset data groups written into each line of the redundant area are different, and the second preset data groups are different from the first preset data groups;

repairing the lines in the normal area using the lines in the redundant area;

reading the data of each line in the repaired normal area;

and determining a repaired line in the normal area and a repaired line in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area or the repaired data of each line in the redundant area.

2. The memory repair line determination method according to claim 1, wherein the first preset data group is data of all 0 s or all 1 s.

3. The memory repair line determination method according to claim 1, wherein the first preset data group written in each line of the normal area is at least partially different.

4. The memory repair line determination method of claim 1, wherein repairing the line in the normal region using the line in the redundant region comprises:

and starting the repair function of the normal area.

5. The memory repair line determination method of claim 4, further comprising:

and before writing a first preset data group in each line of the normal area, closing the repair function of the normal area.

6. The memory repair line determination method of claim 1, wherein the line is a column line or a row line.

7. The method as claimed in claim 6, wherein when the line is a column line, the first predetermined data group is a first predetermined data column, and the second predetermined data group is a second predetermined data column.

8. The method as claimed in claim 6, wherein when the line is a column line, the first predetermined data group is a first predetermined data column, and the second predetermined data group is a second predetermined data column.

9. The method as claimed in claim 1, wherein determining the repaired line in the normal area and the deburred line in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area, or the repaired data of each line in the redundant area comprises:

determining a repaired line in the normal area according to the data of each line in the normal area and the repaired data of each line in the normal area;

and determining the line to be repaired in the redundant area according to the repaired data of each line in the normal area and the repaired data of each line in the redundant area.

10. The memory repair line determination method of claim 9, wherein determining the repaired line in the normal area according to the data of each line in the normal area and the repaired data of each line in the normal area comprises:

and determining the line in the repaired normal area, which is different from the line in the normal area in data, as the repaired line.

11. The method of claim 9, wherein determining the de-repaired line in the redundant area according to the repaired data of each line in the normal area and the repaired data of each line in the redundant area comprises:

and determining the line with the same data in the redundant area and the repaired normal area as the repairing-removing line.

12. The memory repair line determination method of any one of claims 1 to 11, further comprising:

and verifying the accuracy of a preset repairing rule according to the repairing-removing circuit and the repaired circuit.

13. A memory repair line determination apparatus, the apparatus comprising:

the data writing module is used for writing a first preset data group into each line of a normal area and writing a second preset data group into each line of a redundant area, wherein the second preset data groups written into each line of the redundant area are different, and the second preset data groups are different from the first preset data groups;

the line repairing module is used for repairing the line in the normal area by using the line in the redundant area;

the data reading module is used for reading the data of each line in the repaired normal area;

and the line determining module is used for determining a repaired line in the normal area and a line to be repaired in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area or the repaired data of each line in the redundant area.

14. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the memory repair line determination method according to any one of claims 1 to 12.

15. An electronic device, comprising:

a processor;

a memory storing one or more programs which, when executed by the processor, cause the processor to implement the memory repair line determination method of any of claims 1-12.

Technical Field

The present disclosure relates to the field of integrated circuit technologies, and in particular, to a method and an apparatus for determining a memory repair line, a computer-readable storage medium, and an electronic device.

Background

With the continuous reduction of the manufacturing volume and the continuous increase of the storage capacity of the memory, the failure problem of the memory chip generated in the development, production and use processes is inevitable, and the redundant area can be generally adopted to repair the failure position in the memory chip.

In the prior art, repair lines in a redundant area are generally allocated according to a specific repair rule to repair a failure position.

Verifying the accuracy of the execution of the patching rule is a prerequisite for the successful patching of the failed location in the chip.

It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

An object of the present disclosure is to provide a memory repair line determining method and device, a computer-readable storage medium, and an electronic apparatus for verifying accuracy of a repair rule.

Additional features and advantages of the disclosure will be set forth in the detailed description which follows, or in part will be obvious from the description, or may be learned by practice of the invention.

According to a first aspect of the present disclosure, there is provided a memory repair line determination method, the method including:

writing a first preset data group into each line of a normal area, and writing a second preset data group into each line of a redundant area, wherein the second preset data groups written into each line of the redundant area are different, and the second preset data groups are different from the first preset data groups;

repairing the lines in the normal area using the lines in the redundant area;

reading the data of each line in the repaired normal area;

and determining a repaired line in the normal area and a repaired line in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area or the repaired data of each line in the redundant area.

In an alternative embodiment, the first preset data group is data of all 0 s or all 1 s.

In an alternative embodiment, the first preset data group written in each line of the normal area is at least partially different.

In an alternative embodiment, repairing the line in the normal region using the line in the redundant region includes:

and starting the repair function of the normal area.

In an optional embodiment, the method further comprises:

and before writing a first preset data group in each line of the normal area, closing the repair function of the normal area.

In an alternative embodiment, the lines are column lines or row lines.

In an optional implementation manner, when the line is a column line, the first preset data group is a first preset data column, and the second preset data group is a second preset data column.

In an optional implementation manner, when the line is a line, the first preset data group is a first preset data line, and the second preset data group is a second preset data line.

In an optional implementation manner, determining the repaired line in the normal area and the de-repaired line in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area, or the repaired data of each line in the redundant area includes:

determining a repaired line in the normal area according to the data of each line in the normal area and the repaired data of each line in the normal area;

and determining the line to be repaired in the redundant area according to the repaired data of each line in the normal area and the repaired data of each line in the redundant area.

In an optional implementation manner, determining the repaired line in the normal area according to the data of each line in the normal area and the repaired data of each line in the normal area includes:

and determining the line in the repaired normal area, which is different from the line in the normal area in data, as the repaired line.

In an optional implementation manner, determining the line to be repaired in the redundant area according to the repaired data of each line in the normal area and the repaired data of each line in the redundant area includes:

and determining the line with the same data in the redundant area and the repaired normal area as the repairing-removing line.

In an optional embodiment, the method further comprises:

and verifying the accuracy of a preset repairing rule according to the repairing-removing circuit and the repaired circuit.

According to a second aspect of the present disclosure, there is provided a memory repair line determination apparatus, the apparatus comprising:

the data writing module is used for writing a first preset data group into each line of a normal area and writing a second preset data group into each line of a redundant area, wherein the second preset data groups written into each line of the redundant area are different, and the second preset data groups are different from the first preset data groups;

the line repairing module is used for repairing the line in the normal area by using the line in the redundant area;

the data reading module is used for reading the data of each line in the repaired normal area;

and the line determining module is used for determining a repaired line in the normal area and a line to be repaired in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area or the repaired data of each line in the redundant area.

According to a third aspect of the present disclosure, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the memory repair line determination method described above.

According to a fourth aspect of the present disclosure, there is provided an electronic device comprising:

a processor;

a memory for storing one or more programs that, when executed by the processor, cause the processor to implement the memory repair line determination method described above.

The technical scheme provided by the disclosure can comprise the following beneficial effects:

in the memory repair line determining method and apparatus in the exemplary embodiment of the disclosure, on one hand, the first preset data group is written in each line in the normal region, and then the different second preset data group is written in each line in the redundant region, so as to mark each line in the redundant region, respectively, so that when the line in the normal region is repaired by using the line in the redundant region, it can be determined that the line is a repaired line in the normal region according to the read data of each line in the repaired normal region. On the other hand, by comparing the read data of each line in the normal area after repair with the data of each line in the redundant area, it is possible to determine that it is a line to be repaired in the redundant area for repair. In another aspect, it can be determined whether the actual repairing manner is the same as the repairing manner specified in the preset repairing rule according to the repaired line and the repairing-removed line, so as to achieve the purpose of verifying the accuracy of the preset repairing rule.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty. In the drawings:

fig. 1 schematically illustrates a structural schematic of a chip according to an exemplary embodiment of the present disclosure;

fig. 2 schematically illustrates a flow diagram of a memory repair line determination method according to an exemplary embodiment of the present disclosure;

figure 3 schematically illustrates a flow chart of steps for memory repair line determination according to an exemplary embodiment of the present disclosure;

fig. 4 schematically illustrates a block diagram of a memory repair line determination apparatus according to an exemplary embodiment of the present disclosure;

fig. 5 schematically shows a block schematic of an electronic device in an exemplary embodiment according to the present disclosure.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus, a repetitive description thereof will be omitted.

Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and so forth. In other instances, well-known structures, methods, devices, implementations, materials, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure.

The block diagrams shown in the figures are functional entities only and do not necessarily correspond to physically separate entities. That is, these functional entities may be implemented in the form of software, or in one or more software-hardened modules, or in different networks and/or processor devices and/or microcontroller devices.

In a chip, a plurality of cells are usually included. For example, a typical dram chip has up to 6 thousand 4 million cells that may be arranged in rows and columns in a main array for addressing by word lines and bit lines.

During the manufacturing process of a typical dram chip, it may happen that one million or even millions of cells in the main array are defective, so-called failure sites. In order to improve the yield of the chip, redundant areas are usually made on the chip, and these redundant areas can replace the word lines or bit lines where the defective failure positions are located, so as to bypass these defective failure positions and make the memory normally usable.

Generally, after the chip generates the failure position in the process of development, production and use, the designated line in the redundant area can be allocated to repair the failure position according to the preset repair rule. The line here may be a word line or a bit line.

However, in the actual repair process, whether the interior of the chip is actually repaired according to the repair rule or not needs to be verified, and if the interior of the chip is not repaired according to the repair rule, the repair process may fail, the repair of the failed position may not reach the expected target, and even the chip may be scrapped.

In view of this, the present exemplary embodiment provides a memory repair line determination method and apparatus.

Referring to fig. 1, which shows a schematic structural diagram of a chip according to an exemplary embodiment of the present disclosure, a chip 100 generally includes a normal area 110 and a redundant area 120, the normal area 110 includes a large number of cells, and the normal area 110 includes two orthogonal lines: word Line 111(Word Line, WL) and Bit Line 112(Bit Line, BL), where Word Line 111 is a column Line and Bit Line 112 is a row Line. Meanwhile, besides the normal region 110, a redundant region 120 including redundant cells is disposed on the chip 100, and the redundant region 120 includes two orthogonal straight lines: a Redundancy Word Line 121 (RWL) and a Redundancy Bit Line 122 (RBL), wherein the Redundancy Word Line 121 is a column Line for repairing a failure location on the Word Line 111; the redundant bit lines 122 are column lines used to repair failed locations on the bit lines 112. Here, the arrangement positions and the number of the redundant word lines 121 and the redundant bit lines 122 in fig. 1 are merely an example, and are not intended to limit the present solution.

In a specific repair process, the designated redundant bit line 122 may be used to repair the designated bit line 112 or the designated redundant word line 121 may be used to repair the designated word line 111 according to a predetermined repair rule.

Figure 2 schematically illustrates a flow diagram of a memory repair line determination method according to some embodiments of the present disclosure. Referring to fig. 2, the memory repair line determining method may include the steps of:

step S210, writing a first preset data group in each line of the normal area, writing a second preset data group in each line of the redundant area, wherein the second preset data groups written in each line of the redundant area are different, and the second preset data groups are different from the first preset data groups;

step S220, repairing the line in the normal area by using the line in the redundant area;

step S230, reading the data of each line in the repaired normal area;

step S240, determining the repaired line in the normal area and the repaired line in the redundant area according to the data of each line in the normal area, the data of each line in the repaired normal area, or the data of each line in the redundant area.

According to the method for determining the memory repair line in the exemplary embodiment, on one hand, the lines in the redundant area are respectively marked by writing the first preset data group in each line in the normal area and then writing the different second preset data group in each line in the redundant area, so that when the lines in the normal area are repaired by using the lines in the redundant area, the repaired lines in the normal area can be judged to be repaired lines in the normal area according to the read data of each line in the repaired normal area. On the other hand, by comparing the read data of each line in the normal area after repair with the data of each line in the redundant area, it is possible to determine that it is a line to be repaired in the redundant area for repair. In another aspect, it can be determined whether the actual repairing manner is the same as the repairing manner specified in the preset repairing rule according to the repaired line and the repairing-removed line, so as to achieve the purpose of verifying the accuracy of the preset repairing rule.

Next, a memory repair line determination method in the present exemplary embodiment will be further described.

In step S210, a first preset data group is written in each line of the normal area, a second preset data group is written in each line of the redundant area, the second preset data group written in each line of the redundant area is different, and the second preset data group is different from the first preset data group.

In some exemplary embodiments of the present disclosure, as shown in fig. 1, the failure location 113 is a location in the normal region 110, and the failure location 113 is on the word line 111 or the bit line 112, so the failure location 113 may be repaired by replacing the word line 111 with the redundant word line 121, or the failure location 113 may be repaired by replacing the bit line 112 with the redundant bit line 122. By the memory repair line determination method provided by the exemplary embodiment of the disclosure, a specific repair position and a repaired position can be determined in the repair process.

In the exemplary embodiments of the present disclosure, each line in the normal region and the redundant region may be a column line, i.e., a word line, or a row line, i.e., a bit line. When the lines are row lines, the first preset data group is a first preset data row, and the second preset data group is a second preset data row. When the lines are row lines, the first preset data group is a first preset data row, and the second preset data group is a second preset data row.

In the following, the word line repair is taken as an example, that is, the column lines are taken as an example to illustrate a case where a first preset data group is written in each line of the normal area, where the first preset data groups written in each line may be the same or different, and a second preset data group is written in each line of the redundant area:

if the data written by each line in the normal area before repair is shown in table 1.

TABLE 1

Wherein, the column circuit comprises five word lines of WL0-WL4 in total, and the row circuit comprises eight bit lines of BL0-BL7 in total. The first preset data group written in each column line is data of all 0 s.

In some exemplary embodiments of the present disclosure, the first preset data group may also be all 1 data, or the first preset data group written in each line of the normal region is at least partially different, for example, a data group of all 0 is written in a column line corresponding to WL0, a data group of all 1 is written in a column line corresponding to WL1, a data group of all 1 is written in a column line corresponding to WL2, a data group of all 0 is written in a column line corresponding to WL3, a data group of all 1 is written in a column line corresponding to WL4, and the like, as long as it is convenient to determine the repaired line after repairing, and the present exemplary embodiments are not particularly limited to the specific first preset data group.

Table 2 shows data written in each line in the redundant area for repairing the line in the normal area, corresponding to the data written in each line in the normal area before repair shown in table 1.

TABLE 2

The column lines RWL0-RWL4 in the redundant region are used for repairing one or more of the column lines WL0-WL4 in the normal region, and specific repairing lines and repaired lines are determined in the subsequent steps.

As can be seen from table 2, the second preset data groups written in the lines in each column in the redundant area are different, so as to achieve the purpose of marking the lines in each column, and facilitate the subsequent determination of the repair-removing line.

In addition, as can be seen from table 1 and table 2, the second preset data group is different from the first preset data group, so that after the line in the normal area is repaired by using the line in the redundant area, the repaired line in the normal area can be easily determined.

It should be noted that, the same first preset data group is written in each line in the normal area, and when the repaired line is determined, only the line where different data is located needs to be found in the whole normal area, so that the time consumption for determining the repaired line in the normal area can be reduced, and the speed for determining the repaired line can be increased. For example, if all 0 data are written in each line in the normal area, after the repair, only data 1 in the normal area needs to be found, and a line with 1 is the repaired line to be determined. If all 1 data are written in each line in the normal area, after repairing, only data 0 in the normal area needs to be searched, and the line with 0 is the repaired line to be determined.

In some exemplary embodiments of the present disclosure, the writing of the first preset data group in each line of the normal area may include: and writing corresponding first preset data groups in the normal area line by line. For example, a first preset data group corresponding to the column line WL0 is written first; then, writing a first preset data group corresponding to the column line WL 1; then, writing a first preset data group corresponding to the column line WL 2; then writing a first preset data group corresponding to the column line WL 3; finally, the first preset data group corresponding to the column line WL4 is written. The first preset data group written in each line in the normal area may be the same or different.

Similarly, writing the second predetermined data group in each line of the redundant area may include: and writing corresponding second preset data groups into the redundant area one by one, wherein the second preset data groups written into each line in the redundant area are different.

In step S220, the line in the normal region is repaired using the line in the redundant region.

The memory repair line determination method provided by the exemplary embodiment of the disclosure can be used in a test phase of a normal area. In the testing stage, the repair function of the normal area may be turned off before the first preset data group is written in each line of the normal area. In the testing stage, the normal region repairing belongs to temporary repairing, and the state before repairing is recovered after repairing, so that experimental data support can be provided for determining a normal region repairing scheme.

After the writing operations of the first and second predetermined data groups are performed according to step S210, the repair function of the normal region may be started to repair the line in the normal region by using the line in the redundant region.

In step S230, the data of each line in the repaired normal area is read.

Data written in each line in the normal area shown in table 1 and data written in each line in the redundant area shown in table 2 are taken as examples. After repairing the line in the normal area in table 1 using the line in the redundant area in table 2, the data of each line in the repaired normal area is shown in table 3:

TABLE 3

As can be seen from table 3, in the repaired normal region, the data in the column line WL2 has changed, that is, the column line WL2 is the repaired line in the normal region.

It should be noted that, in the process of reading the data of each line in the repaired normal area, a way of reading line by line may be adopted, and a way of reading in batches according to an array may also be adopted, and this is not particularly limited in the exemplary embodiment of the present disclosure.

In step S240, the repaired line in the normal area and the repaired line in the redundant area are determined according to the data of each line in the normal area, the data of each line in the repaired normal area, or the data of each line in the redundant area.

In the exemplary embodiment of the disclosure, in the process of determining the repaired line and the line to be repaired, only data comparison is needed, so that convenience in determining the repaired line is improved.

The repaired line in the normal area can be determined according to the data of each line in the normal area and the data of each line in the repaired normal area. Specifically, a line in the repaired normal region, which is different from the line in the normal region in data, may be determined as the repaired line. For example, as can be seen from comparing table 1 and table 3, the data in the column line WL2 in table 3 is different from the data in the column line WL2 in table 1, and has changed, and therefore, it can be determined that the column line WL2 in the normal region is the repaired line.

In an exemplary embodiment of the present disclosure, the line to be repaired in the redundant area may be further determined according to the data of each line in the repaired normal area and the data of each line in the redundant area. Specifically, the line having the same data in the redundant area as the repaired normal area may be determined as the line to be repaired. For example, as can be seen by comparing table 2 and table 3, the data in the column line WL2 in table 3 is the same as the data in the column line WL4 in table 2, and therefore, the column line WL4 in the redundant region can be determined to be a depaufacture line.

In the exemplary embodiment of the disclosure, after the repaired line and the repaired line are determined, the accuracy of the preset repairing rule can be verified according to the determined repaired line and the repaired line. For example, assuming that the preset repair rule is set to use the column line WL4 in the redundant region to repair the column line WL2 in the normal region, it can be determined from the above result that the preset repair rule is accurate.

However, assuming that it is set in the preset repair rule to use the column line WL3 in the redundant region to repair the column line WL2 in the normal region, it can be determined from the above result that the preset repair rule is inaccurate. In addition, if the data in the determined repaired line is different from the data in the redundant area, it also indicates that the preset repairing rule is inaccurate. In the case that it is determined that the preset patching rule is inaccurate, the preset patching rule needs to be adjusted and modified to re-determine a new patching rule, and the like.

In some exemplary embodiments of the present disclosure, the preset patching rule is only an example, and in practical cases, there may be a plurality of different rules. However, whatever the preset repair rule is, the memory repair line determination method provided by the exemplary embodiment of the present disclosure may be used for verification. The exemplary embodiments of the present disclosure are not particularly limited to the preset patching rule.

Referring to fig. 3, a flowchart illustrating steps of memory repair line determination according to an exemplary embodiment of the present disclosure is shown. In fig. 3, in the process of determining the memory repair line, step S301 is performed to turn off the repair function of the normal region; then, step S302 is performed to write a first preset data group in each line of the normal area; step S303, writing a second preset data group in each line of the redundant area; step S304, starting the repair function of the normal area; step S305, reading the data of each line in the repaired normal area; step S306, determining repaired lines in the normal area according to the data of each line in the normal area and the data of each line in the repaired normal area; step S307, determining a line to be repaired in the redundant area according to the data of each line in the repaired normal area and the data of each line in the redundant area; and step S308, verifying the accuracy of the preset repairing rule according to the repairing-removing line and the repaired line.

It is noted that although the steps of the methods of the present invention are depicted in the drawings in a particular order, this does not require or imply that the steps must be performed in this particular order, or that all of the depicted steps must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions, etc.

Further, in the present exemplary embodiment, a memory repair line determination apparatus is also provided. Referring to fig. 4, the memory repair line determining apparatus 400 may include: a data writing module 410, a line patching module 420, a data reading module 430, and a line determining module 440, wherein:

the data writing module 410 may be configured to write a first preset data group in each line of the normal area, and write a second preset data group in each line of the redundant area, where the second preset data group written in each line of the redundant area is different, and the second preset data group is different from the first preset data group;

a line repairing module 420, which can be used to repair the line in the normal area by using the line in the redundant area;

the data reading module 430 may be configured to read data of each line in the repaired normal area;

the line determining module 440 may be configured to determine the repaired line in the normal area and the repaired line in the redundant area according to the data of each line in the normal area, the data of each line in the repaired normal area, or the data of each line in the redundant area.

The details of the virtual module of each memory repair line determining apparatus 400 are already described in detail in the corresponding memory repair line determining method, and therefore are not described herein again.

It should be noted that although in the above detailed description several modules or units of the memory repair line determination apparatus are mentioned, this division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit, according to embodiments of the present disclosure. Conversely, the features and functions of one module or unit described above may be further divided into embodiments by a plurality of modules or units.

Furthermore, the above-described figures are merely schematic illustrations of processes involved in methods according to exemplary embodiments of the invention, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.

In an exemplary embodiment of the present disclosure, an electronic device capable of implementing the above method is also provided.

As will be appreciated by one skilled in the art, aspects of the present invention may be embodied as a system, method or program product. Thus, various aspects of the invention may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.

An electronic device 500 according to this embodiment of the invention is described below with reference to fig. 5. The electronic device 500 shown in fig. 5 is only an example and should not bring any limitation to the functions and the scope of use of the embodiments of the present invention.

As shown in fig. 5, the electronic device 500 is embodied in the form of a general purpose computing device. The components of the electronic device 500 may include, but are not limited to: the at least one processing unit 510, the at least one memory unit 520, a bus 530 connecting various system components (including the memory unit 520 and the processing unit 510), and a display unit 540.

Wherein the storage unit 520 stores program code that can be executed by the processing unit 510 to cause the processing unit 510 to perform the steps according to various exemplary embodiments of the present invention described in the above section "exemplary method" of the present specification. For example, the processing unit 510 may execute step S210 shown in fig. 2, writing a first preset data group in each line of the normal area, writing a different second preset data group in each line of the redundant area, the second preset data group being different from the first preset data group; step S220, repairing the line in the normal area by using the line in the redundant area; step S230, reading the data of each line in the repaired normal area; step S240, determining the repaired line in the normal area and the repaired line in the redundant area according to the data of each line in the normal area, the repaired data of each line in the normal area, and the repaired data of each line in the redundant area.

The memory unit 520 may include a readable medium in the form of a volatile memory unit, such as a random access memory unit (RAM)5201 and/or a cache memory unit 5202, and may further include a read only memory unit (ROM) 5203.

Storage unit 520 may also include a program/utility 5204 having a set (at least one) of program modules 5205, such program modules 5205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.

Bus 530 may be one or more of any of several types of bus structures including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

The electronic device 500 may also communicate with one or more external devices 570 (e.g., keyboard, pointing device, Bluetooth device, etc.), with one or more devices that enable a user to interact with the electronic device 500, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 500 to communicate with one or more other computing devices. Such communication may occur via input/output (I/O) interfaces 550. Also, the electronic device 500 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via the network adapter 560. As shown, the network adapter 560 communicates with the other modules of the electronic device 500 over the bus 530. It should be appreciated that although not shown in the figures, other hardware and/or software modules may be used in conjunction with the electronic device 500, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.

Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.

In an exemplary embodiment of the present disclosure, there is also provided a computer-readable storage medium having stored thereon a program product capable of implementing the above-described method of the present specification. In some possible embodiments, aspects of the invention may also be implemented in the form of a program product comprising program code means for causing a terminal device to carry out the steps according to various exemplary embodiments of the invention described in the above section "exemplary methods" of the present description, when said program product is run on the terminal device.

In an exemplary embodiment of the present disclosure, a portable compact disc read only memory (CD-ROM) may be employed and include program code, and may be run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited in this regard and, in the present document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

A computer readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

Program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., through the internet using an internet service provider).

Furthermore, the above-described figures are merely schematic illustrations of processes involved in methods according to exemplary embodiments of the invention, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is to be limited only by the terms of the appended claims.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is to be limited only by the terms of the appended claims.