Word line manufacturing method
阅读说明:本技术 字线制作方法 (Word line manufacturing method ) 是由 姚邵康 巨晓华 黄冠群 于 2019-11-11 设计创作,主要内容包括:本发明提供一种字线制作方法,包括以下步骤:提供半导体基底,其表面具有多个字线区并形成有字线材料层;在字线区和字线区之间形成间隔均匀的第一核心结构;在第一核心结构两侧形成侧墙并去除第一核心结构;在侧墙上形成第二掩模层,露出字线区;以侧墙和第二掩模层为阻挡,刻蚀字线材料层,形成字线和选择栅材料层;形成第三掩模层,露出选择栅材料层的中间区域,刻蚀选择栅材料层并形成选择栅。本发明提供的字线形成方法中,在字线区和字线区之间均形成间隔均匀的第一核心结构,可以在光刻和刻蚀过程中避免出现因为光学临近效应而导致形成的图案出现尺寸和形貌不一致的情况,并最终使字线区形成的多条字线的尺寸和形貌一致,保证了器件性能的均一性。(The invention provides a word line manufacturing method, which comprises the following steps: providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a plurality of word line areas and a word line material layer; forming a first core structure with uniform intervals between the word line area and the word line area; forming side walls on two sides of the first core structure and removing the first core structure; forming a second mask layer on the side wall to expose the word line region; etching the word line material layer by taking the side wall and the second mask layer as barriers to form a word line and a selection gate material layer; and forming a third mask layer, exposing the middle area of the selection gate material layer, etching the selection gate material layer and forming a selection gate. According to the word line forming method provided by the invention, the first core structures with uniform intervals are formed between the word line area and the word line area, so that the condition that the size and the appearance of a formed pattern are inconsistent due to an optical proximity effect can be avoided in the photoetching and etching processes, the sizes and the appearances of a plurality of word lines formed in the word line area are consistent finally, and the uniformity of the performance of a device is ensured.)
1. A method for forming a word line, comprising:
providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a plurality of word line regions arranged along a preset direction, and a word line material layer is formed on the surface of the semiconductor substrate;
forming a plurality of first core structures on the word line material layer, wherein the plurality of first core structures are uniformly arranged in each word line area and between the word line areas along the preset direction;
forming side walls on two sides of each first core structure, and removing the first core structures and reserving the side walls;
forming a second mask layer on the side walls, wherein the second mask layer exposes the word line regions and fills gaps of the side walls between the word line regions;
etching the word line material layer by taking the side wall and the second mask layer as protective layers, forming a plurality of word lines arranged along the preset direction in the word line region, and forming a selection gate material layer between the word line regions;
forming a third mask layer on the word line and the selection gate material layer, wherein the third mask layer exposes a part of the middle region of the selection gate material layer; and
and etching the selection gate material layer by taking the third mask layer as a protective layer, thereby forming a selection gate between the word line regions.
2. The method for fabricating a wordline according to claim 1, wherein the forming of the plurality of first core structures comprises:
forming a core layer on the word line material layer;
forming a first mask layer on the core layer, the first mask layer including a plurality of mask structures uniformly spaced in the word line region and between the word line regions along the predetermined direction;
etching the core layer by using the plurality of mask structures as protective layers, thereby forming initial core structures uniformly arranged at intervals along the predetermined direction in the word line region and between the word line regions; and
and reducing the size of each initial core structure in the height and the preset direction by adopting a micro process to obtain a plurality of first core structures.
3. The method of claim 2, wherein along the predetermined direction, the mask structures are equal in size and any two adjacent mask structures are equal in pitch.
4. The method for manufacturing a word line according to claim 3, wherein the shrink process is wet etching, and the shrink rate of the shrink process is 40-60%.
5. The method for fabricating a word line according to claim 4, wherein the shrink rate of the shrink process is 50%, the width of the mask structure is twice the distance between two adjacent word lines, and the distance between two adjacent mask structures is twice the width of the word lines.
6. The method for fabricating a word line according to claim 2, wherein the core layer and the sidewall spacers are made of two materials selected from silicon oxide, silicon nitride and polysilicon.
7. The method of claim 2, wherein forming the core layer on the layer of wordline material is performed by an LPCVD process or a PECVD process.
8. The method for fabricating a word line according to claim 2, wherein the first mask layer, the second mask layer and the third mask layer are made of photoresist.
9. The method for fabricating a word line according to any one of claims 1 to 8, wherein the step of forming the sidewalls on both sides of each of the first core structures comprises:
depositing a side wall material between the first core structures by using an LPCVD process or an ALD process; and performing vertical dry etching on the side wall material to form the side wall.
10. The method for fabricating a word line according to any one of claims 1 to 8, wherein the method for removing the first core structure while leaving the sidewall spacers is wet etching.
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a word line manufacturing method.
Background
Non-volatile memory retains data information when the system is shut down or no power is supplied. The NAND flash memory, as a nonvolatile memory, has the advantages of large capacity, fast erasing speed, low cost, and the like, is suitable for data storage in computers, and is widely applied to the fields of consumption, automobiles, industrial electronics, and the like.
NAND flash memory arrays typically include a plurality of blocks, each block including a number of word lines in the middle of the block and select tubes at both ends and adjacent to the word lines. With the development of technology, the size of word lines is continuously reduced to meet the increasing demand of memory capacity. Fig. 1 is a schematic cross-sectional view of a word line structure. As shown in fig. 1, when the size of the
However, when the
Disclosure of Invention
In order to obtain uniform word lines and reduce or prevent the influence on the uniformity of the storage performance of the flash memory caused by the inconsistent appearance and size of the word lines, the invention provides a word line manufacturing method.
The word line manufacturing method provided by the invention comprises the following steps:
providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a plurality of word line regions arranged along a preset direction, and a word line material layer is formed on the surface of the semiconductor substrate;
forming a plurality of first core structures on the word line material layer, wherein the plurality of first core structures are uniformly arranged in each word line area and between the word line areas along the preset direction;
forming side walls on two sides of each first core structure, and removing the first core structures and reserving the side walls;
forming a second mask layer on the side walls, wherein the second mask layer exposes the word line regions and fills gaps of the side walls between the word line regions;
etching the word line material layer by taking the side wall and the second mask layer as protective layers, forming a plurality of word lines arranged along the preset direction in the word line region, and forming a selection gate material layer between the word line regions;
forming a third mask layer on the word line and the selection gate material layer, wherein the third mask layer exposes a part of the middle region of the selection gate material layer; and
and etching the selection gate material layer by taking the third mask layer as a protective layer, thereby forming a selection gate between the word line regions.
Optionally, the forming method of the plurality of first core structures includes:
forming a core layer on the word line material layer;
forming a first mask layer on the core layer, the first mask layer including a plurality of mask structures uniformly spaced in the word line region and between the word line regions along the predetermined direction;
etching the core layer by using the plurality of mask structures as protective layers, thereby forming initial core structures uniformly arranged at intervals along the predetermined direction in the word line region and between the word line regions; and
and reducing the size of each initial core structure in the height and the preset direction by adopting a micro process to obtain a plurality of first core structures.
Optionally, along the predetermined direction, the sizes of the mask structures are equal, and the pitches of any two adjacent mask structures are equal.
Optionally, the micro process is wet etching, and the micro rate of the micro process is 40-60%.
Optionally, the shrink rate of the shrink process is 50%, the width of the mask structure is twice the distance between two adjacent word lines, and the distance between two adjacent mask structures is twice the width of the word lines.
Optionally, the core layer and the side wall are made of two materials selected from silicon oxide, silicon nitride and polysilicon.
Optionally, forming the core layer on the word line material layer utilizes an LPCVD process or a PECVD process.
Optionally, the first mask layer, the second mask layer, and the third mask layer are made of photoresist.
Optionally, the method for forming the side walls on the two sides of each first core structure includes:
depositing a side wall material between the first core structures by using an LPCVD process or an ALD process; and
and carrying out vertical dry etching on the side wall material to form the side wall.
Optionally, the method for removing the first core structure and reserving the side wall is wet etching.
According to the word line forming method provided by the invention, the first core structures with uniform intervals are formed between the word line area and the word line area, so that the condition that the size and the appearance of a formed pattern are inconsistent due to the photoetching proximity effect can be avoided in the photoetching and etching processes, the sizes and the appearances of a plurality of word lines formed in the word line area are consistent finally, and the uniformity of the performance of a device is ensured.
Drawings
Fig. 1 is a schematic cross-sectional view of a word line structure.
Fig. 2A to 2F are schematic cross-sectional views illustrating a word line manufacturing process using a conventional word line manufacturing method.
FIG. 3 is a flowchart illustrating a method for fabricating a word line according to an embodiment of the invention.
Fig. 4A to 4H are schematic cross-sectional views illustrating a process of fabricating a word line by using the word line fabricating method according to the embodiment of the invention.
The reference numerals are explained below:
i-word line region;
100. 200-a semiconductor substrate; 110. 210-a word line material layer; 120. 220-a core layer; 130. 230-a first mask layer; 131. 231-a mask structure; 140. 240-initial core structure; 141-edge initial core structure; 150-a first core structure; 151-edge first core structure; 160. 260-side walls; 161-edge side wall; 170. 280-word lines; 171-edge word lines; 180. 320-a select gate; 270-a second mask layer; 290-a layer of select gate material; 310-third mask layer.
Detailed Description
The following describes a specific embodiment of the word line fabricating method of the present invention in more detail with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
In order to better understand the embodiments of the present invention, a method for forming a word line is first described below. Fig. 2A-2F are schematic cross-sectional views illustrating a word line manufacturing process using a conventional word line manufacturing method, and the word line manufacturing method includes the following steps in conjunction with fig. 2A-2F.
The first step is as follows: referring to fig. 2A, a
In the conventional double exposure process, the first step forms the first mask layer 130 only in the word line region I by using a photolithography process. The first mask layer 130 includes a plurality of mask structures 131 uniformly arranged in the word line region I and between the word line regions I at intervals along the predetermined direction, and for the mask structure 131 located at the edge of the word line region I, one side is the mask structure 131 located at the same word line region I at a closer distance thereto, and the other side is the mask structure 131 located at the edge of another word line region I at a farther distance therefrom, that is, the line width of the exposure pattern between the word line regions I is significantly greater than the interval between the exposure patterns adjacent thereto, which causes an under exposure phenomenon to exist in the region between the word line regions I due to the optical proximity effect, and the mask structure 131 formed at the edge of the word line region I is inclined outward of the word line region I, resulting in the mask structure 131 located at the edge of the word line region I being larger in size and deformed.
The second step is as follows: referring to fig. 2B, a portion of the core layer 120 is removed using the first mask layer 130 as a barrier, and a plurality of
The third step: referring to fig. 2C, the
The fourth step: referring to fig. 2D, a sidewall process is used to form sidewalls 160 on both sides of the
The fifth step: referring to fig. 2E, the
A sixth step: referring to fig. 2F, a portion of the word
It can be seen that, in the conventional word line manufacturing process, when a plurality of word lines located in a word line region and a gate of a select transistor located between adjacent word line regions are formed by using a double exposure technique, due to an optical proximity effect (particularly, it is obvious in the process of manufacturing a word line with a small node), in a finally formed
In order to solve the problem of non-uniformity of word lines in the double exposure process and improve the performance of the flash memory, the invention provides a word line manufacturing method. The method for fabricating the word line according to the present invention is illustrated by the following embodiments.
FIG. 3 is a flowchart illustrating a method for fabricating a word line according to an embodiment of the invention. Referring to fig. 3, the method for manufacturing the word line of the present embodiment includes the following steps:
step S1: providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a plurality of word line regions arranged along a preset direction, and a word line material layer is formed on the surface of the semiconductor substrate;
step S2: forming a plurality of first core structures on the word line material layer, wherein the plurality of first core structures are uniformly arranged in each word line area and between the word line areas along the preset direction;
step S3: forming side walls on two sides of each first core structure, and removing the first core structures and reserving the side walls;
step S4: forming a second mask layer on the side walls, wherein the second mask layer exposes the word line regions and fills gaps of the side walls between the word line regions;
step S5: etching the word line material layer by taking the side wall and the second mask layer as protective layers, forming a plurality of word lines arranged along the preset direction in the word line region, and forming a selection gate material layer between the word line regions;
step S6: forming a third mask layer on the word line and the selection gate material layer, wherein the third mask layer exposes a part of the middle region of the selection gate material layer;
step S7: and etching the selection gate material layer by taking the third mask layer as a protective layer, thereby forming a selection gate between the word line regions.
The cross-sectional structure of the word line manufacturing process is schematically illustrated by the word line manufacturing method of the embodiment of the invention. The method for fabricating the word line in this embodiment is described in detail below with reference to fig. 4A to 4H.
Step S1 is first executed: providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a plurality of word line regions arranged along a preset direction, and a word line material layer is formed on the surface of the semiconductor substrate.
Referring to fig. 4A, a
Word line material layers 210 are sequentially formed on the
Then, step S2 is executed: forming a plurality of first core structures on the word line material layer, wherein the plurality of first core structures are uniformly arranged in each word line area and between the word line areas along the preset direction.
Specifically, referring to fig. 4A-4C, in the present embodiment, for example, the
First, step S201: a
The
Next, step S202 is performed to form a
The
In this embodiment, the material of the
Next, step S203 is performed, and the
Referring to fig. 4B, since the
Then, step S204 is performed, and the dimensions of each of the
Referring to fig. 4C, in the present embodiment, the adopted shrink process is, for example, wet etching, and due to the isotropic characteristic of the wet etching, the side surface and the top of the
Specifically, by controlling the process parameters of the wet etching, the
Then, step S3 is executed to form sidewalls on two sides of each of the first core structures, and remove the first core structures and leave the sidewalls.
Referring to fig. 4D, in the embodiment, the width of the formed
Referring to fig. 4E, the
And then, executing step S4, forming a second mask layer on the sidewalls, where the second mask layer exposes the word line regions and fills gaps of the sidewalls between the word line regions.
With continued reference to fig. 4E, since the word lines need only be formed in the word line regions I, and the select transistors are subsequently formed in the regions between the word line regions I, the
And then, executing a step S5, etching the word line material layer by using the side walls and the second mask layer as protective layers, forming a plurality of word lines arranged along the predetermined direction in the word line region, and forming a selection gate material layer between the word line regions.
Referring to fig. 4F, a dry etch may be performed under the barrier of the
Then, step S6 is performed to form a third mask layer on the word line and the select gate material layer, wherein the third mask layer exposes a portion of the middle region of the select gate material layer.
Referring to fig. 4G, after forming the select
And then, step S7 is performed, the third mask layer is used as a protection layer, and the selection gate material layer is etched, so that a selection gate is formed between the word line regions.
Referring to fig. 4H, a portion of the select
In the word line forming method provided by the embodiment of the invention, the first core structures with uniform intervals are formed between the word line area and the word line area, so that the condition that the size and the appearance of a formed pattern are inconsistent due to the photoetching proximity effect can be avoided in the photoetching and etching processes, the sizes and the appearances of a plurality of word lines formed in the word line area are consistent finally, and the uniformity of the performance of a device is ensured.
The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of the claims of the present invention. Those skilled in the art can make various changes, substitutions and alterations to the disclosed embodiments and technical solutions without departing from the spirit and scope of the present invention. Therefore, any simple modification, equivalent change and modification of the above embodiments according to the technical essence of the present invention are within the protection scope of the present invention, unless the technical essence of the present invention departs from the content of the technical solution of the present invention.
- 上一篇:一种医用注射器针头装配设备
- 下一篇:浮栅回刻的深度的测试方法