Stack packaging structure for image sensor and assembling method thereof

文档序号：1468170 发布日期：2020-02-21 浏览：6次中文

阅读说明：本技术 用于图像传感器的堆叠封装结构及其组装方法 (Stack packaging structure for image sensor and assembling method thereof ) 是由谢有德于 2019-07-29 设计创作，主要内容包括：本发明涉及用于图像传感器的堆叠封装结构及其组装方法。根据一个方面，堆叠封装结构包括基板；半导体设备，该半导体设备耦接到该基板的表面；图像传感器设备，该图像传感器设备耦接到该半导体设备，使得该半导体设备设置在该基板的该表面与该图像传感器设备之间；至少一个接合线，该至少一个接合线连接到该图像传感器设备和该基板的该表面；内部模塑件，该内部模塑件设置在该基板的该表面与该图像传感器设备之间，其中该半导体设备封装在该内部模塑件内；以及外部模塑件，该外部模塑件设置在该基板的该表面上，其中该至少一个接合线封装在该外部模塑件内。(The invention relates to a stacked package structure for an image sensor and an assembling method thereof. According to one aspect, a package on package structure includes a substrate; a semiconductor device coupled to a surface of the substrate; an image sensor device coupled to the semiconductor device such that the semiconductor device is disposed between the surface of the substrate and the image sensor device; at least one bond wire connected to the image sensor device and the surface of the substrate; an inner mold disposed between the surface of the substrate and the image sensor device, wherein the semiconductor device is encapsulated within the inner mold; and an exterior molding disposed on the surface of the substrate, wherein the at least one bond wire is encapsulated within the exterior molding.)

1. A package on package structure, the package on package structure comprising:

a substrate;

a semiconductor device coupled to a surface of the substrate;

an image sensor device coupled to the semiconductor device such that the semiconductor device is disposed between the surface of the substrate and the image sensor device;

at least one bond wire connected to the image sensor device and the surface of the substrate;

an inner mold disposed between the surface of the substrate and the image sensor device, the semiconductor device being encapsulated within the inner mold; and

an exterior molding disposed on the surface of the substrate, the at least one bond wire being encapsulated within the exterior molding.

2. The package on package structure of claim 1, wherein the semiconductor device is coupled to the surface of the substrate using a bump member, the bump member being at least partially disposed within an underfill material, the internal mold having a same material as the underfill material.

3. The stacked package structure of claim 1, wherein the inner mold comprises an epoxy material, the stacked package structure further comprising:

an adhesive layer disposed between the image sensor device and the semiconductor device.

4. The package on package structure of claim 1, wherein the semiconductor device is a first semiconductor device, the package on package structure further comprising:

a second semiconductor device coupled to the surface of the substrate, the second semiconductor device being encapsulated within the inner mold; and

a third semiconductor device coupled to the surface of the substrate, the third semiconductor device being encapsulated within the inner mold.

5. The package on package structure of claim 1, further comprising:

a transparent member coupled to the image sensor device such that an empty space exists between an active area of the image sensor device and the transparent member,

wherein the external mold extends along an edge of the internal mold, an edge of the image sensor device, and an edge of the transparent member.

6. The stacked package structure of claim 1, wherein the semiconductor device comprises an image signal processor integrated circuit die, wherein the surface of the substrate is a first surface, the substrate comprising a second surface opposite the first surface, the stacked package structure further comprising:

a plurality of conductive components coupled to the second surface of the substrate, the plurality of conductive components configured to connect to an external device.

7. A package on package structure, the package on package structure comprising:

a substrate;

a first semiconductor device coupled to a surface of the substrate;

a second semiconductor device coupled to the surface of the substrate;

an image sensor device disposed on the first semiconductor device and the second semiconductor device;

an inner mold disposed between the surface of the substrate and the image sensor device, the first semiconductor device and the second semiconductor device being encapsulated within the inner mold; and

an external molding disposed on the surface of the substrate, the external molding extending along an edge of the internal molding and an edge of the image sensor device.

8. The package on package structure of claim 7, wherein the first semiconductor device is coupled to the surface of the substrate using a bump member, the bump member being at least partially disposed within an underfill material, the internal mold having a same material as the underfill material.

9. The package on package structure of claim 7, wherein the internal mold comprises an epoxy material and the second semiconductor device comprises a driver integrated circuit die or a memory integrated circuit die, the package on package structure further comprising:

at least one bond wire connected to the image sensor device and the surface of the substrate; and

a third semiconductor device coupled to the surface of the substrate, the third semiconductor device being encapsulated within the inner mold.

10. A method of assembling a stacked package structure, the method comprising:

coupling a semiconductor device to a substrate in a flip-chip configuration;

applying an internal mold to cover the semiconductor device;

coupling an image sensor device to the inner mold;

connecting at least one bond wire to the image sensor device and the substrate;

coupling a transparent member to the image sensor device;

applying an exterior molding to cover the at least one bonding line and an edge portion of the transparent member.

Technical Field

The present description relates to a stack package structure for an image sensor and an assembling method thereof.

Background

Integrated Circuits (ICs) may require packaging to enclose the chips and provide protection during shipping, assembly, and subsequent use. In some package structures, the IC device is assembled on the back end of a Printed Circuit Board (PCB) using relatively long traces that interconnect with the image sensor.

Disclosure of Invention

According to one aspect, a package on package structure includes a substrate; a semiconductor device coupled to a surface of the substrate; an image sensor device coupled to the semiconductor device such that the semiconductor device is disposed between the surface of the substrate and the image sensor device; at least one bond wire connected to the image sensor device and the surface of the substrate; an inner mold disposed between the surface of the substrate and the image sensor device, wherein the semiconductor device is encapsulated within the inner mold; and an exterior molding disposed on the surface of the substrate, wherein the at least one bond wire is encapsulated within the exterior molding.

According to some aspects, the package on package structure may include one or more of the following features (or any combination thereof). The outer moulding may comprise a material different from that of the inner moulding. The outer moulding may comprise the same material as the inner moulding. The semiconductor device may be coupled to the surface of the substrate using a bump member, wherein the bump member is at least partially disposed within the underfill material and the internal mold is of the same material as the underfill material. The internal molding may comprise an epoxy material. The stack package structure may include an adhesive layer disposed between the image sensor device and the semiconductor device. The semiconductor device may be a first semiconductor device, and the stacked package structure further includes a second semiconductor device coupled to the surface of the substrate, wherein the second semiconductor device is encapsulated within the inner mold. The stacked package structure may include a third semiconductor device coupled to the surface of the substrate, wherein the third semiconductor device is encapsulated within the inner mold. The stack package structure may include a transparent member coupled to the image sensor device such that an empty space exists between an active area of the image sensor device and the transparent member. The outer mold may extend along an edge of the inner mold, an edge of the image sensor device, and an edge of the transparent member. The semiconductor device may include an Image Signal Processor (ISP) Integrated Circuit (IC) die. The surface of the substrate may be a first surface, and the substrate includes a second surface opposite the first surface. The stacked package structure may include a plurality of conductive components coupled to the second surface of the substrate, wherein the plurality of conductive components are configured to connect to an external device.

According to one aspect, a package on package structure includes a substrate; a first semiconductor device coupled to a surface of a substrate; a second semiconductor device coupled to the surface of the substrate; an image sensor device provided on the first semiconductor device and the second semiconductor device; an inner mold disposed between the surface of the substrate and the image sensor device, wherein the first semiconductor device and the second semiconductor device are encapsulated within the inner mold; and an external mold disposed on a surface of the substrate, wherein the external mold extends along an edge of the internal mold and an edge of the image sensor device.

According to some aspects, the stacked package structure may include one or more of the above and/or below features (or any combination thereof). The first semiconductor device may be coupled to the surface of the substrate using a bump member, wherein the bump member is at least partially disposed within the underfill material and the internal mold is of the same material as the underfill material. The internal molding may comprise an epoxy material. The second semiconductor device may include a driver Integrated Circuit (IC) die or a memory IC die. The package on package structure may include at least one bond wire connected to the image sensor device and a surface of the substrate. The stacked package structure may include a third semiconductor device coupled to the surface of the substrate, wherein the third semiconductor device is encapsulated within the inner mold.

According to one aspect, a method of assembling a package on package structure includes coupling a semiconductor device to a substrate in a flip chip configuration; applying an inner mold to cover the semiconductor device; coupling an image sensor device to the inner mold; connecting at least one bond wire to the image sensor device and the substrate; coupling a transparent member to an image sensor device; and applying an exterior molding to cover the at least one bonding line and the edge portion of the transparent member.

According to one aspect, a method of assembling a package on package structure includes coupling a semiconductor device to a substrate in a flip chip configuration; coupling an image sensor device to a semiconductor device; applying an internal molding between the substrate and the image sensor device; connecting at least one bond wire to the image sensor device and the substrate; coupling a transparent member to an image sensor device; and applying an exterior molding to cover the at least one bonding line and the edge portion of the transparent member.

The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features will be apparent from the description and drawings, and from the claims.

Drawings

Fig. 1A-1C illustrate stacked package structures for an image sensor device according to various aspects.

Fig. 2A and 2B illustrate stacked package structures for an image sensor device according to various aspects.

Fig. 3 illustrates a stacked package structure for an image sensor device according to another aspect.

Fig. 4 illustrates a stacked package structure for an image sensor device according to another aspect.

Fig. 5-8 illustrate flow diagrams depicting example operations for assembling a stacked package structure, in accordance with various aspects.

Detailed Description

The present disclosure relates to a stack package structure for an image sensor device, which may reduce the size of the overall package, reduce (or eliminate) noise transferred from the image sensor device onto image signals of the devices, and/or reduce the cost of manufacturing such packages, while increasing the number of devices included in the structure. In some examples, the stacked package structure may include an internal mold that encapsulates one or more devices coupled to the substrate; and an external mold that encapsulates the internal mold, the image sensor device, and a transparent member coupled to the image sensor device. In some examples, the one or more devices are coupled to the substrate in a flip-chip configuration using bump members (e.g., bumps, posts, etc.), and an underfill material is used between the devices and the substrate. In some examples, the inner mold contains an underfill material that is the same as or similar to the underfill material used in the flip-chip configuration. In some examples, the external mold is an epoxy-based mold or package that protects the image sensor device. In some examples, the inner mold contains the same or similar epoxy material as the outer mold. In some examples, the dual molding structure may improve durability of the package structure and reduce (or prevent) moisture from interfering with operation of the image sensor device and other devices included within the package structure.

Fig. 1A-1C illustrate a stacked package structure in accordance with various aspects. Fig. 1A illustrates a stacked package structure 100 for an image sensor device 102 according to one aspect. Image sensor device 102 includes an image sensor die having or corresponding to an array of pixel elements configured to convert electromagnetic radiation (e.g., light) into electrical signals. In some examples, image sensor device 102 includes a Complementary Metal Oxide Semiconductor (CMOS) image sensor. Image sensor device 102 includes a first surface 124 and a second surface 126. Stacked package structure 100 includes a transparent member 108 coupled to image sensor device 102 such that transparent member 108 is positioned over (and spaced apart from) first surface 124 of image sensor device 102 in direction a 1. The transparent member 108 comprises an optically transparent material that allows electromagnetic radiation (e.g., light (e.g., visible light)) to pass through (e.g., through the entire material). In some examples, the transparent member 108 includes a cover. In some examples, the transparent member 108 includes a cover. In some examples, the transparent member 108 includes one or more organic materials and/or one or more inorganic materials. In some examples, the transparent member 108 comprises a glass material. In some examples, the transparent member 108 comprises one or more layers of transparent material.

In some examples, the stack package structure 100 includes baffle members 105 that position the transparent member 108 away from the first surface 124 of the image sensor device 102. For example, the baffle members 105 are coupled to the transparent member 108 and the first surface 124 of the image sensor device 102, wherein a portion of the first surface 124 of the image sensor device 102 is disposed between adjacent baffle members 105. In some examples, the baffle member 105 comprises an adhesive material. In some examples, the baffle member 105 comprises an epoxy. In some examples, the baffle member 105 comprises a polymer-based material.

The package on package structure 100 includes a substrate 104. The substrate 104 comprises a Printed Circuit Board (PCB) substrate. In some examples, the substrate 104 includes a dielectric material. In some examples, the substrate 104 comprises a single layer of PCB substrate material. In some examples, the substrate 104 comprises multiple layers of PCB substrate material. The substrate 104 includes a first surface 116 and a second surface 118 disposed opposite the first surface 116. In some examples, the substrate 104 includes one or more conductive layer portions (e.g., electrical traces) disposed on the first surface 116 of the substrate 104 and/or one or more conductive layer portions (e.g., electrical traces) disposed on the second surface 118 of the substrate 104. In some examples, the electrical traces can be configured and/or used to transmit signals to and/or from a device (e.g., an electronic device included in a semiconductor region (e.g., an epitaxial layer and/or a semiconductor substrate)) to which the electrical traces are connected. In some examples, the electrical traces may include conductive traces (e.g., metal traces), such as copper traces, aluminum traces, and the like. The first surface 116 of the substrate 104 is disposed in a plane a 4. In some examples, the second surface 118 is disposed parallel to the first surface 116. Direction a1 is aligned perpendicular to plane a4, and direction a2 is perpendicular to direction a 1. The direction into the page A3 (shown as a dot) is aligned parallel to the plane a4 and orthogonal to the directions a1 and a 2. For simplicity, directions a1, a2, and A3 and plane a4 are used in several of the various views of the embodiments depicted in all of the figures.

The package on package structure 100 includes a first device 110 coupled to a first surface 116 of the substrate 104. In some examples, the first device 110 is coupled to the first surface 116 of the substrate 104 in a flip-chip configuration. In some examples, the first device 110 is coupled to the first surface 116 of the substrate 104 by Surface Mount Technology (SMT) (e.g., interconnection by a bond head). In some examples, the first device 110 is coupled to the first surface 116 of the substrate 104 using one or more bump members (e.g., copper pillars with solder, gold plated bumps, solder bumps, and/or gold pillar bumps, etc.). In some examples, an underfill material is disposed in a gap between the first device 110 and the first surface 116 of the substrate, where the underfill material encapsulates the bump members. In some examples, the underfill material is a liquid epoxy applied to the gap, and then thermal curing is performed to cure the underfill material. In some examples, image sensor device 102 has a first dimension (e.g., a length or a width) defined by a distance between edges 141 of image sensor device 102. In some examples, the first device 110 has a second dimension (e.g., a length or a width) defined by a distance between edges 111 of the first device 110. In some examples, the second size is smaller than the first size.

The first device 110 may comprise an integrated circuit die. In some examples, the first device 110 includes a semiconductor device. In some examples, first device 110 includes an Image Signal Processor (ISP) Integrated Circuit (IC) die. In some examples, first device 110 includes a memory IC die. In some examples, the first device 110 includes one or more passive components (e.g., resistor, inductor, and/or capacitor (RLC) circuits). In some examples, the first device 110 includes a driver IC die. The image sensor device 102 is coupled to a first device 110. In some examples, an adhesive layer (e.g., a die attach film) is disposed between surface 134 of image sensor device 102 and first device 110. In some examples, image sensor device 102 is communicatively connected to substrate 104 using at least one bond wire 121. The at least one bond wire 121 may be connected to a first surface 124 of the image sensor device 102 and a first surface 116 of the substrate 104. For example, the at least one bond wire 121 may be a conductive (e.g., metal) wire, such as aluminum, copper, or gold, or any combination thereof.

The stacked package structure 100 may include a plurality of conductive members 151 coupled to the second surface 118 of the substrate 104. In some examples, the conductive member 151 is a surface mount package element. In some examples, the conductive features 151 include solder balls. The conductive member 151 is a member for connecting to an external device, for example, a Ball Grid Array (BGA) device. However, the conductive member 151 may include other types of surface mount package elements.

The stacked package structure 100 includes an inner mold 113 disposed between the image sensor device 102 and the substrate 104. For example, the inner mold 113 may be disposed between the second surface 126 of the image sensor device 102 and the first surface 116 of the substrate 104. The inner mold 113 may encapsulate the first device 110. The inner mold 113 may extend between the second surface 126 of the image sensor device 102 and the first surface 116 of the substrate 104 along the edge 111 of the first device 110 in the direction a 1. The inner mold 113 may extend along direction a2 to the mold edge 131. The mold edge 131 may define where the inner mold 113 terminates. In some examples, mold edge 131 may be disposed at a location between edge 141 of image sensor device 102 and edge 153 of substrate 104. In some examples, mold edge 131 may be disposed at a location between edge 141 of image sensor device 102 and edge 111 of first device 110. In some examples, mold edge 131 is substantially aligned with edge 141 of image sensor device 102. In some examples, the molding edge 131 is linear. In some examples, the molding edge 131 includes one or more bends or curved portions.

In some examples, the inner mold 113 contains an underfill material. In some examples, the underfill material comprises an epoxy resin (e.g., a subsequently cured liquid epoxy resin), a (subsequently cured) liquid molding material, and/or a granular molding compound. In some examples, the underfill material is the same as or similar to the underfill material used under the first device 110. In some examples, the internal mold 113 contains a liquid epoxy that is applied between the image sensor device 102 and the substrate 104 and then cured via a thermal curing process. In some examples, the inner mold 113 comprises a molding material that is the same as or similar to the molding material used for the outer mold 115. In some examples, the inner mold 113 comprises one or more types of materials (e.g., in the form of a molding compound if multiple types of materials are included), such as metals, plastics, resins, epoxy resins, phenolic hardeners, silica materials, pigments, glass, ceramic sleeves, and the like.

The package on package structure 100 includes an external mold 115 encapsulating at least one bond wire 121. An external molding 115 may be disposed on the first surface 116 of the substrate 104. The outer mold 115 may extend along a mold edge 131 of the inner mold 113, an edge 141 of the image sensor device 102, an edge 161 of the baffle member 105, and/or the transparent member 108. In some examples, the external molding 115 is disposed on a portion of the first surface 124 of the image sensor device 102. The outer mold 115 may extend from one or more of the edges (e.g., 131,141,161) in the direction a 2. In some examples, the outer molding 115 defines a first molding edge 123 that defines an end of the outer molding 115 in the direction a 2. In some examples, the first mold edge 123 is linear. In some examples, the first mold edge 123 includes one or more angled or curved portions. In some examples, at least a portion of the first mold edge 123 (or all of the first mold edge 123) is aligned with the direction a 1. In some examples, the first mold edge 123 is disposed at an angle relative to the direction a 2. In some examples, at least a portion of the first mold edge 123 (or all of the first mold edge 123) is aligned with the edge 153 of the substrate 104. In some examples, the first mold edge 123 is disposed at a location between the edge 153 of the substrate and the mold edge 131 of the inner mold 113.

The outer molding 115 may define a second molding edge 125 that defines an end of the outer molding 115 in a direction a 1. The second mold edge 125 can extend from the first mold edge 123 to an edge 161 of the transparent member 108. In some examples, the second mold edge 125 is disposed at a non-zero angle relative to the first mold edge 123 such that the outer mold 115 tapers from the surface 128 of the transparent member 108. In some examples, the second mold edge 125 is disposed perpendicular to the first mold edge 123. In some examples, the second mold edge 125 is linear. In some examples, the second mold edge 125 includes one or more bent or cured portions.

The outer mold 115 comprises one or more types of materials (e.g., in the form of a molding compound if multiple types of materials are included), such as metals, plastics, resins, epoxy resins, phenolic hardeners, silica materials, pigments, glass, ceramic bushings, and the like. In some examples, the outer mold 115 comprises one or more materials that are different from the material of the inner mold 113. In some examples, the outer mold 115 comprises one or more materials that are the same as the material of the inner mold 113.

Fig. 1B illustrates a stacked package structure 150 for an image sensor device 102 according to another aspect. The stacked package structure 150 may include any of the features discussed with reference to fig. 1B. The stacked package structure 150 includes two devices, e.g., a first device 110 and a second device 112. In some examples, the second device 112 comprises a semiconductor device. In some examples, second device 112 includes an IC die. In some examples, second device 112 includes a memory IC die. In some examples, the second device 112 includes a driver IC die. In some examples, the second device 112 includes one or more passive RLC components. In some examples, second device 112 comprises an ISP IC die. In some examples, first device 110 is an ISP IC die and second device 112 is a driver IC die or a memory IC die.

The first device 110 is coupled to a first surface 116 of the substrate 104 and the second device 112 is coupled to the first surface 116 of the substrate 104. In some examples, the second device 112 is coupled to the first surface 116 of the substrate 104 in a flip-chip configuration. In some examples, the second device 112 is coupled to the first surface 116 of the substrate 104 using one or more bump members (e.g., bumps, posts, etc.). In some examples, an underfill material is disposed between the second device 112 and the first surface 116 of the substrate, wherein the underfill material encapsulates the bump members. In some examples, the second device 112 has a third dimension (e.g., a length or a width) defined by a distance between the first edge 109-1 and the second edge 109-2 of the second device 112. In some examples, the third size is smaller than the first size of the image sensor device 102. The image sensor device 102 is coupled to a first device 110 and a second device 112. In some examples, an adhesive layer (e.g., a die attach film) is disposed between the image sensor device 102 and the first and second devices 110, 112.

The inner mold 113 may encapsulate the first device 110 and the second device 112. For example, the inner mold 113 may be disposed between the image sensor device 102 and the substrate 104. The inner mold 113 may extend from the first edge 111-1 of the first device 110 to the first mold edge 131-1. The inner mold 113 may extend between the second edge 111-2 of the first device 110 and the first edge 109-1 of the second device 112. The inner mold 113 may extend from the second edge 109-2 to a second mold edge 131-2 of the inner mold 113. First mold edge 131-1 and second mold edge 131-2 may include any of the features explained with reference to mold edge 131 of fig. 1A.

Fig. 1C illustrates a stacked package structure 180 for an image sensor device 102 according to another aspect. The stacked package structure 180 may include any of the features discussed with reference to fig. 1A and/or fig. 1B. Stacked package structure 180 includes three devices, such as first device 110, second device 112, and third device 114. In some examples, the third device 114 comprises a semiconductor device. In some examples, third device 114 includes an IC die. In some examples, third device 114 includes a memory IC die. In some examples, the third device 114 includes a driver IC die. In some examples, third device 114 includes an ISPIC die. In some examples, third device 114 includes one or more passive RLC components. In some examples, first device 110 is an ISP IC die, and second device 112 is a driver IC die, and third device 114 is a memory IC die.

The first device 110 is coupled to the first surface 116 of the substrate 104, the second device 112 is coupled to the first surface 116 of the substrate 104, and the third device 114 is coupled to the first surface 116 of the substrate 104. In some examples, the third device 114 is coupled to the first surface 116 of the substrate 104 in a flip-chip configuration. In some examples, the third device 114 is coupled to the first surface 116 of the substrate 104 using one or more bump members (e.g., bumps, posts, etc.). In some examples, an underfill material is disposed between the third device 114 and the first surface 116 of the substrate 104, wherein the underfill material encapsulates the bump members. In some examples, the third device 114 has a fourth dimension (e.g., a length or a width) defined by a distance between the first edge 107-1 and the second edge 107-2 of the third device 114. In some examples, the fourth size is less than the first size of the image sensor device 102.

Image sensor device 102 is disposed on a surface of first device 110, a surface of second device 112, and a surface of third device 114. In some examples, an adhesive layer (e.g., a die attach film) is disposed between image sensor device 102 and first through third devices 110,112, 114.

The inner mold 113 may encapsulate the first device 110, the second device 112, and the third device 114. For example, the inner mold 113 may be disposed between the image sensor device 102 and the substrate 104. The inner mold 113 may extend from the first edge 111-1 of the first device 110 to the first mold edge 131-1. The inner mold 113 may extend between the second edge 111-2 of the first device 110 and the first edge 109-1 of the second device 112. The inner mold 113 may extend from the second edge 109-2 of the second device 112 to the first edge 107-1 of the third device 114. The inner mold 113 may extend from the second edge 107-2 to the second mold edge 131-2. First mold edge 131-1 and second mold edge 131-2 may include any of the features explained with reference to mold edge 131 of fig. 1A.

Fig. 2A illustrates a stacked package structure 200 for an image sensor device 202 according to one aspect. Fig. 2B illustrates a stacked package structure 250 for an image sensor device 202 according to another aspect. The stacked package structure 200 of fig. 2A uses an underfill material 206 for the inner mold 213. The stacked package structure 200 of fig. 2B uses an epoxy material 239 for the inner mold 213.

The package on package structure 200 may include any one or more of the features discussed with reference to fig. 1A-1C. Referring to fig. 2A and 2B, image sensor device 202 includes an image sensor die having an array of pixel elements configured to convert light into electrical signals. In some examples, image sensor device 202 includes a Complementary Metal Oxide Semiconductor (CMOS) image sensor. Image sensor device 202 has a first surface 224 and a second surface 226. The first surface 224 defines the active area 201 of the image sensor device 202. The active region 201 includes a pixel region (e.g., a pixel array) configured to receive light.

The stacked package structure 200 includes a transparent member 208 coupled to the image sensor apparatus 202 such that the transparent member 208 is positioned over (and spaced apart from) the active area 201 of the image sensor apparatus 202. In some examples, the transparent member 208 includes a cover. In some examples, the transparent member 208 includes a cover. In some examples, the transparent member 208 comprises a glass material. The transparent member 208 includes a first surface 228 and a second surface 230. Transparent member 208 is positioned away from image sensor device 202 in direction a1 such that there is a space 203 (e.g., an empty space) between second surface 230 of transparent member 208 and first surface 224 of image sensor device 202. In some examples, the stack package structure 200 includes baffle members 205 that position the transparent member 208 away from the active area 201 devices of the image sensor 202. For example, baffle members 205 are coupled to second surface 230 of transparent member 208 and to first surface 224 of image sensor device 202 (at an area other than active area 201), where active area 201 is disposed between adjacent baffle members 205.

The package on package structure 200 includes a substrate 204. The substrate 204 comprises a Printed Circuit Board (PCB) substrate. In some examples, the substrate 204 includes a dielectric material. In some examples, the substrate 204 comprises a single layer of PCB substrate material. In some examples, substrate 204 comprises multiple layers of PCB substrate material. The substrate 204 includes a first surface 216 and a second surface 218. In some examples, the substrate 204 includes one or more conductive layer portions 232 (e.g., electrical traces) disposed on the first surface 216 of the substrate 204 (and/or embedded within the substrate 204) and/or one or more conductive layer portions 232 (e.g., electrical traces) disposed on the second surface 218 of the substrate 204 (and/or embedded within the substrate 204). These electrical traces may include any of the features discussed herein. The first surface 216 of the substrate 204 is disposed in a plane a 4. Direction a1 is aligned perpendicular to plane a4, and direction a2 is perpendicular to direction a 1. The direction into the page A3 (shown as a dot) is aligned parallel to the plane a4 and orthogonal to the directions a1 and a 2. For simplicity, directions a1, a2, and A3 and plane a4 are used in several of the various views of the embodiments depicted in all of the figures.

The package on package structure 200 includes a first device 210 coupled to a first surface 216 of the substrate 204. In some examples, the first device 210 is coupled to the first surface 216 of the substrate 204 in a flip-chip configuration. In some examples, the first device 210 is coupled to the first surface 216 of the substrate 204 using one or more bump members 245. In some examples, the tab member 245 includes a post and/or a tab. In some examples, bump members 245 include copper pillars with solder, gold plated bumps, solder bumps, and/or gold pillar bumps. The first device 210 may include a first surface 234 and a second surface 236. The bump members 245 may extend from the second surface 236 to the first surface 216 of the substrate 204. In some examples, the underfill material 258 is disposed between the second surface 236 of the first device 210 and the first surface 216 of the substrate 204, wherein the underfill material 258 encapsulates the bump members 245 (e.g., underneath the first device 210). In some examples, the underfill material 258 comprises an epoxy material.

The image sensor device 202 has a first dimension (e.g., length or width) defined by the distance between the edges 241 of the image sensor device 202. In some examples, the first device 210 has a second dimension (e.g., a length or a width) defined by a distance between edges 211 of the first device 210. In some examples, the second size is smaller than the first size.

The first device 210 may comprise an integrated circuit die. In some examples, the first device 210 includes an Image Signal Processor (ISP) Integrated Circuit (IC) die. In some examples, the first device 210 includes a memory IC die. In some examples, the first device 210 includes a driver IC die. The image sensor device 202 may be coupled to a first device 210. In some examples, an adhesive layer 227 (e.g., a die attach film) is disposed between the second surface 226 of the image sensor device 202 and the first surface 234 of the first device 210. In some examples, image sensor device 202 is communicatively connected to substrate 204 using bond wires 221. Bond wire 221 may be connected to first surface 224 of image sensor device 202 and first surface 216 of substrate 204. For example, the bond wires 221 may be conductive (e.g., metal) wires, such as aluminum, copper, or gold, or any combination thereof.

The stacked package structure 200 may include a plurality of conductive members 251 coupled to the second surface 218 of the substrate 204. In some examples, the conductive member 251 is a surface mount package element. In some examples, the conductive features 251 include solder balls. The conductive member 251 is a member for connecting to an external device (e.g., a Ball Grid Array (BGA) device). However, the conductive member 251 may include other types of surface mount package elements.

An inner mold 213 is disposed between the image sensor apparatus 202 and the substrate 204. Referring to fig. 2A, the inner mold 213 contains an underfill material 206. In some examples, the underfill material 206 includes an epoxy. In some examples, the underfill material 206 is the same material as the underfill material 258. In some examples, the underfill material 206 is a different type of underfill material than the underfill material 258. Referring to fig. 2B, the inner mold 213 contains an epoxy resin material 239. The epoxy material 239 may be the same material as that used for the exterior molding 215. In some examples, the epoxy material 239 is a different type of epoxy material than the material used for the exterior molding 215.

An inner mold 213 may be disposed between the second surface 226 of the image sensor device 202 and the adhesive layer 227. In some examples, the inner mold 213 may be disposed between the adhesive layer 227 and the first surface 216 of the substrate 204. The inner mold 213 may encapsulate the first device 210. The inner mold 213 may extend between the adhesive layer 227 and the first surface 216 of the substrate 204 along the edge 211 of the first device 210 in the direction a 1. The inner mold 213 may extend along the direction a2 to the mold edge 231. The molding edge 231 may define a location where the inner molding 213 terminates along the direction a 2. In some examples, mold edge 231 may be disposed at a location between edge 241 of image sensor device 202 and edge 253 of substrate 204. In some examples, mold edge 231 may be disposed at a location between edge 241 of image sensor device 202 and edge 211 of first device 210. In some examples, mold edge 231 tapers toward image sensor device 202. In some examples, the molding edge 231 is linear. In some examples, the molding edge 231 includes one or more bends or curved portions.

An external mold 215 encapsulates the bond wires 221 (and the connections to the first surface 216 of the substrate 204 and the image sensor device 202). An exterior molding 215 may be disposed on the first surface 216 of the substrate 204. The outer mold 215 may extend along a mold edge 231 of the inner mold 213, an edge 241 of the image sensor device 202, an edge 261 of the baffle member 205, and/or the transparent member 208. In some examples, the entire outer surface of the inner mold 213 (e.g., the entire mold edge 231) is in contact with the outer mold 215. In some examples, an external molding 215 is disposed on a portion of the first surface 224 of the image sensor device 202. The outer molding 215 may extend from one or more of the edges (e.g., 231,241,261) in the direction a 2. In some examples, the outer molding 215 defines a first molding edge 223 that defines an end of the outer molding 215 in a direction a 2. In some examples, the first mold edge 223 is linear. In some examples, the first mold edge 223 includes one or more angled or curved portions. In some examples, at least a portion of the first mold edge 223 (or all of the first mold edge 223) is aligned with the direction a 1. In some examples, the first molding edge 223 is disposed at an angle relative to the direction a 2. In some examples, at least a portion of the first mold edge 223 (or all of the first mold edge 223) is aligned with the edge 253 of the substrate 204. In some examples, the first mold edge 223 is disposed at a location between the edge 253 of the substrate and the mold edge 231 of the inner mold 213.

The outer mold 215 may define a second mold edge 225. The second mold edge 225 may extend from the first mold edge 223 to an edge 261 of the transparent member 208. In some examples, the second mold edge 225 is disposed at a non-zero angle relative to the first mold edge 223 such that the outer mold 215 tapers from the first surface of the transparent member 208. In some examples, the second mold edge 225 is disposed perpendicular to the first mold edge 223. In some examples, the second mold edge 225 is linear. In some examples, the second mold edge 225 includes one or more bent or cured portions.

The outer mold 215 comprises one or more types of materials (e.g., in the form of a molding compound if multiple types of materials are included), such as metals, plastics, resins, epoxy resins, phenolic hardeners, silica materials, pigments, glass, ceramic bushings, and the like. In some examples, the outer mold 215 comprises one or more materials that are different from the material of the inner mold 213. In some examples, the outer mold 215 comprises one or more materials that are the same as the material of the inner mold 213. In some examples, the outer molding 215 has a different shape than the inner molding 213. In some examples, the thickness of the outer mold 215 is greater than the thickness of the inner mold 213 in the vertical stacking direction (e.g., along direction a 1). For example, in direction a1, the inner mold 213 extends from the first surface 216 of the substrate 204 to the adhesive layer 227 under the image sensor device 202. In the direction a1, the exterior mold 215 extends from the first surface 216 of the substrate 204 to the first surface 228 of the transparent member 208, the second surface 230 of the transparent member 208, a location between the first surface 228 and the second surface 230, or a location above the first surface 228 of the transparent member 208.

Fig. 3 illustrates a stacked package structure 300 for an image sensor device 302 according to another aspect. The stacked package structure 300 may include any of the features discussed with reference to fig. 1A, 1B, 1C, 2A, and 2B. The stack package structure 300 includes an image sensor device 302, a transparent member 308, a barrier member 305, bonding wires 321, an adhesive layer 327, a first device 310, a second device 312, conductive members 351, an internal mold 313, and an external mold 315. The second surface 318 of the substrate 304 is coupled to the conductive features 351. These components may include any of the features described with reference to the previous figures.

The first device 310 is coupled to the first surface 316 of the substrate 304 and the second device 312 is coupled to the first surface 316 of the substrate 304. In some examples, the second device 312 is coupled to the first surface 316 of the substrate 304 in a flip-chip configuration. In some examples, the second device 312 is coupled to the first surface 316 of the substrate 304 using one or more bump members 345 (e.g., bumps, posts, etc.). In some examples, the underfill material 358 is disposed between the second device 312 and the first surface 316 of the substrate 304, wherein the underfill material 358 encapsulates the bump members 345 (e.g., underneath the second device 112).

An adhesive layer 327 is disposed on the first device 310 and the second device 312. The inner mold 313 may encapsulate the first device 310 and the second device 312. For example, the inner mold 313 may be disposed between the adhesive layer 327 and the first surface 316 of the substrate 304. The inner mold 313 may extend from the first edge 311-1 of the first device 310 to the first mold edge 331-1. The inner molding 313 may extend between the second edge 311-2 of the first device 310 and the first edge 309-1 of the second device 312. The inner molding 313 can extend from the second edge 309-2 to a second molding edge 331-1 of the inner molding 313.

Fig. 4 illustrates a stacked package structure 400 for an image sensor device 402 according to another aspect. The stacked package structure 400 may include any of the features discussed with reference to fig. 1A, 1B, 1C, 2A, 2B, and 3. The stacked package structure 400 includes an image sensor device 402, a transparent member 408, a baffle member 405, a bonding wire 421, an adhesive layer 427, a first device 410, a second device 412, a third device 414, a conductive feature 451 coupled to a second surface 418 of the substrate 404, an inner molding 413, and an outer molding 415. These components may include any of the features described with reference to the previous figures.

The first device 410 is coupled to the first surface 416 of the substrate 404, the second device 412 is coupled to the first surface 416 of the substrate 404, and the third device 414 is coupled to the first surface 416 of the substrate 404. In some examples, the third device 414 is coupled to the first surface 416 of the substrate 404 in a flip-chip configuration. In some examples, the third device 414 is coupled to the first surface 416 of the substrate 404 using one or more bump members 445 (e.g., bumps, posts, etc.). In some examples, an underfill material 458 is disposed between the third apparatus 414 and the first surface 416 of the substrate 404, wherein the underfill material 458 encapsulates the bump members 445. An adhesive layer 427 is disposed on a surface of the first device 410, a surface of the second device 412, and a surface of the third device 414.

The inner mold 413 may encapsulate the first device 410, the second device 412, and the third device 414. For example, an inner mold 413 may be disposed between the image sensor device 402 and the adhesive layer 427. The inner mold 413 may extend from a first edge 411-1 of the first device 410 to a first mold edge 431-1. The inner molding 413 may extend between the second edge 411-2 of the first device 410 and the first edge 409-1 of the second device 412. The inner molding 413 may extend from the second edge 409-2 of the second device 412 to the first edge 407-1 of the third device 414. The inner mold 413 may extend from the second edge 407-2 to a second mold edge 431-2.

FIG. 5 depicts a flowchart 500 with example operations for assembling a package on package structure, according to an aspect. While the flow diagram 500 of fig. 5 shows the operations in sequential order, it should be understood that this is merely exemplary and that additional or alternative operations may be included. Further, the operations of FIG. 5 and related operations may be performed in a different order than shown, or in parallel or overlapping fashion. In some examples, flow chart 500 depicts exemplary operations for assembling a stacked package structure when the inner mold is an epoxy material similar to or the same as the epoxy material used for the outer mold. Although the flowchart 500 of fig. 5 is explained with reference to the stacked package structure 300 of fig. 3, the flowchart 500 may be applied to other stacked package structures using an epoxy material similar to or the same as an epoxy material used for an external mold.

In operation 502, a substrate 304 is provided. In operation 504, the first device 310 and the second device 312 are coupled to the first surface 316 of the substrate 304 via the bump members 345. For example, the first device 310 and the second device 312 are coupled to the substrate 304 in a flip-chip configuration. In an operation 506, an underfill material 358 is disposed under the first apparatus 310 and the second apparatus 312 such that the underfill material 358 encapsulates the bump members 345. In operation 508, an internal molding 313 is disposed on the substrate 304 and surrounds the first device 310 and the second device 312. In operation 510, an adhesive layer 327 is disposed on the first device 310 and the second device 312, and the image sensor device 302 is disposed on the adhesive layer 327. In addition, a bonding wire 321 is connected to the image sensor apparatus 302 and the substrate 304. In operation 512, the transparent member 308 is coupled to the image sensor device 302 using the baffle member 305. In operation 514, an external mold 315 is disposed on the substrate 304 and the conductive features 351 are coupled to the second surface 218 of the substrate 304.

FIG. 6 depicts a flowchart 600 having example operations for assembling a package on package structure, according to an aspect. While the flow diagram 600 of fig. 6 shows the operations in sequential order, it should be understood that this is merely exemplary and that additional or alternative operations may be included. Further, the operations of FIG. 6 and related operations may be performed in a different order than shown, or in parallel or overlapping fashion. In some examples, flowchart 600 depicts exemplary operations for assembling a stacked package structure when the internal mold is an underfill material similar to or the same as the underfill material used under these devices. Although the flowchart 600 of fig. 6 is explained with reference to the stacked package structure 300 of fig. 3, the flowchart 600 may be applicable to other stacked package structures that use underfill materials for the internal mold.

In operation 602, a substrate 304 is provided. In operation 604, the first device 310 and the second device 312 are coupled to the first surface 316 of the substrate 304 in a flip-chip configuration. For example, the first device 310 and the second device 312 are coupled to the first surface 316 of the substrate 304 using the bump members 345. In operation 606, an underfill material 358 is disposed under the first device 310 and the second device 312 to encapsulate the bump members 345. In operation 608, an adhesive layer 327 is disposed on the first device 310 and the second device 312, and the image sensor device 302 is disposed on the adhesive layer 327. In operation 610, an internal molding 313 is applied between the substrate 304 and the image sensor device 302 to encapsulate the first device 310 and the second device 312. In some examples, the inner mold 313 comprises a heat cured liquid epoxy. In operation 612, bond wires 321 are connected to image sensor device 302 and substrate 304. In operation 614, transparent member 308 is coupled to image sensor device 302 using barrier member 305. In operation 616, an external molding 315 is applied to the structure to cover the bond wires 321 and at least a portion of the edge of the transparent member 308, and to couple the conductive features 351 to the second surface 318 of the substrate.

FIG. 7 depicts a flowchart 700 with exemplary operations for assembling a package on package structure, according to one aspect. While the flowchart 700 of fig. 7 shows the operations in sequential order, it should be understood that this is merely exemplary and that additional or alternative operations may be included. Further, the operations and related operations of FIG. 7 may be performed in a different order than shown, or in parallel or overlapping fashion. In some examples, flowchart 700 depicts exemplary operations for any of these stacked package structures when the inner mold contains a similar or the same molding material as the outer mold.

Operation 702 includes coupling the device to a substrate in a flip-chip configuration. Operation 704 includes applying an inner mold to cover the device. Operation 706 includes coupling the image sensor device to an inner mold. Operation 708 includes connecting at least one bond wire to the image sensor device and the substrate. Operation 710 includes coupling a transparent member to the image sensor device. Operation 712 includes applying an exterior molding to cover the at least one bond line and an edge portion of the transparent member.

FIG. 8 depicts a flowchart 800 with example operations for assembling a stacked package structure, according to an aspect. While the flowchart 800 of fig. 8 shows operations in sequential order, it should be understood that this is merely exemplary and that additional or alternative operations may be included. Further, the operations of FIG. 8 and related operations may be performed in a different order than shown, or in parallel or overlapping fashion. In some examples, flowchart 800 depicts exemplary operations for any of these stacked package structures when the inner mold contains an underfill material.

Operation 802 includes coupling the device to a substrate in a flip-chip configuration. Operation 804 includes coupling an image sensor device to the device. Operation 806 includes applying an inner mold between the substrate and the image sensor device. Operation 808 comprises connecting at least one bond wire to the image sensor device and the substrate. Operation 810 includes coupling a transparent member to the image sensor device. Operation 812 includes applying an exterior molding to cover the at least one bond line and an edge portion of the transparent member.

According to one aspect, a package on package structure includes a substrate; a semiconductor device coupled to a surface of a substrate; an image sensor device coupled to the semiconductor device such that the semiconductor device is disposed between the surface of the substrate and the image sensor device; at least one bonding wire connected to the image sensor device and a surface of the substrate; an inner mold disposed between the surface of the substrate and the image sensor device, wherein the semiconductor device is encapsulated within the inner mold; and an exterior molding disposed on the surface of the substrate, wherein the at least one bond wire is encapsulated within the exterior molding.

It will be understood that in the foregoing description, when an element is referred to as being connected to, electrically connected to, coupled to, or electrically coupled to another element, the element may be directly connected or coupled to the other element or one or more intervening elements may be present. In contrast, when an element is referred to as being directly connected to or directly coupled to another element, there are no intervening elements present. Although the terms directly connected or directly coupled may not be used throughout the detailed description, elements shown as directly connected or directly coupled may be referred to in such a manner. The claims of this application, if any, may be amended to recite exemplary relationships that are described in the specification or illustrated in the drawings. Implementations of the various techniques described herein may be implemented (e.g., included) in digital electronic circuitry, or in computer hardware, firmware, software, or in combinations of them. Portions of the methods may also be performed by, and apparatus may be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).

Some embodiments may be implemented using various semiconductor processing and/or packaging techniques. Some embodiments may be implemented using various types of semiconductor processing techniques associated with semiconductor substrates including, but not limited to, for example, silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC), and the like.

While certain features of the described embodiments have been illustrated as described herein, many modifications, substitutions, changes, and equivalents will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the scope of the embodiments. It is to be understood that such modifications and variations are presented by way of example only, and not limitation, and various changes in form and detail may be made. Any portion of the devices and/or methods described herein may be combined in any combination, except mutually exclusive combinations. The embodiments described herein may include various combinations and/or subcombinations of the functions, features and/or properties of the different embodiments described.

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