阅读说明：本技术 一种空气隙晶体管器件结构及其制造方法 (Air-gap transistor device structure and manufacturing method thereof ) 是由 康晓旭 于 2019-10-21 设计创作，主要内容包括：一种空气隙晶体管器件结构及其制造方法,该结构包括发射极、控制极、收集极和空气隙；发射极包括形成于半导体衬底上的鳍结构和在鳍结构的表面形成一发射极材料层,其中,鳍结构的顶端为凸起的弧型；控制极在发射极的外围形成,并露出发射极的引出端；其中,发射极和控制极通过第一介质隔离层隔离；收集极在控制极的外侧形成,并露出控制极的引出端；其中,控制极与所述收集极通过第二隔离介质层隔离；空气隙的形状如圆弧顶的蘑菇,空气隙的蘑菇顶与收集极相连,发射极位于空气隙的底部,空气隙的蘑菇根部与鳍结构的顶端相连；空气隙的圆弧顶内侧同第一介质隔离层相连,控制极在凸起的发射极的两侧,且被第二隔离介质层所包围。(An air-gap transistor device structure and a method for manufacturing the same, the structure comprises an emitter, a control electrode, a collector and an air gap; the emitter comprises a fin structure formed on a semiconductor substrate and an emitter material layer formed on the surface of the fin structure, wherein the top end of the fin structure is in a convex arc shape; the control electrode is formed at the periphery of the emitter and exposes the leading-out end of the emitter; wherein the emitter and the control electrode are isolated by a first medium isolation layer; the collector is formed at the outer side of the control electrode and exposes the leading-out end of the control electrode; the control electrode and the collector are isolated by a second isolation medium layer; the air gap is shaped like a mushroom with an arc top, the mushroom top of the air gap is connected with the collector, the emitter is positioned at the bottom of the air gap, and the mushroom root of the air gap is connected with the top end of the fin structure; the inner side of the arc top of the air gap is connected with the first medium isolation layer, and the control electrodes are arranged on two sides of the protruding emitter and surrounded by the second isolation medium layer.)

1. An air gap transistor device structure, comprising:

the emitter comprises a fin structure formed on a semiconductor substrate and an emitter material layer formed on the surface of the fin structure, wherein the top end of the fin structure is an arc-shaped or triangular structure protruding upwards;

a control electrode formed on the periphery of the emitter and exposing the leading-out terminal of the emitter; wherein the emitter and the control electrode are isolated by a first medium isolation layer;

a collector formed outside the control electrode and exposing a leading-out end of the control electrode; the control electrode and the collector are isolated by a second isolation medium layer;

an air gap in the shape of a mushroom with a top portion protruding upwards, a mushroom top of the air gap being connected to the collector, the emitter being located at a root of the air gap, the root of the mushroom air gap being connected to a tip of the fin structure; the inner side of the arc top of the air gap is connected with the first medium isolation layer, and the control electrodes are arranged on two sides of the protruding emitting electrode and surrounded by the second isolation medium layer.

2. The air-gap transistor device structure of claim 1, wherein the control electrode and the collector electrode apply a positive potential and the emitter electrode applies a negative potential when the air-gap transistor device structure is in operation.

3. The airgap transistor device structure of claim 1 or 2, characterized in that the radius of curvature of the top arc of the fin structure is less than 1um, or the apex angle of the top triangle of the fin structure is less than or equal to 90 degrees.

4. The airgap transistor device structure of claim 3 wherein the radius of curvature of the top arc of the fin structure is a value between 20 nm and 200 nm or the apex angle of the top triangle of the fin structure is equal to or less than 45 degrees.

5. The air gap transistor device structure of claim 1 wherein the collector is shaped as an embedded triangle or trapezoid toward the inside of the air gap.

6. A method of fabricating an air gap transistor device structure, comprising the steps of:

step S1: forming a fin structure on a semiconductor substrate, wherein the top end of the fin structure is a raised arc-shaped or triangular structure;

step S2: forming an emitter material layer on the surface of the fin structure to form an emitter;

step S3: forming a first dielectric isolation layer and a control metal layer on the emitter material layer; wherein the control metal layer is used for forming a control electrode;

step S4: etching to remove the control metal layer in the top area of the fin structure, and stopping on the first medium isolation layer; the control electrode is formed on the periphery of the emitter electrode, and the emitter electrode and the control electrode are isolated by a first medium isolation layer;

step S5: removing the first dielectric isolation layer on the top region of the fin structure and exposing the top region of the emitter, wherein the opening window of the first dielectric isolation layer is smaller than the opening window of the control electrode;

step S6: forming a sacrificial layer and patterning so that the top area of the fin structure is completely covered by the sacrificial layer;

step S7: forming a second isolation medium layer, removing the second isolation medium layer in the top area of the fin structure, and reserving the sacrificial layer in the top area of the fin structure;

step S8: forming a collector metal material layer and patterning to form a collector and expose the sacrificial layer on the side surface of the air gap transistor device structure; the control electrode and the collector are isolated by a second isolation medium layer;

step S9: and releasing the sacrificial layer to form the air gaps of the air-gap transistor device structure.

7. The manufacturing method according to claim 1, wherein the material of the emitter material layer comprises a metal, a metal silicide, or donor N-type highly doped silicon.

8. The method of claim 6, wherein a layer of isolation dielectric is disposed outside the control electrode, and the step of forming the isolation dielectric is performed after the step of S4, and is patterned together with the first isolation dielectric in S5 to leave an emitter tip.

9. The manufacturing method according to claim 6, further comprising, after the step S7: and removing the sacrificial layer materials in the areas on two sides of the fin structure, and reserving the sacrificial layer in the area on the top of the fin structure.

Technical Field

The invention relates to the field of integrated circuit manufacturing, in particular to an air-gap transistor device structure and a manufacturing method thereof.

Background

The development of semiconductor technology is market-oriented, and the fundamental motivation is the continuous reduction of unit element cost and the continuous improvement of performance and function, so as to meet the market demand for cost reduction and performance and function improvement. After the CMOS technology generation of 16nm/14nm and below 10nm, the further development of the CMOS technology along the scaling route faces huge challenges in terms of cost, technology and the like, including carrier mobility, power consumption and the like, and how to continue moore's law and advance the development of the semiconductor technology into the direction of interest in the industry. Among them, 2D semiconductor materials, novel device structures, etc. have become a research hotspot for replacing MOS devices.

Referring to fig. 1, fig. 1 shows a chinese patent application publication No. CN 102074584 a, which is an air-gap graphene transistor and a method for fabricating the same. The transistor shown in the figure is a back gate air gap graphene transistor comprising a silicon substrate 101, an insulator layer 102, a gate electrode 103, a gate dielectric layer 104, a source electrode 105, a drain electrode 106 and a graphene layer 107, the graphene layer 107 being separated from the gate dielectric layer 105 and the gate electrode 103 by an air gap 110. However, the air gap transistor has a complicated manufacturing process and a high manufacturing cost.

Therefore, how to meet the market demand has become an important consideration for the design of air-gap transistors.

Disclosure of Invention

The invention aims to provide an air gap transistor device structure and a manufacturing method thereof, and in order to achieve the aim, the technical scheme of the invention is as follows:

an air gap transistor device structure, comprising:

the emitter comprises a fin structure formed on a semiconductor substrate and an emitter material layer formed on the surface of the fin structure, wherein the top end of the fin structure is in a convex arc shape;

a control electrode formed on the periphery of the emitter and exposing the leading-out terminal of the emitter; wherein the emitter and the control electrode are isolated by a first medium isolation layer;

a collector formed outside the control electrode and exposing a leading-out end of the control electrode; the control electrode and the collector are isolated by a second isolation medium layer;

an air gap shaped as a circular arc topped mushroom, the mushroom top of the air gap being connected to the collector, the emitter being located at the bottom of the air gap, the mushroom root of the air gap being connected to the top of the fin structure; the inner side of the arc top of the air gap is connected with the first medium isolation layer, and the control electrodes are arranged on two sides of the protruding emitting electrode and surrounded by the second isolation medium layer.

Further, when the air gap transistor device structure is in operation, the control electrode and the collector electrode apply a positive potential and the emitter motor applies a negative potential.

Further, the curvature radius of the top end arc of the fin structure is smaller than 1um, or the vertex angle of the top end triangle of the fin structure is smaller than or equal to 90 degrees, or the vertex angle of the top end triangle of the fin structure is smaller than or equal to 45 degrees.

Further, the radius of curvature of the top arc of the fin structure is a value between 20 nanometers and 200 nanometers.

Furthermore, the first isolation dielectric layer and the second isolation dielectric layer are made of the same material, and the collector faces the inner side of the air gap and is shaped like an embedded arc, an embedded triangle or a trapezoid.

In order to achieve the purpose, the invention adopts the following technical scheme:

a method of fabricating an air gap transistor device structure, comprising the steps of:

step S1: forming a fin structure on a semiconductor substrate, wherein the top end of the fin structure is a convex arc shape;

step S2: forming an emitter material layer on the surface of the fin structure to form an emitter;

step S3: forming a first dielectric isolation layer and a control metal layer on the emitter material layer; wherein the control metal layer is used for generating a control electrode;

step S4: etching to remove the control metal layer in the top area of the fin structure, and stopping on the first medium isolation layer; so that the control electrode is formed at the periphery of the emitter electrode, and the emitter electrode and the control electrode are separated by a first medium isolation layer;

step S5: removing the first dielectric isolation layer on the top region of the fin structure and leaking out of the top region of the emitter, wherein the opened window of the first dielectric isolation layer is smaller than the opened window of the control electrode, and the control electrode and the collector are isolated by a second isolation dielectric layer;

step S6: forming a sacrificial layer such that a top portion of the fin structure is completely covered by the sacrificial layer,

step S7: forming a second isolation medium layer, removing the second isolation medium layer on the top of the fin structure, and reserving the sacrificial layer on the top of the fin structure;

step S8: forming a collector metal material layer and patterning to form a collector and expose the sacrificial layer on the side surface of the air gap transistor device structure;

step S9: and releasing the sacrificial layer to form the air gaps of the air-gap transistor device structure.

Further, the material of the emitter material layer is metal, metal silicide or donor N-type highly doped silicon.

Further, after the step S4, the method further includes: then, a dielectric isolation layer is formed.

Further, after the step S7, the method further includes: and removing the sacrificial layer materials on two sides of the fin structure, and reserving the sacrificial layer on the top of the fin structure.

According to the air gap transistor device structure and the manufacturing method thereof, the technical scheme which is completely compatible with the CMOS process is utilized to realize the air gap transistor, and the Fin structure of the Fin Field effect transistor (FinFET) is utilized to realize the emitter, so that the air gap transistor with the nano structure is obtained, the ballistic emission of electron transmission is realized, the electron mobility of the device is effectively improved, and the technical basis is provided for the development of the device in the later CMOS era.

Drawings

Fig. 1 is a schematic structural diagram of an air-gap graphene transistor in the prior art

FIG. 2 is a cross-sectional view of an air-gap transistor device structure based on Finfet Fin structure according to a preferred embodiment of the present invention

Fig. 3 is a top view of the air-gap transistor device structure of fig. 2

FIG. 4 is a schematic diagram of a method for manufacturing an air-gap transistor structure based on a Finfet structure according to the present invention

Detailed Description

The following describes the embodiments of the present invention in further detail with reference to fig. 2-4.

The invention realizes the air-gap transistor by using the technical scheme completely compatible with the CMOS process, realizes the emitter by using the Finfet structure and can realize the air-gap transistor with a nano structure. In the FinFET structure, the gate is formed in a fork-shaped 3D structure similar to a fin, which controls the on and off of the circuit on both sides of the circuit. This design can greatly improve circuit control and reduce leakage current (leakage), and can also greatly shorten the gate length of the transistor.

Referring to fig. 2, fig. 2 is a schematic cross-sectional view of an air-gap transistor device structure based on a Finfet fin structure according to a preferred embodiment of the present invention. As shown in fig. 2, the Air gap transistor device structure includes an emitter, a controller, a collector, and an Air gap (Air or Vacuum).

In an embodiment of the present invention, the emitter is a fin structure using finfet, which has the advantage that, on the one hand, an air gap transistor device structure can be realized in a fully CMOS process-compatible solution, and, on the other hand, a fin (fin) structure formed on the substrate, which has a relatively sharp top end, i.e. a relatively small radius of curvature, is easy for the subsequent emitter to emit electrons. As shown in fig. 2, the emitter may include a fin structure formed on a semiconductor substrate and an emitter material layer formed on a surface of the fin structure, wherein a top of the fin structure is a convex arc shape. Generally, the radius of curvature of the top arc of the fin structure is usually less than 1um, and preferably, the radius of curvature of the top arc of the fin structure may be a value between 20 nm and 200 nm. In addition, the material of the emitter material layer can be metal, metal silicide or donor N-type highly doped silicon.

Referring to fig. 3, fig. 3 is a top view of the air-gap transistor device structure of fig. 2. As shown in fig. 3, the control electrode is formed at the periphery of the emitter and exposes the leading-out terminal of the emitter; wherein the emitter and the control electrode are isolated by a first medium isolation layer; the collector is formed at the outer side of the control electrode and exposes the leading-out end of the control electrode; the control electrode and the collector are isolated through a second isolation medium layer. In addition, the materials of the first isolation dielectric layer and the second isolation dielectric layer may be the same or different.

In the embodiment of the invention, the air gap is shaped like a mushroom with a circular arc top, the mushroom top of the air gap is connected with the collector, the emitter is positioned at the bottom of the air gap, and the mushroom root of the air gap is connected with the top end of the fin structure; the inner side of the arc top of the air gap is connected with the first medium isolation layer, and the control electrodes are arranged on two sides of the protruding emitter and surrounded by the second isolation medium layer. In addition, the inner side of the collector facing the air gap is shaped as an embedded circular arc, an embedded triangle, a trapezoid or other embedded patterns. The embedded structure of the collector (the embedded structure can be a concave structure) can make the distance between the collector and the control stage become longer on one hand, and on the other hand, the secondary electrons emitted by the embedded part face to all directions, and are only partially collected by the non-embedded collector, so that the secondary electrons emitted by the incident electrons can be effectively prevented from being collected by the control stage.

When the air gap transistor device structure is in operation, the control electrode and the collector apply a positive potential and the emitter motor applies a negative potential. In the embodiment of the invention, the control electrode is closer to the emitter, so that the electron field emission efficiency can be enhanced or weakened, and the second isolation medium layer is arranged outside the control electrode to prevent electrons from being absorbed by the control electrode.

Referring to fig. 4, fig. 4 is a schematic diagram illustrating a method for fabricating an air-gap transistor structure based on a Finfet structure according to the present invention. As shown in fig. 4, the manufacturing method includes the following steps:

step S1: forming a fin structure on a semiconductor substrate (Sub), wherein the top end of the fin structure is a convex arc type. Preferably, the fin structure is a FinFET fin structure manufactured by a CMOS process, and the top end of the fin structure is sharp, namely the curvature radius is small, so that the requirement of a subsequent emitter for emitting electrons is met.

Step S2: an emitter material layer is formed on the surface of the fin structure to form an emitter. The material of the emitter material layer may be a metal, a metal silicide (silicide) or donor N-type highly doped silicon (Si).

Step S3: forming a first dielectric isolation layer and a control metal layer on the emitter material layer; wherein the control metal layer is used to create the control electrode (as shown in fig. 1 to the left of the first row in fig. 4).

Step S4: etching to remove the control metal layer in the top area of the fin structure, and stopping on the first medium isolation layer; so that the control electrode is formed at the periphery of the emitter and the leading-out terminal of the emitter is exposed, the emitter and the control electrode are separated by a first dielectric isolation layer (as shown in fig. 2 on the left of the first row in fig. 4), it should be noted that the leading-out of the emitter and the control electrode is not limited to this way.

Preferably, the step S4 further includes: and removing the first dielectric isolation layer on the side wall of the fin structure, and reserving the first dielectric isolation layer on the side wall of the control metal layer.

It should be noted that, since the isolation of the first dielectric isolation layer is very important, in order to prevent the first dielectric isolation layer from being partially missing after the step S4, the step S4 may further include: then, a dielectric isolation layer is formed.

Step S5: removing the first dielectric isolation layer at the top region of the fin structure and leaking out of the top region of the emitter; wherein, the window opened by the first dielectric isolation layer is smaller than the window opened by the control electrode; wherein the control electrode is isolated from the collector electrode by a second isolation dielectric layer (as shown in fig. 4, left 3 of the first row).

Step S6: a sacrificial layer is formed such that the top of the fin structure is completely covered by the sacrificial layer. In embodiments of the present invention, the sacrificial layer may completely cover the exterior of the entire semi-finished device (as shown in fig. 4 to the left of the first row in fig. 4), or only the top of the fin structure may be completely covered by the sacrificial layer (as shown in fig. 1 to the right of the second row in fig. 4).

Step S7: a second isolation dielectric layer is formed (as shown in fig. 2 on the right of the second row in fig. 4), and the second isolation dielectric layer on the top of the fin structure is removed, and the sacrificial layer on the top of the fin structure is remained. Preferably, after step S7, the method further includes: the sacrificial layer material on both sides of the fin structure is removed, leaving the sacrificial layer on top of the fin structure (as shown in fig. 3 to the right of the second row in fig. 4).

Step S8: a collector metal material layer is formed and patterned to form a collector and expose the sacrificial layer on the sides of the air gap transistor device structure (as shown in figure 4, right 3 of the second row).

Step S9: the sacrificial layer is released to form air gaps in the air-gap transistor device structure (as shown in figure 4 to the right of the second row in figure 4).

In summary, according to the air-gap transistor device structure and the manufacturing method thereof provided by the invention, the air-gap transistor is realized by using the technical scheme completely compatible with the CMOS process, and the emitter is realized by using the Fin structure of the Fin Field effect transistor (FinFET), so that the air-gap transistor with the nano structure is obtained, and the realized ballistic emission of electron transmission effectively improves the electron mobility of the device, and provides a technical basis for the development of the device in the later CMOS era.

The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.