阅读说明：本技术 固态成像器件及固态成像器件的制造方法 (Solid-state imaging device and method for manufacturing solid-state imaging device ) 是由 桝田佳明 宫波勇树 阿部秀司 平野智之 山口征也 蛯子芳树 渡边一史 荻田知治 于 2014-06-20 设计创作，主要内容包括：本发明涉及能够在抑制混色恶化的同时提高灵敏度的固态成像器件以及固态成像器件的制造方法电子装置。所述固态成像器件包括：半导体基板,具有接收入射光的第一表面和与所述第一表面相对的第二表面；第一沟槽和第二沟槽,设置在所述半导体基板的所述第一表面中；以及第一凹入结构和第二凹入结构,设置在所述第一沟槽和所述第二沟槽之间,并在所述半导体基板的所述第一表面中,所述第一凹入结构和所述第二凹入结构的深度比所述第一沟槽和所述第二沟槽的深度浅。本发明的技术可例如应用于背面照射型固态成像器件。(The present invention relates to a solid-state imaging device capable of improving sensitivity while suppressing deterioration of color mixture, and a method of manufacturing the solid-state imaging device. The solid-state imaging device includes: a semiconductor substrate having a first surface receiving incident light and a second surface opposite to the first surface; a first trench and a second trench disposed in the first surface of the semiconductor substrate; and first and second recess structures disposed between the first and second trenches and having a depth shallower than the first and second trenches in the first surface of the semiconductor substrate. The technique of the present invention can be applied to, for example, a back-illuminated solid-state imaging device.)

1. A solid-state imaging device, comprising:

a semiconductor substrate having a first surface receiving incident light and a second surface opposite to the first surface;

a first trench and a second trench disposed in the first surface of the semiconductor substrate; and

first and second recess structures disposed between the first and second trenches and having a depth shallower than the first and second trenches in the first surface of the semiconductor substrate,

wherein the first flat portion of the semiconductor substrate is disposed between the first trench and the first recessed structure,

wherein the second flat portion of the semiconductor substrate is disposed between the second trench and the second recess structure, and

wherein a third flat portion of the semiconductor substrate is disposed between the first concave structure and the second concave structure, the third flat portion being parallel to the first flat portion and the second flat portion in a cross-sectional view.

2. The solid-state imaging device according to claim 1, wherein a fourth flat portion of the semiconductor substrate is provided between the second flat portion and the third flat portion, and wherein the fourth flat portion is parallel to the first flat portion and the second flat portion in the cross-sectional view.

3. The solid-state imaging device according to claim 2, further comprising:

a third recessed feature disposed in the first surface between the third and fourth flats.

4. The solid-state imaging device according to claim 1, further comprising:

a photoelectric conversion region disposed in the semiconductor substrate and located between the first trench and the second trench in the substrate.

5. The solid-state imaging device according to claim 4, wherein the first concave structure and the second concave structure are provided above the photoelectric conversion region.

6. The solid-state imaging device according to claim 1, further comprising:

a first insulating film disposed on the first flat portion and the second flat portion.

7. The solid-state imaging device according to claim 6, wherein the first insulating film comprises silicon.

8. The solid-state imaging device according to claim 6, wherein the first insulating film comprises an oxide.

9. The solid-state imaging device according to claim 6, wherein the first insulating film comprises silicon oxide.

10. The solid-state imaging device according to claim 6, further comprising:

a second insulating film provided between the first insulating film and the first and second flat portions.

11. The solid-state imaging device according to claim 10, wherein the second insulating film has negative fixed charges.

12. The solid-state imaging device according to claim 10, wherein the second insulating film comprises an oxide.

13. The solid-state imaging device according to claim 12, wherein the second insulating film contains hafnium oxide or tantalum oxide.

14. A method of manufacturing a solid-state imaging device, comprising:

forming a first groove and a second groove in a surface of a substrate on a light incident side of the substrate; and

forming a first recessed structure and a second recessed structure in the surface of the substrate and between the first trench and the second trench, wherein the first recessed structure and the second recessed structure have a depth shallower than the first trench and the second trench, and

wherein the step of forming the first and second recess structures forms a first, second and third flat portion of the substrate, wherein the third flat portion is parallel to the first and second flat portions in cross-sectional view, and wherein the first flat portion is located between the third flat portion and the first trench.

15. The method of claim 14, wherein the steps of forming the first and second trenches and forming the first and second recessed structures comprise dry etching.

16. The method of claim 14, further comprising:

forming an antireflection film in the first trench and the second trench and in the first concave structure and the second concave structure.

17. The method of claim 16, further comprising:

forming an insulating film on the light-shielding film such that the insulating film is in the first trench and the second trench, and in the first recessed structure and the second recessed structure.

18. The method of claim 17, further comprising:

a light-shielding film is formed on the insulating film so that the light-shielding film overlaps with at least a part of the first flat portion in a cross-sectional view.

Technical Field

The present invention relates to a solid-state imaging device, a method of manufacturing the solid-state imaging device, and an electronic apparatus, and particularly relates to a solid-state imaging device, a method of manufacturing the solid-state imaging device, and an electronic apparatus capable of improving sensitivity while suppressing deterioration of color mixture.

Background

In the solid-state imaging device, a so-called moth-eye structure (moth-eye structure) in which a fine projection and depression structure is provided on an interface on a light receiving surface side of a silicon layer in which a photodiode is formed has been proposed as a structure for preventing reflection of incident light (for example, see patent documents 1 and 2).

List of cited documents

Patent document

Patent document 1: japanese patent application laid-open No. 2010-272612

Patent document 2: japanese patent application laid-open No. 2013-33864

Disclosure of Invention

Problems to be solved by the invention

However, the moth-eye structure capable of improving sensitivity by preventing reflection of incident light also causes greater diffusion, so that a large amount of light leaks into adjacent pixels, and thus color mixing is deteriorated.

The present invention has been made in view of such circumstances, and an object of the present invention is to improve sensitivity while suppressing color mixture degradation.

Solution to the problem

A solid-state imaging device according to a first aspect of the present invention includes: an antireflection portion having a moth-eye structure provided on an interface on a light receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally; and an inter-pixel light shielding portion for blocking incident light, provided below the interface of the reflection preventing portion.

A method of manufacturing a solid-state imaging device according to a second aspect of the present invention includes: forming an antireflection portion having a moth-eye structure on an interface on a light receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally; and forming an inter-pixel light shielding portion for blocking incident light below the interface of the reflection preventing portion.

In the second aspect of the present invention, the antireflection portion having the moth-eye structure is formed on the interface on the light receiving surface side of the photoelectric conversion region of each pixel arranged two-dimensionally, and the inter-pixel light-shielding portion for blocking incident light is formed below the interface of the antireflection portion.

An electronic apparatus according to a third aspect of the present invention includes a solid-state imaging device including an antireflection portion having a moth-eye structure provided on an interface on a light receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-shielding portion for blocking incident light, the inter-pixel light-shielding portion being provided below the interface of the antireflection portion.

In the first and third aspects of the present invention, the antireflection portion having the moth-eye structure is provided on the interface on the light receiving surface side of the photoelectric conversion region of each pixel arranged two-dimensionally, and the inter-pixel light-shielding portion for blocking incident light is formed below the interface of the antireflection portion.

The solid-state imaging device and the electronic apparatus may be separate apparatuses or modules to be built into another apparatus.

Effects of the invention

According to the first to third aspects of the present invention, it is possible to improve the sensitivity while suppressing the deterioration of color mixture.

Drawings

Fig. 1 is a diagram illustrating a schematic structure of a solid-state imaging device according to the present invention.

Fig. 2 is a diagram illustrating an exemplary cross-sectional structure of a pixel according to the first embodiment.

Fig. 3 is a diagram for explaining a manufacturing method of a pixel.

Fig. 4 is a diagram for explaining a manufacturing method of a pixel.

Fig. 5 is a diagram for explaining another manufacturing method of the pixel.

Fig. 6 is a diagram for explaining the effect of the pixel structure according to the present invention.

Fig. 7 is a diagram for explaining the effect of the pixel structure according to the present invention.

Fig. 8 is a diagram illustrating an exemplary cross-sectional structure of a pixel according to the second embodiment.

Fig. 9 is a diagram for explaining a manufacturing method of a pixel according to the second embodiment.

Fig. 10 is a diagram for explaining optimal conditions for different positions in a pixel.

Fig. 11 is a diagram illustrating a first modification of the pixel structure.

Fig. 12 is a diagram illustrating a second modification of the pixel structure.

Fig. 13 is a diagram illustrating a third modification of the pixel structure.

Fig. 14 is a diagram illustrating a fourth modification of the pixel structure.

Fig. 15 is a diagram illustrating a fifth modification of the pixel structure.

Fig. 16 is a diagram illustrating a sixth modification of the pixel structure.

Fig. 17 is a diagram illustrating a seventh modification of the pixel structure.

Fig. 18 is a diagram illustrating an eighth modification of the pixel structure.

Fig. 19 is a diagram illustrating a ninth modification of the pixel structure.

Fig. 20 is a diagram illustrating a tenth modification of the pixel structure.

Fig. 21 is a diagram illustrating an eleventh modification of the pixel structure.

Fig. 22 is a diagram illustrating a twelfth modification of the pixel structure.

Fig. 23 is a diagram illustrating a thirteenth modification of the pixel structure.

Fig. 24 is a diagram illustrating a fourteenth modification of the pixel structure.

Fig. 25 is a diagram illustrating a fifteenth modification of the pixel structure.

Fig. 26 is a diagram illustrating a sixteenth modification of the pixel structure.

Fig. 27 is a block diagram illustrating an exemplary configuration of an imaging device serving as an electronic apparatus according to the present invention.

Detailed Description

The following will explain a specific embodiment (hereinafter, referred to as an example) of the present invention. The description will be made in the following order.

1. Exemplary schematic structure of solid-state imaging device

2. The pixel structure according to the first embodiment (pixel structure including the reflection preventing portion and the interpixel light shielding portion)

3. Pixel structure according to the second embodiment (pixel structure including interpixel light-shielding portions filled with metal)

4. Modified example of pixel structure

5. Exemplary applications of the electronic device

<1. exemplary schematic Structure of solid-state imaging device >

Fig. 1 is a diagram illustrating a schematic structure of a solid-state imaging device according to the present invention.

The solid-state imaging device 1 shown in fig. 1 includes a pixel array section 3 in which pixels 2 are arranged in a two-dimensional array, and a peripheral circuit section disposed in the periphery of the pixel array section 3. The pixel array section 3 and the peripheral circuit section are provided on a semiconductor substrate 12 using silicon (Si) as a semiconductor, for example. The peripheral circuit section includes a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, a control circuit 8, and the like.

The pixel 2 includes a photodiode as a photoelectric conversion element and a plurality of pixel transistors. The plurality of pixel transistors are constituted by, for example, four MOS transistors (i.e., a transfer transistor, a selection transistor, a reset transistor, and an amplification transistor).

The pixels 2 may have a common pixel structure. The common pixel structure includes, for each pixel, a plurality of photodiodes, a plurality of transfer transistors, one common floating diffusion (floating diffusion region), and another common pixel transistor. That is, the common pixel is constituted by a photodiode and a transfer transistor for constituting a plurality of unit pixels, and each group of unit pixels shares another pixel transistor.

The control circuit 8 receives an input clock and data for instructing an operation mode or the like, and outputs data such as internal information of the solid-state imaging device 1. In other words, based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock, the control circuit 8 generates a reference which serves as a clock signal or a control signal for operating the vertical drive circuit 4, the column signal processing circuits 5, the horizontal drive circuit 6, and the like. Further, the control circuit 8 outputs the generated clock signal or control signal to the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, and the like.

The vertical drive circuit 4, for example, including a shift register, selects the pixel drive lines 10 and supplies a pulse for driving the pixels 2 to the selected pixel drive lines 10 to drive the pixels 2 row by row. That is, the vertical drive circuit 4 sequentially selects and scans the pixels 2 in the pixel array section 3 row by row in the vertical direction, and supplies a pixel signal based on signal charges generated in accordance with the amount of light received in the photoelectric conversion unit of each pixel 2 to the column signal processing circuit 5 through the vertical signal line 9.

The column signal processing circuit 5 is provided for each column of the pixels 2 to perform signal processing such as noise removal for each pixel column on signals output from the pixels 2 included in one row. For example, the column signal processing circuit 5 performs signal processing such as Correlated Double Sampling (CDS) and AD conversion to eliminate fixed pattern noise unique to the pixel.

The horizontal drive circuit 6, which includes a shift register for example, sequentially outputs horizontal scan pulses to sequentially select each column signal processing circuit 5 and cause each column signal processing circuit 5 to output a pixel signal to the horizontal signal line 11.

The output circuit 7 performs signal processing on the signal sequentially supplied from each column signal processing circuit 5 through the horizontal signal line 11 and outputs the processed signal. For example, the output circuit 7 may perform only buffering or may also perform black level adjustment, column variation correction, various digital signal processing, and the like. The input/output terminal 13 exchanges signals with the outside.

The solid-state imaging device 1 configured in the above-described manner is a CMOS image sensor called a column AD scheme in which a column signal processing circuit 5 is provided for each pixel column to perform CDS processing and AD conversion processing.

Further, the solid-state imaging device 1 is a MOS type solid-state imaging device of a back-illuminated type in which light enters from a back surface side of the semiconductor substrate 12 opposite to the front surface side on which the pixel transistors are formed.

<2 > Pixel Structure according to the first embodiment

< exemplary Cross-sectional Structure of Pixel >

Fig. 2 is a diagram illustrating an exemplary cross-sectional structure of the pixel 2 according to the first embodiment.

The solid-state imaging device 1 includes a semiconductor substrate 12, a multilayer wiring layer 21 formed on the front surface side (lower side in the drawing) of the semiconductor substrate 12, and a support substrate 22.

The semiconductor substrate 12 is made of, for example, silicon (Si) and is formed to have a thickness of, for example, 1 to 6 μm. In the semiconductor substrate 12, for example, an N-type (second conductivity type) semiconductor region 42 is formed in a P-type (first conductivity type) semiconductor region 41 for each pixel 2, thereby forming a photodiode PD for each pixel. The P-type semiconductor regions 41 extending to the front and back surfaces of the semiconductor substrate 12 also serve as hole charge accumulation regions for suppressing dark current.

Note that, at the pixel boundary between the N-type semiconductor regions 42 between the pixels 2, as shown in fig. 2, the P-type semiconductor region 41 is deeply dug to form an inter-pixel light shielding portion 47 described later.

The interface of the P-type semiconductor region 41 located on the upper side of the N-type semiconductor region 42 serving as the charge accumulation region (the interface located on the light receiving surface side) constitutes an antireflection portion 48, and the antireflection portion 48 prevents incident light from reflecting by using a so-called moth-eye structure in which a fine uneven structure is formed. In the antireflection portion 48, the interval of the spindle-shaped protrusions corresponding to the period of the irregularities is set, for example, from 40nm to 200 nm.

The multilayer wiring layer 21 includes a plurality of wiring layers 43 and an interlayer insulating film 44. In addition, a plurality of pixel transistors Tr are formed in the multilayer wiring layer 21, for example, to read the electric charges accumulated in the photodiodes PD.

The pinning layer 45 is formed on the back surface of the semiconductor substrate 12 and covers the top surface of the P-type semiconductor region 41. The pinning layer 45 is formed by using a high dielectric having negative fixed charges, so that the positive charge (hole) accumulation region formed around the interface between the pinning layer 45 and the semiconductor substrate 12 suppresses the generation of dark current. When the pinning layer 45 is formed to have negative fixed charges, the negative fixed charges add an electric field to the interface between the pinning layer 45 and the semiconductor substrate 12, thereby forming a positive charge accumulation region.

For example, by using hafnium oxide (HfO)₂) To form the pinning layer 45. Alternatively, it can be prepared by using zirconium oxide (ZrO)₂) Or tantalum oxide (Ta)₂O₅) Etc. to form the pinning layer 45.

The transparent insulating film 46 fills the dug portion in the P-type semiconductor region 41, and is also formed on the top of the pinning layer 45 on the entire back surface of the semiconductor substrate 12. The dug portion filled with the transparent insulating film 46 in the P-type semiconductor region 41 constitutes an inter-pixel light-shielding portion 47 for preventing incident light from leaking and entering into the adjacent pixel 2.

The transparent insulating film 46 is a light-transmitting material that provides insulating properties and has a refractive index n1(n 1) smaller than the refractive index n2 of the semiconductor regions 41 and 42<n 2). As for the material of the transparent insulating film 46, silicon oxide (SiO) may be used alone or in combination₂) Silicon nitride (SiN), silicon oxynitride (SiON), hafnium oxide (HfO)₂) Alumina (Al)₂O₃) Zirconium oxide (ZrO)₂) Tantalum oxide (Ta)₂O₅) Titanium oxide (TiO)₂) Lanthanum oxide (La)₂O₃) Praseodymium oxide (Pr)₂O₃) Cerium oxide (CeO)₂) Neodymium oxide (Nd)₂O₃) Promethium oxide (Pm)₂O₃) Samarium oxide (Sm)₂O₃) Europium oxide (Eu)₂O₃) Gadolinium oxide (Gd)₂O₃) Terbium oxide (Tb)₂O₃) Dysprosium oxide (Dy)₂O₃) Holmium oxide (Ho)₂O₃) Thulium oxide (Tm)₂O₃) Ytterbium oxide (Yb)₂O₃) Lutetium oxide (Lu)₂O₃) Yttrium oxide (Y)₂O₃) Or a resin, etc.

Before the transparent insulating film 46 is formed, a pinning layer may be formed45 is laminated on the upper side thereof with an antireflection film. As the material of the antireflection film, silicon nitride (SiN) or hafnium oxide (HfO) can be used₂) Alumina (Al)₂O₃) Zirconium oxide (ZrO)₂) Tantalum oxide (Ta)₂O₅) Titanium oxide (TiO)₂) Lanthanum oxide (La)₂O₃) Praseodymium oxide (Pr)₂O₃) Cerium oxide (CeO)₂) Neodymium oxide (Nd)₂O₃) Promethium oxide (Pm)₂O₃) Samarium oxide (Sm)₂O₃) Europium oxide (Eu)₂O₃) Gadolinium oxide (Gd)₂O₃) Terbium oxide (Tb)₂O₃) Dysprosium oxide (Dy)₂O₃) Holmium oxide (Ho)₂O₃) Thulium oxide (Tm)₂O₃) Ytterbium oxide (Yb)₂O₃) Lutetium oxide (Lu)₂O₃) Or yttrium oxide (Y)₂O₃) And the like.

The antireflection film may be formed only on the top surface of the antireflection portion 48 having the moth-eye structure, or may be formed on both the top surface of the antireflection portion 48 and the side surface of the inter-pixel light-shielding portion 47 in the same manner as the pinning layer 45.

A light-shielding film 49 is formed in a region of a pixel boundary on the transparent insulating film 46. Any material that blocks light may be used as the material of the light-shielding film 49, and tungsten (W), aluminum (Al), or copper (Cu) may be used, for example.

A planarization film 50 is formed on the entire surface (including the light-shielding film 49) of the upper side of the transparent insulating film 46. For example, an organic material such as a resin may be used as the material of the planarization film 50.

A red, green, or blue color filter layer 51 is formed on the upper side of the planarization film 50 for each pixel. The color filter layer 51 is formed, for example, by spin-coating (spin-coating) using a photosensitive resin including a coloring agent such as a pigment or a dye. For example, respective colors of red, green, and blue are arranged, for example, in a bayer array; however, other alignment methods may be used for alignment. In the example shown in fig. 2, a blue (B) color filter layer 51 is formed for the pixel 2 on the right side, and a green (G) color filter layer 51 is formed for the pixel 2 on the left side.

An on-chip lens 52 is formed on the upper side of the color filter layer 51 for each pixel 2. The on-chip lenses 52 are formed of a resin-based material such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer-based resin, or a silicone-based resin. The incident light is focused at the on-chip lens 52, and the focused light effectively enters the photodiode PD through the color filter layer 51.

Each pixel 2 in the pixel array section 3 of the solid-state imaging device 1 is configured in the above-described manner.

< method of manufacturing pixel according to first embodiment >

Hereinafter, a method of manufacturing the pixel 2 according to the first embodiment will be described with reference to fig. 3 to 4.

First, as shown in a of fig. 3, on the back surface side of the semiconductor substrate 12, a photoresist 81 is coated on the top surface of the P-type semiconductor region 41, and the photoresist 81 is patterned by a photolithography technique (lithography technique) so that a region to be a concave portion of a moth-eye structure in the antireflection portion 48 becomes an opening.

Subsequently, a dry etching (dry etching) process is performed on the semiconductor substrate 12 based on the patterned photoresist 81. Therefore, as shown in B of fig. 3, the concave portion of the moth-eye structure in the antireflection portion 48 is formed; thereafter, the photoresist 81 is removed. The moth-eye structure in the antireflection portion 48 may also be formed by a wet etching (wet etching) process instead of the dry etching process.

Next, as shown in fig. 3C, a photoresist 82 is applied on the top surface of the P-type semiconductor region 41 on the back surface side of the semiconductor substrate 12, and the photoresist 82 is patterned by a photolithography technique so that the dug portion of the inter-pixel light-shielding portion 47 becomes an opening.

Subsequently, an anisotropic dry etching process is performed on the semiconductor substrate 12 based on the patterned photoresist 82. Therefore, as shown in D of fig. 3, the trench structure of the interpixel light-shielding portion 47 is formed; thereafter, the photoresist 82 is removed. Thus, the interpixel light-shielding portions 47 having the trench structure are formed.

The inter-pixel light-shielding portion 47 needs to be dug to a deep position of the semiconductor substrate 12, and therefore, the inter-pixel light-shielding portion 47 is formed by anisotropic dry etching processing. Therefore, the interpixel light-shielding portion 47 can be formed into a dug shape without a taper, thereby giving a waveguide function.

As shown in a of fig. 4, the pinning layer 45 is then formed by a Chemical Vapor Deposition (CVD) method on the entire surface of the semiconductor substrate 12 on which the antireflection portion 48 having the moth-eye structure and the inter-pixel light-shielding portion 47 having the trench structure are formed.

Subsequently, as shown in B of fig. 4, a transparent insulating film 46 is formed on the top surface of the pinning layer 45 by a film formation method having a high filling property such as a CVD method or using a filling material. In this way, the transparent insulating film 46 is filled in the excavated interpixel light-shielding portion 47.

Thereafter, as shown in C of fig. 4, a light-shielding film 49 is formed only on the region between the pixels by a photolithography technique, and then, as shown in D of fig. 4, a planarization film 50, a color filter layer 51, and an on-chip lens 52 are formed in this order.

The solid-state imaging device 1 having the structure shown in fig. 2 can be manufactured in the above-described manner.

< Another manufacturing method of the pixel according to the first embodiment >

In the above-described manufacturing method, the antireflection portion 48 having the moth-eye structure is formed first, and then the inter-pixel light-shielding portion 47 having the trench structure is formed. However, the order of formation of the antireflection portion 48 and the interpixel light-shielding portions 47 may be reversed.

Referring to fig. 5, a manufacturing method of the following case will be explained: the inter-pixel light-shielding portion 47 of the trench structure is formed first, and then the antireflection portion 48 having the moth-eye structure is formed.

First, as shown in fig. 5, a photoresist 91 is applied on the top surface of the P-type semiconductor region 41 on the back surface side of the semiconductor substrate 12, and the photoresist 91 is patterned by a photolithography technique so that the groove portion of the inter-pixel light-shielding portion 47 becomes an opening.

Subsequently, an anisotropic dry etching process is performed on the semiconductor substrate 12 based on the patterned photoresist 91. Therefore, as shown in B of fig. 5, the groove portion of the interpixel light-shielding portion 47 is formed; thereafter, the photoresist 91 is removed. Thus, the interpixel light-shielding portions 47 having the trench structure are formed.

Next, as shown in C of fig. 5, a photoresist 92 is coated on the top surface of the P-type semiconductor region 41, and the photoresist 92 is patterned by a photolithography technique so that a region to be a concave portion of the moth-eye structure in the antireflection portion 48 becomes an opening.

Then, a dry etching process is performed on the semiconductor substrate 12 based on the patterned photoresist 92. Therefore, as shown in D of fig. 5, the concave portion of the moth-eye structure in the antireflection portion 48 is formed; thereafter, the photoresist 92 is removed. Thus, the antireflection portion 48 having the moth-eye structure is formed. The moth eye structure in the antireflection portion 48 may also be formed by a wet etching process instead of the dry etching process.

The state shown in D of fig. 5 is the same as the state shown in D of fig. 3. Therefore, the subsequent manufacturing method of the transparent insulating film 46, the planarization film 50, and the like is the same as the foregoing method shown in fig. 4, and the description thereof will be omitted.

< effects of the pixel structure according to the first embodiment >

Fig. 6 is a diagram for explaining the effect of the pixel structure of the pixel 2 shown in fig. 2.

Fig. 6 a is a diagram for explaining an effect of the antireflection portion 48 having the moth-eye structure.

The antireflection portion 48 having the moth-eye structure prevents reflection of incident light. Thus, the sensitivity of the solid-state imaging device 1 can be improved.

B of fig. 6 is a diagram for explaining the effect of the pixel structure of the interpixel light-shielding portion 47 having the trench structure.

In the past, when the inter-pixel light-shielding portion 47 was not provided, the incident light diffused at the reflection preventing portion 48 passed through the photoelectric conversion regions (the semiconductor regions 41 and 42) in some cases. The effect of the inter-pixel light-shielding portion 47 is that it reflects incident light diffused at the antireflection portion 48 having a moth-eye structure and confines the incident light within the photoelectric conversion region. In this way, the optical distance for silicon absorption is lengthened, and thus the sensitivity can be improved.

Assume that the refractive index of the interpixel light-shielding portion 47 is n1 ═ 1.5 (corresponding to SiO)₂) And the refractive index of the semiconductor region 41 in which the photoelectric conversion region is formed is n2 equal to 4.0, a waveguide effect is generated by the difference in refractive index (photoelectric conversion region: a core; inter-pixel light-shielding portion 47: a cladding layer) such that incident light is confined within the photoelectric conversion region. The moth-eye structure has a disadvantage of deteriorating color mixing due to diffusion of light; however, by combining with the interpixel light-shielding portion 47, the deterioration of color mixing can be eliminated, and in addition, the incident angle at which incident light propagates within the photoelectric conversion region is also enlarged, thereby giving rise to an advantage of improving the photoelectric conversion efficiency.

Fig. 7 is a diagram illustrating the effect of the pixel structure of the pixel 2 according to the present invention by comparison with another structure.

Each of a to D of fig. 7 is illustrated as a two-stage configuration of an upper diagram and a lower diagram; the upper diagram illustrates a sectional structure diagram of the pixel, and the lower diagram is a distribution diagram depicting the intensity of light within the semiconductor substrate 12 in the case where green parallel light enters the pixel having the pixel structure of the upper diagram. Note that in a to D of fig. 7, the same reference numerals are used to denote constituent elements corresponding to those of the structure of the pixel 2 shown in fig. 2 for ease of understanding.

The upper diagram of a of fig. 7 illustrates a pixel structure of a typical solid-state imaging device in which the antireflection portion 48 having a moth-eye structure and the inter-pixel light-shielding portion 47 having a trench structure are not provided, and the pinning layer 45A is formed flatly on the P-type semiconductor region 41.

In the distribution graph depicting the intensity of light shown in the lower graph of a of fig. 7, higher light intensity is represented in higher density. When the light receiving sensitivity of the green pixel is set to the reference (1.0), since some green light passes through the blue pixel, the light receiving sensitivity of the blue pixel in a of fig. 7 is 0.06, and the total light receiving sensitivity of the two pixels is 1.06.

The upper diagram of B in fig. 7 shows a pixel structure in which only the antireflection portion 48 having the moth-eye structure is formed on the P-type semiconductor region 41.

In the distribution diagram shown in the lower diagram of B of fig. 7, the incident light diffused at the antireflection portion 48 having the moth-eye structure leaks into the adjacent blue pixel. Therefore, the light receiving sensitivity of the green pixel is lowered to 0.90, and the light receiving sensitivity of the adjacent blue pixel is raised to 0.16. The total light receiving sensitivity of the two pixels was 1.06.

Fig. 7C illustrates a pixel structure in which only the interpixel light-shielding portions 47 having a trench structure are formed in the P-type semiconductor region 41.

The distribution diagram shown in the lower diagram of C of fig. 7 is almost different from that of the pixel structure in a of fig. 7; the light receiving sensitivity of the green pixel was 1.01, and the light receiving sensitivity of the blue pixel was 0.06, and the total light receiving sensitivity of the two pixels was 1.07.

Fig. 7D illustrates the pixel structure of fig. 2 according to the present invention.

In the distribution diagram shown in the lower diagram of D of fig. 7, the antireflection portion 48 having the moth-eye structure prevents upward reflection, while preventing the incident light diffused at the antireflection portion 48 having the moth-eye structure from leaking into the adjacent blue pixel by the inter-pixel light-shielding portion 47. Thus, the light receiving sensitivity of the green pixel is raised to 1.11 and the light receiving sensitivity of the blue pixel is 0.07 (which is at the same level as the pixel structure in C of fig. 7). The total light receiving sensitivity of the two pixels was 1.18

Therefore, as described above, in the case of the pixel structure according to the present invention as shown in fig. 2, the reflection preventing portion 48 having the moth-eye structure prevents upward reflection while preventing the incident light diffused at the reflection preventing portion 48 from leaking into the adjacent blue pixel by the inter-pixel light shielding portion 47. Therefore, the sensitivity can be improved while suppressing deterioration of color mixture.

<3 > Pixel Structure according to the second embodiment

< exemplary Cross-sectional Structure of Pixel >

Fig. 8 illustrates an exemplary cross-sectional structure of the pixel 2 according to the second embodiment.

In fig. 8, the same reference numerals are used to designate the constituent elements corresponding to those of the first embodiment shown in fig. 2, and the description thereof will be appropriately omitted.

The second embodiment shown in fig. 8 differs from the foregoing first embodiment in that the metal light-shielding portion 101 is provided again by filling a metal material such as tungsten (W) into the center region of the inter-pixel light-shielding portion 47 having a trench structure arranged between the pixels 2.

Further, in the second embodiment, the transparent insulating film 46 laminated on the surface of the pinning layer 45 is conformally formed by using, for example, a sputtering method.

The solid-state imaging device 1 according to the second embodiment can further suppress color mixing by further providing the metal light-shielding portion 101.

< method of manufacturing pixel according to second embodiment >

A method of manufacturing the pixel 2 according to the second embodiment will be explained with reference to fig. 9.

As for the manufacturing method of the pixel, the case shown in a of fig. 9 is the same as the case shown in a of fig. 4 described in the first embodiment. Therefore, the manufacturing method up to the formation of the pinning layer 45 is the same as that of the first embodiment described above.

Further, as shown in B of fig. 9, a transparent insulating film 46 is formed conformally on the surface of the pinning layer 45 by, for example, using a sputtering method.

Subsequently, as shown in C in fig. 9, patterning processing is performed only for the region between the pixels by, for example, a photolithography technique using tungsten (W), thereby simultaneously forming the metal light-shielding portion 101 and the light-shielding film 49. Of course, the metal light-shielding portion 101 and the light-shielding film 49 are separately formed by using different metal materials.

Thereafter, as shown in D of fig. 9, a planarization film 50, a color filter layer 51, and an on-chip lens 52 are formed in this order.

< exemplary optimal conditions for pixel Structure >

The optimum conditions at different positions in the pixel 2 will be explained with reference to fig. 10.

(moth eye arrangement region L1 of antireflection portion 48)

In the foregoing embodiment, the antireflection portion 48 having the moth-eye structure has been formed on the entire region on the light receiving surface side of the semiconductor regions 41 and 42 in which the photodiodes PD are formed. However, as shown in fig. 10, the moth eye arrangement region L1 of the antireflection portion 48 may be formed only at the center region of the pixel located in a region corresponding to a predetermined percentage of the pixel region L4 (pixel width L4). Further, it is desirable that the moth eye arrangement region L1 of the antireflection section 48 be a region corresponding to about 80% of the pixel region L4.

The on-chip lens 52 focuses light to the center of an area of the sensor (photodiode PD) serving as a photoelectric conversion area. Thus, the intensity of light is higher closer to the center of the sensor, and the intensity of light is lower further away from the center of the sensor. In an area away from the center of the sensor, there are many diffracted light noise components toward adjacent pixels (i.e., color mixture noise components). Therefore, when the moth-eye structure is not formed in the vicinity of the inter-pixel light-shielding portion 47, diffusion of light and thus noise can be suppressed. The moth-eye arrangement region L1 of the antireflection portion 48 varies depending on the difference in the upper layer structure such as the pixel size, the curvature of the on-chip lens, and the total thickness of the pixel 2. However, since the on-chip lens 52 generally focuses light onto one spot that is an area corresponding to about 80% of the central area of the sensor, it is desirable that the moth-eye arrangement area L1 of the antireflection portion 48 be an area corresponding to about 80% of the pixel area L4.

Further, the size of the (spindle-shaped) protrusion of the moth-eye structure may be formed to be different for each color. As for the size of the protrusion, a height, an arrangement region (formation region of the protrusion in a plan view), and a space may be defined.

For shorter wavelength incident light, the height of the protrusions decreases. That is, assume that the height of the projection of the red pixel 2 is h_RThe height of the projection of the green pixel 2 is h_GAnd the height of the protrusion of the blue pixel 2 is h_BThe height of the protrusion of the pixel 2 may be formed so as to remain h_R>h_G>h_BThe dimensional relationship indicated.

The area of the protrusion is also reduced for shorter wavelength incident light. That is, it is assumed that the arrangement area of the protrusions of the red pixel 2 is x_RThe arrangement area of the protrusions of the green pixel 2 is x_GAnd the arrangement area of the protrusions of the blue pixel 2 is x_BThen, the arrangement area of the protrusion of the pixel 2 may be formed so as to remain x_R>x_G>x_BThe dimensional relationship indicated. The width of the arrangement area in one direction corresponds to the moth-eye arrangement width L1 in fig. 10.

For shorter wavelength incident light, the spacing of the protrusions is reduced. That is, it is assumed that the interval of the protruding portions of the red pixel 2 is p_RThe interval of the projections of the green pixel 2 is p_GAnd the interval of the protrusions of the blue pixel 2 is p_BThe interval of the protruding portion of the pixel 2 may be formed so as to remain p_R>p_G>p_BThe dimensional relationship indicated.

(groove width L2 of interpixel light-shielding portion 47)

The groove width L2 of the interpixel light-shielding portion 47 necessary for preventing the incident light from leaking into the adjacent pixel for complete reflection will be explained.

Assuming that the wavelength λ of incident light is 600nm, the refractive index n2 of the semiconductor region 41 is 4.0, and the refractive index n1 of the interpixel light-shielding portion 47 is 1.5 (which corresponds to SiO)₂) And the incident angle θ from the semiconductor region 41 into the inter-pixel light-shielding portion 47 is 60 °, it is sufficient that the trench width L2 of the inter-pixel light-shielding portion 47 is 40nm or more. However, from the viewpoint of satisfying the margins of optical performance and process filling performance, the trench width L2 of the inter-pixel light-shielding portion 47 is desirably 200nm or more.

(excavation amount L3 of interpixel light-shielding portion 47)

The excavation amount L3 of the inter-pixel light-shielding portion 47 will be described.

The effect of suppressing color mixture increases as the excavation amount L3 of the interpixel light-shielding portion 47 increases. However, when the excavation amount exceeds a predetermined level, the degree of suppressing the color mixture becomes saturated. Further, the focus position and the diffusion intensity depend on the wavelength of the incident light. More specifically, in the case of a short wavelength, the focus position is high and the diffusion intensity is large; therefore, color mixing in the shallow region increases, and thus the excavation amount can be small. On the other hand, in the case of a long wavelength, the focus position is low and the diffusion intensity is small; therefore, color mixing in the deep zone increases and thus the required excavation amount is large. In view of the above, the desired excavation amount L3 for the blue pixel 2 is 450nm or more, the desired excavation amount L3 for the green pixel 2 is 550nm or more, and the desired excavation amount L3 for the red pixel 2 is 650nm or more.

In the above description, in order not only to utilize the waveguide function to the maximum extent but also not to reduce the area for the sensor, the inter-pixel light-shielding portion 47 has a dug shape without taper formed by the anisotropic dry etching process.

However, as long as the area for the photodiode PD is not affected even if the inter-pixel light-shielding portion 47 is formed in a tapered shape (because the inter-pixel light-shielding portion 47 and the N-type semiconductor region 42 are sufficiently separated from each other), the inter-pixel light-shielding portion 47 may be tapered. For example, assume that the refractive index n1 of the interpixel light-shielding portion 47 is 1.5 (corresponding to SiO)₂) And the refractive index of the P-type semiconductor region 41 is 4.0, the boundary refractive index is extremely high and thus the inter-pixel light-shielding portion 47 may be a normal tapered shape or an inverted tapered shape in the range of 0 ° to 30 °.

<4. modified example of the pixel Structure >

A plurality of modifications of the pixel structure will be described with reference to fig. 11 to 26. In fig. 11 to 26, the illustrated pixel structure, which is simpler than the exemplary cross-sectional structure shown in fig. 2 to 8, is used for explanation, and each corresponding constituent element is denoted even with a given different reference numeral in some cases.

Fig. 11 is a diagram illustrating a first modification of the pixel structure.

First, a general basic structure which is each modification of the pixel structure described below will be explained below with reference to fig. 11.

As shown in fig. 11, the solid-state imaging device 1 includes a semiconductor substrate 12, in the semiconductor substrate 12, an N-type semiconductor region 42 for constituting a photodiode PD is formed for each pixel 2. The antireflection film 111, the transparent insulating film 46, the color filter layer 51, and the on-chip lens 52 are laminated on the semiconductor substrate 12.

The antireflection film 111 has a laminated structure obtained by, for example, laminating a fixed charge film and an oxide film, and can use, for example, a high dielectric (high-k) insulating film formed by an Atomic Layer Deposition (ALD) method. More specifically, hafnium oxide (HfO) may be used₂) Alumina (Al)₂O₃) Titanium oxide (TiO)₂) Or Strontium Titanium Oxide (STO), and the like. In the example shown in fig. 11, the antireflection film 111 is configured by laminating a hafnium oxide film 112, an aluminum oxide film 113, and a silicon oxide film 114.

Further, the light shielding film 49 is formed between the pixels 2 so as to be laminated on the antireflection film 111. A single-layer metal film of titanium (Ti), titanium nitride (TiN), tungsten (W), aluminum (Al), or tungsten nitride (WN) is used for the light shielding film 49. Alternatively, a stacked film of these types of metals (for example, a stacked film of titanium and tungsten or a stacked film of titanium nitride and tungsten) may be used as the light-shielding film 49.

In the first modification of the pixel structure in the solid-state imaging device 1 configured in the above-described manner, the flat portion 53 is provided by a region of a predetermined width in which the antireflection portion 48 is not formed on the interface on the light receiving surface side of the semiconductor substrate 12 between the pixels 2. As described above, the antireflection portion 48 is provided by forming a moth-eye structure (fine uneven structure) which is not formed on the region between the pixels 2 so as to leave a flat surface; thus, the flat portion 53 is provided. In this order, the flat portion 53 is provided in the pixel structure; therefore, the generation of diffracted light can be suppressed in an area of a predetermined width (pixel separation area, i.e., the vicinity of another adjacent pixel 2), thereby preventing the generation of color mixture.

In other words, in the case of the semiconductor substrate 12 formed with the moth-eye structure, it is known that diffraction of normally incident light is generated, and for example, when the interval of the moth-eye structure is increased, the diffracted light component becomes larger, whereby the percentage of light entering another adjacent pixel 2 is increased.

In contrast to this, the solid-state imaging device 1 is provided with the flat portion 53 in a region of a predetermined width between the pixels 2 that easily causes incident light to leak into another adjacent pixel 2, so that the normally incident light does not generate diffraction in the flat portion 53, and therefore the generation of color mixture can be prevented.

Fig. 12 is a diagram illustrating a second modification of the pixel.

In fig. 12, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In addition, in the second modification of the pixel, a pixel separation portion 54 for separation between the pixels 2 in the semiconductor substrate 12 is formed.

The pixel separation portion 54 is formed by digging a trench between the N-type semiconductor regions 42 for constituting the photodiode PD, forming an aluminum oxide film 113 on the inner surface of the trench, and further filling the trench with an insulating material 55 when forming the silicon oxide film 114.

By configuring such a pixel separation portion 54, the pixels 2 adjacent to each other are electrically isolated from each other by the insulating material 55 filling the trench. In this way, the charge generated in the semiconductor substrate 12 can be prevented from leaking into the adjacent pixel 2.

Further, also in the second modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby preventing occurrence of color mixing.

Fig. 13 is a diagram illustrating a third modification of the pixel structure.

In fig. 13, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. Further, in the third modification of the pixel structure, a pixel separation portion 54A for separation between the pixels 2 in the semiconductor substrate 12 is formed.

The pixel separation section 54A is formed by digging a trench between the N-type semiconductor regions 42 for constituting the photodiode PD, forming an aluminum oxide film 113 on the inner surface of the trench, filling the trench with an insulating material 55 when forming the silicon oxide film 114, and further filling the inside of the insulating material 55 with a light shielding material 56 when forming the light shielding film 49. The light-shielding material 56 is formed integrally with the light-shielding film 49 using a metal having light-shielding properties.

By configuring such a pixel separation portion 54A, the pixels 2 adjacent to each other are electrically isolated from each other by the insulating material 55 filling the trench while being optically isolated by the light shielding material 56. In this way, the charge generated in the semiconductor substrate 12 can be prevented from leaking into the adjacent pixel 2, and also the oblique incident light can be prevented from leaking into the adjacent pixel 2.

Further, also in the third modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby preventing occurrence of color mixing.

Fig. 14 is a diagram illustrating a fourth modification of the pixel structure.

In fig. 14, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In addition, in the fourth modification of the pixel structure, a pixel separation portion 54B for separation between the pixels 2 in the semiconductor substrate 12 is formed.

The pixel separation portion 54B is formed by digging a trench between the N-type semiconductor regions 42 for constituting the photodiode PD, forming an aluminum oxide film 113 on the inner surface of the trench, filling the trench with an insulating material 55 when forming the silicon oxide film 114, and further filling the trench with a light shielding material 56. In the configuration having the pixel separation portion 54B, the light shielding film 49 is not provided in the flat portion 53.

By configuring such a pixel separation portion 54B, pixels 2 adjacent to each other are electrically isolated from each other by the insulating material 55 filling the trench while being optically isolated by the light shielding material 56. In this way, the charge generated in the semiconductor substrate 12 can be prevented from leaking into the adjacent pixel 2, and also the oblique incident light can be prevented from leaking into the adjacent pixel 2.

Further, also in the fourth modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby preventing occurrence of color mixing.

Fig. 15 is a diagram illustrating a fifth modification of the pixel structure.

In fig. 15, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. Further, in the fifth modification of the pixel structure, the antireflection portion 48A is formed in a shape such that the depth of the unevenness for constituting the moth-eye structure is reduced in the vicinity of the periphery of the pixel 2.

In other words, as shown in fig. 15, for example, the antireflection portion 48A has an unevenness for constituting a moth-eye structure having a shallower depth in a region around the pixel 2 (i.e., a vicinity of another adjacent pixel 2) than the antireflection portion 48 shown in fig. 11.

As described above, by forming the unevenness of a shallower depth in the region around the pixel 2, the generation of diffracted light can be suppressed in the periphery of the pixel 2. Further, also in the fifth modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby preventing occurrence of color mixing.

Fig. 16 is a diagram illustrating a sixth modification of the pixel structure.

In fig. 16, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the sixth modification of the pixel structure, the antireflection portion 48A is formed in such a shape that the depth of the unevenness for constituting the moth-eye structure is reduced in the periphery of the pixel 2, and the pixel separation portion 54 is also formed.

By configuring such an antireflection portion 48A, while the pixels 2 adjacent to each other can be electrically isolated from each other by the pixel separation portion 54, the generation of diffracted light can be suppressed in the area around the pixels 2. Further, also in the sixth modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress the generation of diffracted light in the pixel separation area, thereby further preventing the generation of color mixture.

Fig. 17 is a diagram illustrating a seventh modification of the pixel structure.

In fig. 17, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In addition, in the seventh modification of the pixel structure, the antireflection portion 48A is formed in a shape such that the depth of the unevenness for constituting the moth-eye structure is reduced in the vicinity of the periphery of the pixel 2 and the pixel separation portion 54A is also formed.

By configuring such an antireflection portion 48A, while the pixels 2 adjacent to each other can be electrically and optically isolated from each other by the pixel separation portion 54A, the generation of diffracted light can be suppressed in the area around the pixels 2. Further, also in the seventh modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress the generation of diffracted light in the pixel separation area, thereby further preventing the generation of color mixture.

Fig. 18 is a diagram illustrating an eighth modification of the pixel structure.

In fig. 18, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the eighth modification of the pixel structure, the antireflection portion 48A is formed in a shape such that the depth of the unevenness for constituting the moth-eye structure is reduced in the vicinity of the periphery of the pixel 2, and the pixel separation portion 54B is also formed.

By configuring such an antireflection portion 48A, while the pixels 2 adjacent to each other can be electrically and optically isolated from each other by the pixel separation portion 54B, the generation of diffracted light can be suppressed in the area around the pixels 2. In addition, also in the eighth modification of the pixel structure, the flat portion 53 may be provided in the pixel structure to suppress the generation of diffracted light in the pixel separation area, thereby further preventing the generation of color mixture.

Fig. 19 is a diagram illustrating a ninth modification of the pixel structure.

In fig. 19, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the ninth modification of the pixel structure, the anti-reflection portion 48B is formed in a smaller area than the anti-reflection portion 48 in fig. 11, for example.

In other words, as shown in fig. 19, for example, the region of the antireflection portion 48B where the moth-eye structure is formed becomes smaller in the region around the pixel 2 (i.e., the adjacent region of another adjacent pixel 2) as compared with the antireflection portion 48 shown in fig. 11. Therefore, the flat portion 53A is formed in a larger area than the flat portion 53 in fig. 11.

As described above, by providing the flat portion 53A in a larger area without forming the moth-eye structure in the area around the pixel 2, generation of diffracted light can be suppressed in the periphery of the pixel 2. In this way, also in the ninth modification of the pixel structure, the generation of diffracted light can be suppressed in the pixel separating region to further prevent the occurrence of color mixing.

Fig. 20 is a diagram illustrating a tenth modification of the pixel structure.

In fig. 20, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the tenth modification of the pixel structure, the anti-reflection portion 48B is formed in a smaller area and the pixel separation portion 54 is also formed.

By configuring such an antireflection portion 48B, while the pixels 2 adjacent to each other can be electrically isolated from each other by the pixel separation portion 54, the generation of diffracted light can be suppressed in the area around the pixels 2. Further, also in the tenth modification of the pixel structure, the flat portion 53A may be provided in a larger area in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby further preventing generation of color mixture.

Fig. 21 is a diagram illustrating an eleventh modification of the pixel structure.

In fig. 21, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the eleventh modification of the pixel structure, the antireflection portion 48B is formed in a smaller area and the pixel separation portion 54A is also formed.

By configuring such an antireflection portion 48B, while the pixels 2 adjacent to each other can be electrically and optically isolated from each other by the pixel separation portion 54A, the generation of diffracted light can be suppressed in the area around the pixels 2. Further, also in the eleventh modification of the pixel structure, the flat portion 53A may be provided in a larger area in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby further preventing generation of color mixture.

Fig. 22 is a diagram illustrating a twelfth modification of the pixel structure.

In fig. 22, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the twelfth modification of the pixel structure, the anti-reflection portion 48B is formed in a smaller area and the pixel separation portion 54B is also formed.

By configuring such an antireflection portion 48B, while the pixels 2 adjacent to each other can be electrically and optically isolated from each other by the pixel separation portion 54B, the generation of diffracted light can be suppressed in the area around the pixels 2. Further, also in the twelfth modification of the pixel structure, the flat portion 53A may be provided in a larger area in the pixel structure to suppress generation of diffracted light in the pixel separation area, thereby further preventing generation of color mixture.

Fig. 23 is a diagram illustrating a thirteenth modification of the pixel structure.

In fig. 23, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. Further, in a thirteenth modification of the pixel structure, the phase difference pixel 2A for image plane phase difference Autofocus (AF) is arranged, and the antireflection portion 48 is not provided in the phase difference pixel 2A. The phase difference pixel 2A outputs a signal for controlling auto-focus by using a phase difference on an image plane, and since the antireflection portion 48 is not provided, the interface of the phase difference pixel 2A on the light receiving surface side is formed as a flat surface.

As shown in fig. 23, in the phase difference pixel 2A for the image plane phase difference AF, a light shielding film 49A is formed to block light over substantially half of the opening. For example, a pair of phase difference pixels 2A of left-half shielding light and right-half shielding light is used to measure a phase difference, and a signal output from the phase difference pixel 2A is not used to form an image.

Further, also in the thirteenth modification of the pixel structure including such phase difference pixels 2A for image plane phase difference AF, the flat portion 53 may be provided in the pixel structure between the pixels 2 other than the phase difference pixels 2A to suppress generation of diffracted light in the pixel separation area, thereby preventing occurrence of color mixing.

Fig. 24 is a diagram illustrating a fourteenth modification of the pixel structure.

In fig. 24, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the fourteenth modification of the pixel configuration, the antireflection portion 48 is not provided in the phase difference pixel 2A for the image plane phase difference AF, but the pixel separation portion 54 is formed.

Therefore, also in the fourteenth modification of the pixel structure, the pixels 2 adjacent to each other may be electrically isolated from each other by the pixel separation section 54, and the flat section 53 may be provided in the pixel structure between the pixels 2 other than the phase difference pixel 2A to suppress the generation of diffracted light in the pixel separation area, thereby preventing the occurrence of color mixing.

Fig. 25 is a diagram illustrating a fifteenth modification of the pixel structure.

In fig. 25, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the fifteenth modification of the pixel configuration, the antireflection portion 48 is not provided in the phase difference pixel 2A for the image plane phase difference AF, but the pixel separation portion 54A is formed.

Therefore, also in the fifteenth modification of the pixel structure, the pixels 2 adjacent to each other can be electrically and optically isolated from each other by the pixel separation portion 54A, and the flat portion 53 can be provided in the pixel structure between the pixels 2 other than the phase difference pixel 2A to suppress the generation of diffracted light in the pixel separation region, thereby preventing the occurrence of color mixing.

Fig. 26 is a diagram illustrating a sixteenth modification of the pixel structure.

In fig. 26, the basic structure of the solid-state imaging device 1 is common to that shown in fig. 11. In the sixteenth modification of the pixel configuration, the antireflection portion 48 is not provided in the phase difference pixel 2A for the image plane phase difference AF, but the pixel separation portion 54B is formed.

Therefore, also in the sixteenth modification of the pixel structure, the pixels 2 adjacent to each other may be electrically and optically isolated from each other by the pixel separation portion 54B, and the flat portion 53 may be provided in the pixel structure between the pixels 2 other than the phase difference pixel 2A to suppress the generation of diffracted light in the pixel separation region, thereby preventing the occurrence of color mixing.

<5. exemplary application of electronic device >

The technique according to the present invention is not limited to application to solid-state imaging devices. Therefore, the technique according to the present invention is applicable to any electronic apparatus using a solid-state imaging device for an image reading unit (photoelectric conversion unit), including, for example, an imaging apparatus such as a digital still camera or a video camera, a portable terminal apparatus having an imaging function, and a copying machine using a solid-state imaging device for an image reading unit. The solid-state imaging device may be formed as one chip, or alternatively, may be composed of a module type imaging device having an imaging function assembled with an imaging unit and a signal processing unit or an optical system in total.

Fig. 27 is a block diagram illustrating an exemplary configuration of an imaging apparatus serving as an electronic apparatus according to the present invention.

The imaging apparatus 200 in fig. 27 includes an optical unit 201 having a lens group, a solid-state imaging device (imaging device) 202 using the configuration of the solid-state imaging device 1 in fig. 1, and a Digital Signal Processor (DSP) circuit 203 serving as a camera signal processing circuit. Further, the imaging apparatus 200 includes a frame memory 204, a display unit 205, a recording unit 206, an operation unit 207, and a power supply unit 208. The DSP circuit 203, the frame memory 204, the display unit 205, the recording unit 206, the operation unit 207, and the power supply unit 208 are connected to each other via a bus 209.

The optical unit 201 captures incident light (image light) from a subject and forms an image on an imaging surface of the solid-state imaging device 202. The solid-state imaging device 202 converts the amount of incident light forming an image on the imaging surface by the optical unit 201 into an electric signal for each pixel to output as a pixel signal. The solid-state imaging device 1 in fig. 1 (i.e., a solid-state imaging device capable of improving sensitivity while suppressing deterioration of color mixing) may be used as the solid-state imaging device 202.

A display unit 205 including a panel-type display device such as a liquid crystal panel or an organic Electroluminescence (EL) panel displays a video or a still image captured by the solid-state imaging device 202. The recording unit 206 stores the video or still image captured by the solid-state imaging device 202 in a storage medium such as a hard disk or a semiconductor memory.

The operation unit 207 issues instructions for various functions of the image forming apparatus 200 according to the operation of the user. The power supply unit 208 appropriately supplies various types of power to the DSP circuit 203, the frame memory 204, the display unit 205, the recording unit 206, and the operation unit 207 as operation power to be supplied to these units.

As described above, the foregoing solid-state imaging device 1 can be used as the solid-state imaging device 202 to improve sensitivity while suppressing deterioration of color mixing. Therefore, also in the imaging apparatus 200 such as a video camera, a digital camera, or even a camera module for a mobile apparatus such as a portable telephone, the quality of a captured image can be improved.

The embodiment according to the present invention is not limited to the foregoing embodiment and various modifications may be made without departing from the scope of the present invention.

In the above-described example, the solid-state imaging device in which the signal charge is electrons has been described on the assumption that the first conductivity type is a P type and the second conductivity type is an N type; however, the present invention is also applicable to a solid-state imaging device in which signal charges are holes. In other words, each of the aforementioned semiconductor regions may be constituted by a semiconductor region of an opposite conductivity type, assuming that the first conductivity type is a P-type and the second conductivity type is an N-type.

Further, the technique according to the present invention is not limited to the application of a solid-state imaging device that detects the distribution of the amount of visible incident light to image as an image, and is applicable to, for example, a solid-state imaging device that images the distribution of the amount of incident infrared rays, X-rays, or particles as an image, and any solid-state imaging device (physical quantity distribution detector) such as a fingerprint detection sensor that images the distribution of other physical quantities in a broad sense (for example, pressure or static capacitance) as an image.

Note that the present invention can also be configured as described below.

(1) A solid-state imaging device, comprising: an antireflection portion having a moth-eye structure provided on an interface on a light receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally; and an inter-pixel light shielding portion for blocking incident light, provided below the interface of the reflection preventing portion.

(2) The solid-state imaging device according to the above (1), wherein the photoelectric conversion region is a semiconductor region, and the inter-pixel light-shielding portion has a trench structure obtained by digging the semiconductor region at a pixel boundary in a depth direction.

(3) The solid-state imaging device according to (2) above, wherein the inter-pixel light-shielding portion is formed by filling the semiconductor region dug in the depth direction with a transparent insulating film.

(4) The solid-state imaging device according to (2) or (3) above, wherein the inter-pixel light-shielding portion is formed by filling the semiconductor region dug in the depth direction with a transparent insulating film and a metal material.

(5) The solid-state imaging device according to (3) or (4) above, wherein a pinning layer is laminated between the semiconductor region and the transparent insulating film.

(6) The solid-state imaging device according to the above (3) or (4), wherein a pinning layer and an antireflection film are laminated between the semiconductor region and the transparent insulating film.

(7) The solid-state imaging device according to any one of the above (1) to (6), wherein the reflection preventing portion is formed at a pixel center portion in a predetermined percentage area of the pixel area.

(8) The solid-state imaging device according to the above (7), wherein the reflection preventing portion is formed at the pixel center portion in an 80% area of the pixel area.

(9) The solid-state imaging device according to any one of (1) to (8) above, wherein the inter-pixel light-shielding portion has a trench width equal to or greater than 40 nm.

(10) The solid-state imaging device according to any one of (1) to (9) above, wherein a dug amount of the inter-pixel light-shielding portion in a depth direction is equal to or larger than a wavelength of incident light.

(11) The solid-state imaging device according to any one of the above (1) to (10), wherein a flat portion is provided between the pixels on the interface on the light receiving surface side by a predetermined width of a region where the moth-eye structure serving as the antireflection portion is not formed.

(12) The solid-state imaging device according to (11) above, wherein a pixel separation portion for separation between the photoelectric conversion regions of the pixels adjacent to each other is provided by filling the trench, which is obtained by digging the semiconductor region in the depth direction in the flat portion, with an insulating material.

(13) The solid-state imaging device according to the above (12), wherein in the groove of the pixel separation portion, an inner side of the insulating material is filled with a light-shielding material having a light-shielding property.

(14) The solid-state imaging device according to any one of the above (1) to (13), further comprising a phase difference pixel that outputs a signal for controlling auto-focusing by using a phase difference in an image plane, wherein the interface of the phase difference pixel on the light receiving surface side is formed as a flat surface.

(15) A method of manufacturing a solid-state imaging device, the method comprising: forming an antireflection portion having a moth-eye structure on an interface on a light receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally; and forming an inter-pixel light shielding portion for blocking incident light below the interface of the reflection preventing portion.

(16) An electronic apparatus includes a solid-state imaging device including an antireflection portion having a moth-eye structure provided on an interface on a light receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-shielding portion for blocking incident light, the inter-pixel light-shielding portion being provided below the interface of the antireflection portion.

List of reference numerals

1 solid-state imaging device 2 pixel

3 pixel array portion 12 semiconductor substrate

41. 42 semiconductor region 45 pinning layer

46 transparent insulating film 47 light-shielding portion between pixels

48 antireflection portion 49 light-shielding film

50 planarizing film 51 color filter layer

52-piece on-chip lens 101 metal shading part

200 imaging apparatus 202 solid-state imaging device